1. Mar 13, 2023
    • Zenithal's avatar
      Add STUSB03E Transceiver IO · c93f566f
      Zenithal authored
      c93f566f
    • Zenithal's avatar
      Default to NoCrossing · c3a87e96
      Zenithal authored
      c3a87e96
    • Zenithal's avatar
      Async Crossing · efee8942
      Zenithal authored
      efee8942
    • Zenithal's avatar
      Make sampleRate MMIO · 0b969e32
      Zenithal authored
      0b969e32
    • Zenithal's avatar
      Remove AXI4 · 57c2d198
      Zenithal authored
      57c2d198
    • Zenithal's avatar
      Fix dts compatible · 9a245294
      Zenithal authored
      9a245294
    • Zenithal's avatar
      Add USB 1.1 FS device · f39db3eb
      Zenithal authored
      A USB 1.1 Full speed device is implemented.
      Actually it is USB 2.0 compliant as additional requests
      can be handled in software, but to make things
      less confusing we say it is USB 1.1.
      
      It is an end-to-end solution, as it can be easily
      attached to the tilelink/axi4 bus and in the end
      it outputs two top io for RX/TX.
      
      The controller and PHY is not strictly separated,
      and it does not have a standard UTMI/ULPI port.
      The MMIO port is also custom.
      
      The architecture for it may be found in slides
      of RVSC22[1].
      
      The driver for it may be found in [2].
      Some part of the driver is quite similar
      to tinyUSB so it may get ported there.
      
      It has been verified in an Arty100t FPGA,
      capable of running the required USB stack
      of canokey (a yubikey alternative) [1].
      
      The control, bulk and interrupt transfer types
      worked, but the support of isoc
      transfer is not added.
      
      [1] https://github.com/OpenRigil/rvsc22
      [2] https://github.com/OpenRigil/openrigil-firmware
      f39db3eb
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