Commits · timer-fix · github.com / chipsalliance / rocket-chip-blocks

Feb 14, 2024
- Update timer device to latest rocket-chip · 340b7815
  Jerry Zhao authored Feb 14, 2024
  
  340b7815
Jan 29, 2024
- Update to new rocket-chip APIs · 3dddfe9f
  Jerry Zhao authored Jan 28, 2024
  
  3dddfe9f
Oct 18, 2023
- Update API for rocket-chip clusters API · 212c7b07
  Jerry Zhao authored Oct 17, 2023
  
  212c7b07
Aug 22, 2023
- Fix TLSPI (broken during chisel2->chisel3 port · 5edd72e7
  Jerry Zhao authored Aug 21, 2023
  
  5edd72e7
Aug 21, 2023
- SPI fixes for latest chisel · 6aec2d13
  Jerry Zhao authored Aug 19, 2023
  
  6aec2d13
Aug 17, 2023
- Fix UART chisel syntax problems (#21) · 91fb1443
  Jerry Zhao authored Aug 16, 2023
  
  91fb1443
Aug 02, 2023

Remove Chisel2 Compatibility mode (#20) · a84c284e

Yangyu Chen authored Aug 02, 2023



* remove () from fire()
* add BlackBox
* remove IO and add BlackBox
* Port rocket-chip-blocks to chisel3
* remove NotStrictInferReset
* Remove GenericParameterizedBundle

---------

Co-authored-by: Jiuyang Liu <liu@jiuyang.me>
Co-authored-by: Porterlu <1258210724@qq.com>

a84c284e

Apr 26, 2023
- Change default UARTTX printf behavior to disable (#18) · abf129a3
  Jerry Zhao authored Apr 26, 2023
  
  abf129a3
Mar 30, 2023
- Fix ChipLink for latest rocket-chip (#17) · 534d3b74
  Jerry Zhao authored Mar 29, 2023
  
  534d3b74
Mar 28, 2023
- Merge pull request #16 from chipsalliance/uarts · 350fd1e7
  Jerry Zhao authored Mar 27, 2023
```
Provide mechanism for accessing generated uarts
```
  350fd1e7
- Merge branch 'main' into uarts · 65d436ed
  Jerry Zhao authored Mar 27, 2023
  
  65d436ed
- Allow accessing the uart devices · be4262b9
  Jerry Zhao authored Mar 27, 2023
  
  be4262b9
- Change default UART plusarg_print to enable · 53404c87
  Jerry Zhao authored Mar 27, 2023
  
  53404c87
- Add PlusArg to enable/disable the UART printout · 8bfafa13
  Jerry Zhao authored Mar 26, 2023
  
  8bfafa13
Mar 10, 2023
- remove () from fire() (#14) · 19d42938
  Jiuyang Liu authored Mar 10, 2023
  
  19d42938
Mar 09, 2023
- fix for chipsalliance/rocket-chip#2496 (#2) · 2f14942f
  Jiuyang Liu authored Mar 09, 2023
  
  2f14942f
Feb 24, 2023
- Refactor UART to chisel3 style (#6) · 9bd69f3e
  Yanqi Yang authored Feb 24, 2023
  
  9bd69f3e
Feb 23, 2023
- UART documentation (#4) · 679049ac
  Yanqi Yang authored Feb 23, 2023
  
  679049ac
Feb 22, 2023
- bump to cde master · 3c78ccfd
  Jiuyang Liu authored Feb 22, 2023
  
  3c78ccfd
Feb 01, 2023
- Bump to scala 2.13/chisel 3.5.5/latest rocketchip · eb2d8951
  Jerry Zhao authored Jan 04, 2023
  
  eb2d8951
- Fix LazyModuleImp class declaration · 4273925f
  Jerry Zhao authored Jan 04, 2023
  
  4273925f
Jan 04, 2023

fix: chisel3 pr #2758 · 5eae9bfd

SingularityKChen authored Dec 27, 2022

+ Remove parenthesized forms of litValue();
+ Replace MultiIOModule with Module;

5eae9bfd

Sep 02, 2022
- fix a bug introduced in 09afa7a0 · e8adf0e3
  Jiuyang Liu authored Jun 06, 2022
  
  e8adf0e3
- Merge pull request #1 from chipsalliance/rmom · 3ddf9f0c
  Jerry Zhao authored Sep 01, 2022
```
remove objectmodule
```
  3ddf9f0c
Jun 05, 2022
- remove objectmodule · 1132a598
  Jiuyang Liu authored Apr 24, 2022
  
  1132a598
Jun 02, 2022
- Create README.md · 917c5e90
  Henry Cook authored Jun 01, 2022
  
  917c5e90
- add full license boilerplate to scala sources · 09afa7a0
  Henry Cook authored Jun 01, 2022
  
  09afa7a0
Jan 06, 2021
- Merge pull request #169 from abejgonzalez/split-spi-nodes · 545a396f
  Megan Wachs authored Jan 05, 2021
```
Expose TL node(s) in periphery
```
  545a396f
Dec 28, 2020
- Expose TL node(s) in periphery · 6cc6128b
  abejgonzalez authored Oct 13, 2020
  
  6cc6128b
Nov 03, 2020
- Merge pull request #171 from zizztux/fix_inputpin_connect · 612ed01d
  Megan Wachs authored Nov 02, 2020
```
fix incorrect connection for input pin
```
  612ed01d
Nov 02, 2020
- GPIO: fix incorrect connection for function mux input · d8ffd1bf
  Connor Lee authored Nov 02, 2020
  
  d8ffd1bf
Oct 31, 2020
- Merge pull request #170 from zizztux/split_gpio_bundle · 455be6da
  Megan Wachs authored Oct 30, 2020
```
GPIO: split function I/O bundle from GPIO bundle
```
  455be6da
Oct 29, 2020
- GPIO: split function I/O bundle from GPIO bundle · dad9768e
  Connor Lee authored Oct 27, 2020
  
  dad9768e
Sep 19, 2020
- Merge pull request #167 from sifive/Add_por_generator_device · 5945cde0
  Kowshik Murali authored Sep 19, 2020
```
Added power on reset genertor device
```
  5945cde0
- Added powerGodd for internal POR · c5358b6d
  Kowshik Murali authored Sep 18, 2020
  
  c5358b6d
Sep 17, 2020
- Added power on reset genertor device · f080cc5f
  Kowshik Murali authored Sep 16, 2020
  
  f080cc5f
Sep 09, 2020
- Merge pull request #164 from sifive/pinUpdate · f3ee6280
  Yizhi Lu authored Sep 08, 2020
```
add additional GPIO pin connections
```
  f3ee6280
- cleanups · b1282a41
  Yizhi Lu authored Sep 08, 2020
  
  b1282a41
- upstream BasicBusBlocker factory to rocket-chip (#166) · 1f32b8f9
  Henry Cook authored Sep 08, 2020
  
  1f32b8f9
Sep 07, 2020
- add optional input po · be710ca8
  Yizhi Lu authored Sep 06, 2020
  
  be710ca8