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chipsalliance
rocket-chip-blocks
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uart_naming
c8c14f7b
·
Name UARTPeriphery-related modules descriptively
·
Jun 05, 2024
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main
default
protected
0b058667
·
Merge pull request #33 from chipsalliance/uart_domain
·
May 30, 2024
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uart_domain
c667be9b
·
Set name of UART clock domain
·
May 30, 2024
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rcbump
2e98a5ea
·
Remove HasDevicesModuleImp pattern
·
Mar 10, 2024
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timer-fix
340b7815
·
Update timer device to latest rocket-chip
·
Feb 14, 2024
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update-mockaon
3dddfe9f
·
Update to new rocket-chip APIs
·
Jan 28, 2024
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clusters
212c7b07
·
Update API for rocket-chip clusters API
·
Oct 17, 2023
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fixes
5edd72e7
·
Fix TLSPI (broken during chisel2->chisel3 port
·
Aug 21, 2023
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fixuart
5505c725
·
Fix UART chisel syntax problems
·
Aug 16, 2023
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chiplinkfix
3938f301
·
Fix ChipLink for latest rocket-chip
·
Mar 29, 2023
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uarts
65d436ed
·
Merge branch 'main' into uarts
·
Mar 27, 2023
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usb
c93f566f
·
Add STUSB03E Transceiver IO
·
Mar 13, 2023
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chisel5_fix
d74046ca
·
remove IO and add BlackBox
·
Mar 09, 2023
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bump_cde
21b44574
·
bump to cde master
·
Feb 22, 2023
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scala213
1943f289
·
Fix LazyModuleImp class declaration
·
Jan 04, 2023
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fixpackage
e6e38267
·
Add missing package identifier
·
Sep 01, 2022
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name_macro_fix
f7e70bb6
·
fix for chipsalliance/rocket-chip#2496
·
Jun 05, 2022
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