diff options
Diffstat (limited to 'prover_snapshots/hol4/RV32')
| -rw-r--r-- | prover_snapshots/hol4/RV32/Holmakefile | 13 | ||||
| -rw-r--r-- | prover_snapshots/hol4/RV32/riscvAuxiliaryScript.sml | 50 | ||||
| -rw-r--r-- | prover_snapshots/hol4/RV32/riscvScript.sml | 34910 | ||||
| -rw-r--r-- | prover_snapshots/hol4/RV32/riscv_extrasScript.sml | 276 | ||||
| -rw-r--r-- | prover_snapshots/hol4/RV32/riscv_typesScript.sml | 2208 |
5 files changed, 37457 insertions, 0 deletions
diff --git a/prover_snapshots/hol4/RV32/Holmakefile b/prover_snapshots/hol4/RV32/Holmakefile new file mode 100644 index 0000000..d90fcbe --- /dev/null +++ b/prover_snapshots/hol4/RV32/Holmakefile @@ -0,0 +1,13 @@ +INCLUDES = ../lib/lem ../lib/sail + +SCRIPTS = riscv_extrasScript.sml riscv_typesScript.sml riscvScript.sml + +THYS = $(patsubst %Script.sml,%Theory.uo,$(SCRIPTS)) + +all: $(THYS) +.PHONY: all + +ifdef POLY +BASE_HEAP = ../lib/sail/sail-heap + +endif diff --git a/prover_snapshots/hol4/RV32/riscvAuxiliaryScript.sml b/prover_snapshots/hol4/RV32/riscvAuxiliaryScript.sml new file mode 100644 index 0000000..8de7133 --- /dev/null +++ b/prover_snapshots/hol4/RV32/riscvAuxiliaryScript.sml @@ -0,0 +1,50 @@ +(*Generated by Lem from generated_definitions/lem/RV32/riscv.lem.*) +open HolKernel Parse boolLib bossLib; +open lem_pervasives_extraTheory sail2_instr_kindsTheory sail2_valuesTheory sail2_prompt_monadTheory sail2_operators_mwordsTheory sail2_promptTheory sail2_stringTheory riscv_typesTheory riscv_extrasTheory riscvTheory; + +val _ = numLib.prefer_num(); + + + +open lemLib; +(* val _ = lemLib.run_interactive := true; *) +val _ = new_theory "riscvAuxiliary" + + +(****************************************************) +(* *) +(* Termination Proofs *) +(* *) +(****************************************************) + +(* val gst = Defn.tgoal_no_defn (n_leading_spaces0_def, n_leading_spaces0_ind) *) +val (n_leading_spaces0_rw, n_leading_spaces0_ind_rw) = + Defn.tprove_no_defn ((n_leading_spaces0_def, n_leading_spaces0_ind), + cheat (* the termination proof *) + ) +val n_leading_spaces0_rw = save_thm ("n_leading_spaces0_rw", n_leading_spaces0_rw); +val n_leading_spaces0_ind_rw = save_thm ("n_leading_spaces0_ind_rw", n_leading_spaces0_ind_rw); + + +(* val gst = Defn.tgoal_no_defn (walk32_def, walk32_ind) *) +val (walk32_rw, walk32_ind_rw) = + Defn.tprove_no_defn ((walk32_def, walk32_ind), + cheat (* the termination proof *) + ) +val walk32_rw = save_thm ("walk32_rw", walk32_rw); +val walk32_ind_rw = save_thm ("walk32_ind_rw", walk32_ind_rw); + + +(* val gst = Defn.tgoal_no_defn (execute_def, execute_ind) *) +val (execute_rw, execute_ind_rw) = + Defn.tprove_no_defn ((execute_def, execute_ind), + cheat (* the termination proof *) + ) +val execute_rw = save_thm ("execute_rw", execute_rw); +val execute_ind_rw = save_thm ("execute_ind_rw", execute_ind_rw); + + + + +val _ = export_theory() + diff --git a/prover_snapshots/hol4/RV32/riscvScript.sml b/prover_snapshots/hol4/RV32/riscvScript.sml new file mode 100644 index 0000000..52b43e6 --- /dev/null +++ b/prover_snapshots/hol4/RV32/riscvScript.sml @@ -0,0 +1,34910 @@ +(*Generated by Lem from generated_definitions/lem/RV32/riscv.lem.*) +open HolKernel Parse boolLib bossLib; +open lem_pervasives_extraTheory sail2_instr_kindsTheory sail2_valuesTheory sail2_prompt_monadTheory sail2_operators_mwordsTheory sail2_promptTheory sail2_stringTheory riscv_typesTheory riscv_extrasTheory; + +val _ = numLib.prefer_num(); + + + +val _ = new_theory "riscv" + +(*Generated by Sail from riscv.*) +(*open import Pervasives_extra*) +(*open import Sail2_instr_kinds*) +(*open import Sail2_values*) +(*open import Sail2_string*) +(*open import Sail2_operators_mwords*) +(*open import Sail2_prompt_monad*) +(*open import Sail2_prompt*) +(*open import Riscv_types*) +(*open import Riscv_extras*) + +(*val is_none : forall 'a. maybe 'a -> bool*) + +val _ = Define ` + ((is_none:'a option -> bool) opt= ((case opt of SOME (_) => F | NONE => T )))`; + + +(*val is_some : forall 'a. maybe 'a -> bool*) + +val _ = Define ` + ((is_some:'a option -> bool) opt= ((case opt of SOME (_) => T | NONE => F )))`; + + +(*val eq_unit : unit -> unit -> bool*) + +val _ = Define ` + ((eq_unit:unit -> unit -> bool) _ _= T)`; + + + + +(*val neq_bool : bool -> bool -> bool*) + +val _ = Define ` + ((neq_bool:bool -> bool -> bool) x y= (~ (((x = y)))))`; + + +(*val __id : integer -> integer*) + +val _ = Define ` + ((id:int -> int) x= x)`; + + +(*val concat_str_bits : forall 'n. Size 'n => string -> mword 'n -> string*) + +val _ = Define ` + ((concat_str_bits:string -> 'n words$word -> string) str x= (STRCAT str ((string_of_bits x))))`; + + +(*val concat_str_dec : string -> ii -> string*) + +val _ = Define ` + ((concat_str_dec:string -> int -> string) str x= (STRCAT str ((dec_str x))))`; + + + + +(*val sail_mask : forall 'len 'v. Size 'len, Size 'v => integer -> mword 'v -> mword 'len*) + +val _ = Define ` + ((sail_mask:int -> 'v words$word -> 'len words$word) len v= + (if ((len <= ((int_of_num (words$word_len v))))) then (vector_truncate v len : 'len words$word) + else (zero_extend v len : 'len words$word)))`; + + +(*val sail_ones : forall 'n. Size 'n => integer -> mword 'n*) + +val _ = Define ` + ((sail_ones:int -> 'n words$word) n= ((not_vec ((zeros n : 'n words$word)) : 'n words$word)))`; + + +(*val slice_mask : forall 'n. Size 'n => integer -> ii -> ii -> mword 'n*) + +val _ = Define ` + ((slice_mask:int -> int -> int -> 'n words$word) n i l= + (if ((l >= n)) then (shiftl ((sail_ones n : 'n words$word)) i : 'n words$word) + else + let one1 = ((sail_mask n (vec_of_bits [B1] : 1 words$word) : 'n words$word)) in + (shiftl ((sub_vec ((shiftl one1 l : 'n words$word)) one1 : 'n words$word)) i : 'n words$word)))`; + + +(*val read_kind_of_num : integer -> read_kind*) + +val _ = Define ` + ((read_kind_of_num:int -> read_kind) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Read_plain + else if (((p0_ = (( 1 : int):ii)))) then Read_reserve + else if (((p0_ = (( 2 : int):ii)))) then Read_acquire + else if (((p0_ = (( 3 : int):ii)))) then Read_exclusive + else if (((p0_ = (( 4 : int):ii)))) then Read_exclusive_acquire + else if (((p0_ = (( 5 : int):ii)))) then Read_stream + else if (((p0_ = (( 6 : int):ii)))) then Read_RISCV_acquire + else if (((p0_ = (( 7 : int):ii)))) then Read_RISCV_strong_acquire + else if (((p0_ = (( 8 : int):ii)))) then Read_RISCV_reserved + else if (((p0_ = (( 9 : int):ii)))) then Read_RISCV_reserved_acquire + else if (((p0_ = (( 10 : int):ii)))) then Read_RISCV_reserved_strong_acquire + else Read_X86_locked))`; + + +(*val num_of_read_kind : read_kind -> integer*) + +val _ = Define ` + ((num_of_read_kind:read_kind -> int) arg_= + ((case arg_ of + Read_plain => (( 0 : int):ii) + | Read_reserve => (( 1 : int):ii) + | Read_acquire => (( 2 : int):ii) + | Read_exclusive => (( 3 : int):ii) + | Read_exclusive_acquire => (( 4 : int):ii) + | Read_stream => (( 5 : int):ii) + | Read_RISCV_acquire => (( 6 : int):ii) + | Read_RISCV_strong_acquire => (( 7 : int):ii) + | Read_RISCV_reserved => (( 8 : int):ii) + | Read_RISCV_reserved_acquire => (( 9 : int):ii) + | Read_RISCV_reserved_strong_acquire => (( 10 : int):ii) + | Read_X86_locked => (( 11 : int):ii) + )))`; + + +(*val write_kind_of_num : integer -> write_kind*) + +val _ = Define ` + ((write_kind_of_num:int -> write_kind) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Write_plain + else if (((p0_ = (( 1 : int):ii)))) then Write_conditional + else if (((p0_ = (( 2 : int):ii)))) then Write_release + else if (((p0_ = (( 3 : int):ii)))) then Write_exclusive + else if (((p0_ = (( 4 : int):ii)))) then Write_exclusive_release + else if (((p0_ = (( 5 : int):ii)))) then Write_RISCV_release + else if (((p0_ = (( 6 : int):ii)))) then Write_RISCV_strong_release + else if (((p0_ = (( 7 : int):ii)))) then Write_RISCV_conditional + else if (((p0_ = (( 8 : int):ii)))) then Write_RISCV_conditional_release + else if (((p0_ = (( 9 : int):ii)))) then Write_RISCV_conditional_strong_release + else Write_X86_locked))`; + + +(*val num_of_write_kind : write_kind -> integer*) + +val _ = Define ` + ((num_of_write_kind:write_kind -> int) arg_= + ((case arg_ of + Write_plain => (( 0 : int):ii) + | Write_conditional => (( 1 : int):ii) + | Write_release => (( 2 : int):ii) + | Write_exclusive => (( 3 : int):ii) + | Write_exclusive_release => (( 4 : int):ii) + | Write_RISCV_release => (( 5 : int):ii) + | Write_RISCV_strong_release => (( 6 : int):ii) + | Write_RISCV_conditional => (( 7 : int):ii) + | Write_RISCV_conditional_release => (( 8 : int):ii) + | Write_RISCV_conditional_strong_release => (( 9 : int):ii) + | Write_X86_locked => (( 10 : int):ii) + )))`; + + +(*val barrier_kind_of_num : integer -> barrier_kind*) + +val _ = Define ` + ((barrier_kind_of_num:int -> barrier_kind) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Barrier_Sync + else if (((p0_ = (( 1 : int):ii)))) then Barrier_LwSync + else if (((p0_ = (( 2 : int):ii)))) then Barrier_Eieio + else if (((p0_ = (( 3 : int):ii)))) then Barrier_Isync + else if (((p0_ = (( 4 : int):ii)))) then Barrier_DMB + else if (((p0_ = (( 5 : int):ii)))) then Barrier_DMB_ST + else if (((p0_ = (( 6 : int):ii)))) then Barrier_DMB_LD + else if (((p0_ = (( 7 : int):ii)))) then Barrier_DSB + else if (((p0_ = (( 8 : int):ii)))) then Barrier_DSB_ST + else if (((p0_ = (( 9 : int):ii)))) then Barrier_DSB_LD + else if (((p0_ = (( 10 : int):ii)))) then Barrier_ISB + else if (((p0_ = (( 11 : int):ii)))) then Barrier_MIPS_SYNC + else if (((p0_ = (( 12 : int):ii)))) then Barrier_RISCV_rw_rw + else if (((p0_ = (( 13 : int):ii)))) then Barrier_RISCV_r_rw + else if (((p0_ = (( 14 : int):ii)))) then Barrier_RISCV_r_r + else if (((p0_ = (( 15 : int):ii)))) then Barrier_RISCV_rw_w + else if (((p0_ = (( 16 : int):ii)))) then Barrier_RISCV_w_w + else if (((p0_ = (( 17 : int):ii)))) then Barrier_RISCV_w_rw + else if (((p0_ = (( 18 : int):ii)))) then Barrier_RISCV_rw_r + else if (((p0_ = (( 19 : int):ii)))) then Barrier_RISCV_r_w + else if (((p0_ = (( 20 : int):ii)))) then Barrier_RISCV_w_r + else if (((p0_ = (( 21 : int):ii)))) then Barrier_RISCV_tso + else if (((p0_ = (( 22 : int):ii)))) then Barrier_RISCV_i + else Barrier_x86_MFENCE))`; + + +(*val num_of_barrier_kind : barrier_kind -> integer*) + +val _ = Define ` + ((num_of_barrier_kind:barrier_kind -> int) arg_= + ((case arg_ of + Barrier_Sync => (( 0 : int):ii) + | Barrier_LwSync => (( 1 : int):ii) + | Barrier_Eieio => (( 2 : int):ii) + | Barrier_Isync => (( 3 : int):ii) + | Barrier_DMB => (( 4 : int):ii) + | Barrier_DMB_ST => (( 5 : int):ii) + | Barrier_DMB_LD => (( 6 : int):ii) + | Barrier_DSB => (( 7 : int):ii) + | Barrier_DSB_ST => (( 8 : int):ii) + | Barrier_DSB_LD => (( 9 : int):ii) + | Barrier_ISB => (( 10 : int):ii) + | Barrier_MIPS_SYNC => (( 11 : int):ii) + | Barrier_RISCV_rw_rw => (( 12 : int):ii) + | Barrier_RISCV_r_rw => (( 13 : int):ii) + | Barrier_RISCV_r_r => (( 14 : int):ii) + | Barrier_RISCV_rw_w => (( 15 : int):ii) + | Barrier_RISCV_w_w => (( 16 : int):ii) + | Barrier_RISCV_w_rw => (( 17 : int):ii) + | Barrier_RISCV_rw_r => (( 18 : int):ii) + | Barrier_RISCV_r_w => (( 19 : int):ii) + | Barrier_RISCV_w_r => (( 20 : int):ii) + | Barrier_RISCV_tso => (( 21 : int):ii) + | Barrier_RISCV_i => (( 22 : int):ii) + | Barrier_x86_MFENCE => (( 23 : int):ii) + )))`; + + +(*val trans_kind_of_num : integer -> trans_kind*) + +val _ = Define ` + ((trans_kind_of_num:int -> trans_kind) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Transaction_start + else if (((p0_ = (( 1 : int):ii)))) then Transaction_commit + else Transaction_abort))`; + + +(*val num_of_trans_kind : trans_kind -> integer*) + +val _ = Define ` + ((num_of_trans_kind:trans_kind -> int) arg_= + ((case arg_ of + Transaction_start => (( 0 : int):ii) + | Transaction_commit => (( 1 : int):ii) + | Transaction_abort => (( 2 : int):ii) + )))`; + + +(*val cache_op_kind_of_num : integer -> cache_op_kind*) + +val _ = Define ` + ((cache_op_kind_of_num:int -> cache_op_kind) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Cache_op_D_IVAC + else if (((p0_ = (( 1 : int):ii)))) then Cache_op_D_ISW + else if (((p0_ = (( 2 : int):ii)))) then Cache_op_D_CSW + else if (((p0_ = (( 3 : int):ii)))) then Cache_op_D_CISW + else if (((p0_ = (( 4 : int):ii)))) then Cache_op_D_ZVA + else if (((p0_ = (( 5 : int):ii)))) then Cache_op_D_CVAC + else if (((p0_ = (( 6 : int):ii)))) then Cache_op_D_CVAU + else if (((p0_ = (( 7 : int):ii)))) then Cache_op_D_CIVAC + else if (((p0_ = (( 8 : int):ii)))) then Cache_op_I_IALLUIS + else if (((p0_ = (( 9 : int):ii)))) then Cache_op_I_IALLU + else Cache_op_I_IVAU))`; + + +(*val num_of_cache_op_kind : cache_op_kind -> integer*) + +val _ = Define ` + ((num_of_cache_op_kind:cache_op_kind -> int) arg_= + ((case arg_ of + Cache_op_D_IVAC => (( 0 : int):ii) + | Cache_op_D_ISW => (( 1 : int):ii) + | Cache_op_D_CSW => (( 2 : int):ii) + | Cache_op_D_CISW => (( 3 : int):ii) + | Cache_op_D_ZVA => (( 4 : int):ii) + | Cache_op_D_CVAC => (( 5 : int):ii) + | Cache_op_D_CVAU => (( 6 : int):ii) + | Cache_op_D_CIVAC => (( 7 : int):ii) + | Cache_op_I_IALLUIS => (( 8 : int):ii) + | Cache_op_I_IALLU => (( 9 : int):ii) + | Cache_op_I_IVAU => (( 10 : int):ii) + )))`; + + + + + + +(*val cast_unit_vec : bitU -> mword ty1*) + +val _ = Define ` + ((cast_unit_vec0:bitU ->(1)words$word) b= + ((case b of B0 => (vec_of_bits [B0] : 1 words$word) | B1 => (vec_of_bits [B1] : 1 words$word) )))`; + + +(*val get_config_print_instr : unit -> bool*) + +(*val get_config_print_reg : unit -> bool*) + +(*val get_config_print_mem : unit -> bool*) + +(*val get_config_print_platform : unit -> bool*) + +val _ = Define ` + ((get_config_print_instr:unit -> bool) () = F)`; + + +val _ = Define ` + ((get_config_print_reg:unit -> bool) () = F)`; + + +val _ = Define ` + ((get_config_print_mem:unit -> bool) () = F)`; + + +val _ = Define ` + ((get_config_print_platform:unit -> bool) () = F)`; + + +(*val EXTS : forall 'm 'n. Size 'm, Size 'n => integer -> mword 'n -> mword 'm*) + +(*val EXTZ : forall 'm 'n. Size 'm, Size 'n => integer -> mword 'n -> mword 'm*) + +val _ = Define ` + ((EXTS:int -> 'n words$word -> 'm words$word) m v= ((sign_extend v m : 'm words$word)))`; + + +val _ = Define ` + ((EXTZ:int -> 'n words$word -> 'm words$word) m v= ((zero_extend v m : 'm words$word)))`; + + +(*val zeros_implicit : forall 'n. Size 'n => integer -> mword 'n*) + +val _ = Define ` + ((zeros_implicit:int -> 'n words$word) n= ((zeros n : 'n words$word)))`; + + +(*val ones : forall 'n. Size 'n => integer -> mword 'n*) + +val _ = Define ` + ((ones:int -> 'n words$word) n= ((sail_ones n : 'n words$word)))`; + + +(*val bool_to_bits : bool -> mword ty1*) + +val _ = Define ` + ((bool_to_bits:bool ->(1)words$word) x= (if x then (vec_of_bits [B1] : 1 words$word) else (vec_of_bits [B0] : 1 words$word)))`; + + +(*val bit_to_bool : bitU -> bool*) + +val _ = Define ` + ((bit_to_bool:bitU -> bool) b= ((case b of B1 => T | B0 => F )))`; + + +(*val to_bits : forall 'l. Size 'l => integer -> ii -> mword 'l*) + +val _ = Define ` + ((to_bits:int -> int -> 'l words$word) l n= ((get_slice_int l n (( 0 : int):ii) : 'l words$word)))`; + + +(*val zopz0zI_s : forall 'n. Size 'n => mword 'n -> mword 'n -> bool*) + +(*val zopz0zKzJ_s : forall 'n. Size 'n => mword 'n -> mword 'n -> bool*) + +(*val zopz0zI_u : forall 'n. Size 'n => mword 'n -> mword 'n -> bool*) + +(*val zopz0zKzJ_u : forall 'n. Size 'n => mword 'n -> mword 'n -> bool*) + +(*val zopz0zIzJ_u : forall 'n. Size 'n => mword 'n -> mword 'n -> bool*) + +val _ = Define ` + ((zopz0zI_s:'n words$word -> 'n words$word -> bool) x y= (((integer_word$w2i x)) < ((integer_word$w2i y))))`; + + +val _ = Define ` + ((zopz0zKzJ_s:'n words$word -> 'n words$word -> bool) x y= (((integer_word$w2i x)) >= ((integer_word$w2i y))))`; + + +val _ = Define ` + ((zopz0zI_u:'n words$word -> 'n words$word -> bool) x y= (((lem$w2ui x)) < ((lem$w2ui y))))`; + + +val _ = Define ` + ((zopz0zKzJ_u:'n words$word -> 'n words$word -> bool) x y= (((lem$w2ui x)) >= ((lem$w2ui y))))`; + + +val _ = Define ` + ((zopz0zIzJ_u:'n words$word -> 'n words$word -> bool) x y= (((lem$w2ui x)) <= ((lem$w2ui y))))`; + + +(*val shift_right_arith64 : mword ty64 -> mword ty6 -> mword ty64*) + +val _ = Define ` + ((shift_right_arith64:(64)words$word ->(6)words$word ->(64)words$word) (v : 64 bits) (shift : 6 bits)= + (let (v128 : 128 bits) = ((EXTS (( 128 : int):ii) v : 128 words$word)) in + (subrange_vec_dec ((shift_bits_right v128 shift : 128 words$word)) (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)))`; + + +(*val shift_right_arith32 : mword ty32 -> mword ty5 -> mword ty32*) + +val _ = Define ` + ((shift_right_arith32:(32)words$word ->(5)words$word ->(32)words$word) (v : 32 bits) (shift : 5 bits)= + (let (v64 : 64 bits) = ((EXTS (( 64 : int):ii) v : 64 words$word)) in + (subrange_vec_dec ((shift_bits_right v64 shift : 64 words$word)) (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val n_leading_spaces : string -> ii*) + + val n_leading_spaces0_defn = Hol_defn "n_leading_spaces0" ` + ((n_leading_spaces0:string -> int) s= + (let p0_ = s in + if (((p0_ = ""))) then (( 0 : int):ii) + else + let p0_ = (string_take s (( 1 : int):ii)) in + if (((p0_ = " "))) then (( 1 : int):ii) + ((n_leading_spaces0 ((string_drop s (( 1 : int):ii))))) + else (( 0 : int):ii)))`; + +val _ = Lib.with_flag (computeLib.auto_import_definitions, false) Defn.save_defn n_leading_spaces0_defn; + +(*val spc_forwards : unit -> string*) + +val _ = Define ` + ((spc_forwards:unit -> string) () = " ")`; + + +(*val spc_backwards : string -> unit*) + +val _ = Define ` + ((spc_backwards:string -> unit) s= () )`; + + +(*val spc_matches_prefix : string -> maybe ((unit * ii))*) + +val _ = Define ` + ((spc_matches_prefix0:string ->(unit#int)option) s= + (let n = (n_leading_spaces0 s) in + let p0_ = n in + if (((p0_ = (( 0 : int):ii)))) then NONE + else SOME (() , n)))`; + + +(*val opt_spc_forwards : unit -> string*) + +val _ = Define ` + ((opt_spc_forwards:unit -> string) () = "")`; + + +(*val opt_spc_backwards : string -> unit*) + +val _ = Define ` + ((opt_spc_backwards:string -> unit) s= () )`; + + +(*val opt_spc_matches_prefix : string -> maybe ((unit * ii))*) + +val _ = Define ` + ((opt_spc_matches_prefix0:string ->(unit#int)option) s= (SOME (() , n_leading_spaces0 s)))`; + + +(*val def_spc_forwards : unit -> string*) + +val _ = Define ` + ((def_spc_forwards:unit -> string) () = " ")`; + + +(*val def_spc_backwards : string -> unit*) + +val _ = Define ` + ((def_spc_backwards:string -> unit) s= () )`; + + +(*val def_spc_matches_prefix : string -> maybe ((unit * ii))*) + +val _ = Define ` + ((def_spc_matches_prefix:string ->(unit#ii)option) s= (opt_spc_matches_prefix0 s))`; + + +(*val hex_bits_1_forwards_matches : mword ty1 -> bool*) + +val _ = Define ` + ((hex_bits_1_forwards_matches:(1)words$word -> bool) bv= T)`; + + +(*val hex_bits_1_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_1_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_1_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 1 words$word # ii)) option)) of + SOME ((g__39, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_1_backwards : string -> M (mword ty1)*) + +val _ = Define ` + ((hex_bits_1_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((1)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_1_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 1 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 49:2 - 51:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 49:2 - 51:3") (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_2_forwards_matches : mword ty2 -> bool*) + +val _ = Define ` + ((hex_bits_2_forwards_matches:(2)words$word -> bool) bv= T)`; + + +(*val hex_bits_2_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_2_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_2_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 2 words$word # ii)) option)) of + SOME ((g__38, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_2_backwards : string -> M (mword ty2)*) + +val _ = Define ` + ((hex_bits_2_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((2)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_2_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 2 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 68:2 - 70:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 68:2 - 70:3") (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_3_forwards_matches : mword ty3 -> bool*) + +val _ = Define ` + ((hex_bits_3_forwards_matches:(3)words$word -> bool) bv= T)`; + + +(*val hex_bits_3_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_3_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_3_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 3 words$word # ii)) option)) of + SOME ((g__37, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_3_backwards : string -> M (mword ty3)*) + +val _ = Define ` + ((hex_bits_3_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((3)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_3_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 3 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 87:2 - 89:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 87:2 - 89:3") (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_4_forwards_matches : mword ty4 -> bool*) + +val _ = Define ` + ((hex_bits_4_forwards_matches:(4)words$word -> bool) bv= T)`; + + +(*val hex_bits_4_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_4_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_4_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 4 words$word # ii)) option)) of + SOME ((g__36, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_4_backwards : string -> M (mword ty4)*) + +val _ = Define ` + ((hex_bits_4_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((4)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_4_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 4 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 106:2 - 108:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 106:2 - 108:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_5_forwards_matches : mword ty5 -> bool*) + +val _ = Define ` + ((hex_bits_5_forwards_matches:(5)words$word -> bool) bv= T)`; + + +(*val hex_bits_5_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_5_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 5 words$word # ii)) option)) of + SOME ((g__35, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_5_backwards : string -> M (mword ty5)*) + +val _ = Define ` + ((hex_bits_5_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((5)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 5 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 125:2 - 127:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 125:2 - 127:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_6_forwards_matches : mword ty6 -> bool*) + +val _ = Define ` + ((hex_bits_6_forwards_matches:(6)words$word -> bool) bv= T)`; + + +(*val hex_bits_6_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_6_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 6 words$word # ii)) option)) of + SOME ((g__34, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_6_backwards : string -> M (mword ty6)*) + +val _ = Define ` + ((hex_bits_6_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((6)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 6 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 144:2 - 146:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 144:2 - 146:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_7_forwards_matches : mword ty7 -> bool*) + +val _ = Define ` + ((hex_bits_7_forwards_matches:(7)words$word -> bool) bv= T)`; + + +(*val hex_bits_7_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_7_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 7 words$word # ii)) option)) of + SOME ((g__33, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_7_backwards : string -> M (mword ty7)*) + +val _ = Define ` + ((hex_bits_7_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((7)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 7 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 163:2 - 165:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 163:2 - 165:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_8_forwards_matches : mword ty8 -> bool*) + +val _ = Define ` + ((hex_bits_8_forwards_matches:(8)words$word -> bool) bv= T)`; + + +(*val hex_bits_8_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_8_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 8 words$word # ii)) option)) of + SOME ((g__32, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_8_backwards : string -> M (mword ty8)*) + +val _ = Define ` + ((hex_bits_8_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((8)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 8 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 182:2 - 184:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 182:2 - 184:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_9_forwards_matches : mword ty9 -> bool*) + +val _ = Define ` + ((hex_bits_9_forwards_matches:(9)words$word -> bool) bv= T)`; + + +(*val hex_bits_9_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_9_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_9_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 9 words$word # ii)) option)) of + SOME ((g__31, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_9_backwards : string -> M (mword ty9)*) + +val _ = Define ` + ((hex_bits_9_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((9)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_9_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 9 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 201:2 - 203:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 201:2 - 203:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_10_forwards_matches : mword ty10 -> bool*) + +val _ = Define ` + ((hex_bits_10_forwards_matches:(10)words$word -> bool) bv= T)`; + + +(*val hex_bits_10_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_10_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_10_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 10 words$word # ii)) option)) of + SOME ((g__30, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_10_backwards : string -> M (mword ty10)*) + +val _ = Define ` + ((hex_bits_10_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((10)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_10_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 10 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 220:2 - 222:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 220:2 - 222:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_11_forwards_matches : mword ty11 -> bool*) + +val _ = Define ` + ((hex_bits_11_forwards_matches:(11)words$word -> bool) bv= T)`; + + +(*val hex_bits_11_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_11_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_11_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 11 words$word # ii)) option)) of + SOME ((g__29, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_11_backwards : string -> M (mword ty11)*) + +val _ = Define ` + ((hex_bits_11_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((11)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_11_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 11 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 239:2 - 241:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 239:2 - 241:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_12_forwards_matches : mword ty12 -> bool*) + +val _ = Define ` + ((hex_bits_12_forwards_matches:(12)words$word -> bool) bv= T)`; + + +(*val hex_bits_12_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_12_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 12 words$word # ii)) option)) of + SOME ((g__28, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_12_backwards : string -> M (mword ty12)*) + +val _ = Define ` + ((hex_bits_12_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((12)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 12 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 258:2 - 260:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 258:2 - 260:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_13_forwards_matches : mword ty13 -> bool*) + +val _ = Define ` + ((hex_bits_13_forwards_matches:(13)words$word -> bool) bv= T)`; + + +(*val hex_bits_13_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_13_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_13_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 13 words$word # ii)) option)) of + SOME ((g__27, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_13_backwards : string -> M (mword ty13)*) + +val _ = Define ` + ((hex_bits_13_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((13)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_13_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 13 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 277:2 - 279:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 277:2 - 279:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_14_forwards_matches : mword ty14 -> bool*) + +val _ = Define ` + ((hex_bits_14_forwards_matches:(14)words$word -> bool) bv= T)`; + + +(*val hex_bits_14_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_14_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_14_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 14 words$word # ii)) option)) of + SOME ((g__26, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_14_backwards : string -> M (mword ty14)*) + +val _ = Define ` + ((hex_bits_14_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((14)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_14_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 14 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 296:2 - 298:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 296:2 - 298:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_15_forwards_matches : mword ty15 -> bool*) + +val _ = Define ` + ((hex_bits_15_forwards_matches:(15)words$word -> bool) bv= T)`; + + +(*val hex_bits_15_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_15_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_15_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 15 words$word # ii)) option)) of + SOME ((g__25, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_15_backwards : string -> M (mword ty15)*) + +val _ = Define ` + ((hex_bits_15_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((15)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_15_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 15 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 315:2 - 317:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 315:2 - 317:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_16_forwards_matches : mword ty16 -> bool*) + +val _ = Define ` + ((hex_bits_16_forwards_matches:(16)words$word -> bool) bv= T)`; + + +(*val hex_bits_16_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_16_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_16_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 16 words$word # ii)) option)) of + SOME ((g__24, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_16_backwards : string -> M (mword ty16)*) + +val _ = Define ` + ((hex_bits_16_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((16)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_16_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 16 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 334:2 - 336:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 334:2 - 336:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_17_forwards_matches : mword ty17 -> bool*) + +val _ = Define ` + ((hex_bits_17_forwards_matches:(17)words$word -> bool) bv= T)`; + + +(*val hex_bits_17_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_17_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_17_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 17 words$word # ii)) option)) of + SOME ((g__23, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_17_backwards : string -> M (mword ty17)*) + +val _ = Define ` + ((hex_bits_17_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((17)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_17_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 17 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 353:2 - 355:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 353:2 - 355:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_18_forwards_matches : mword ty18 -> bool*) + +val _ = Define ` + ((hex_bits_18_forwards_matches:(18)words$word -> bool) bv= T)`; + + +(*val hex_bits_18_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_18_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_18_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 18 words$word # ii)) option)) of + SOME ((g__22, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_18_backwards : string -> M (mword ty18)*) + +val _ = Define ` + ((hex_bits_18_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((18)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_18_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 18 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 372:2 - 374:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 372:2 - 374:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_19_forwards_matches : mword ty19 -> bool*) + +val _ = Define ` + ((hex_bits_19_forwards_matches:(19)words$word -> bool) bv= T)`; + + +(*val hex_bits_19_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_19_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_19_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 19 words$word # ii)) option)) of + SOME ((g__21, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_19_backwards : string -> M (mword ty19)*) + +val _ = Define ` + ((hex_bits_19_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((19)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_19_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 19 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 391:2 - 393:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 391:2 - 393:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_20_forwards_matches : mword ty20 -> bool*) + +val _ = Define ` + ((hex_bits_20_forwards_matches:(20)words$word -> bool) bv= T)`; + + +(*val hex_bits_20_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_20_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_20_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 20 words$word # ii)) option)) of + SOME ((g__20, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_20_backwards : string -> M (mword ty20)*) + +val _ = Define ` + ((hex_bits_20_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((20)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_20_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 20 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 410:2 - 412:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 410:2 - 412:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_21_forwards_matches : mword ty21 -> bool*) + +val _ = Define ` + ((hex_bits_21_forwards_matches:(21)words$word -> bool) bv= T)`; + + +(*val hex_bits_21_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_21_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_21_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 21 words$word # ii)) option)) of + SOME ((g__19, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_21_backwards : string -> M (mword ty21)*) + +val _ = Define ` + ((hex_bits_21_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((21)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_21_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 21 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 429:2 - 431:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 429:2 - 431:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_22_forwards_matches : mword ty22 -> bool*) + +val _ = Define ` + ((hex_bits_22_forwards_matches:(22)words$word -> bool) bv= T)`; + + +(*val hex_bits_22_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_22_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_22_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 22 words$word # ii)) option)) of + SOME ((g__18, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_22_backwards : string -> M (mword ty22)*) + +val _ = Define ` + ((hex_bits_22_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((22)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_22_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 22 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 448:2 - 450:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 448:2 - 450:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_23_forwards_matches : mword ty23 -> bool*) + +val _ = Define ` + ((hex_bits_23_forwards_matches:(23)words$word -> bool) bv= T)`; + + +(*val hex_bits_23_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_23_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_23_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 23 words$word # ii)) option)) of + SOME ((g__17, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_23_backwards : string -> M (mword ty23)*) + +val _ = Define ` + ((hex_bits_23_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((23)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_23_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 23 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 467:2 - 469:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 467:2 - 469:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_24_forwards_matches : mword ty24 -> bool*) + +val _ = Define ` + ((hex_bits_24_forwards_matches:(24)words$word -> bool) bv= T)`; + + +(*val hex_bits_24_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_24_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_24_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 24 words$word # ii)) option)) of + SOME ((g__16, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_24_backwards : string -> M (mword ty24)*) + +val _ = Define ` + ((hex_bits_24_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((24)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_24_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 24 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 486:2 - 488:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 486:2 - 488:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_25_forwards_matches : mword ty25 -> bool*) + +val _ = Define ` + ((hex_bits_25_forwards_matches:(25)words$word -> bool) bv= T)`; + + +(*val hex_bits_25_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_25_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_25_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 25 words$word # ii)) option)) of + SOME ((g__15, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_25_backwards : string -> M (mword ty25)*) + +val _ = Define ` + ((hex_bits_25_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((25)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_25_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 25 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 505:2 - 507:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 505:2 - 507:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_26_forwards_matches : mword ty26 -> bool*) + +val _ = Define ` + ((hex_bits_26_forwards_matches:(26)words$word -> bool) bv= T)`; + + +(*val hex_bits_26_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_26_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_26_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 26 words$word # ii)) option)) of + SOME ((g__14, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_26_backwards : string -> M (mword ty26)*) + +val _ = Define ` + ((hex_bits_26_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((26)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_26_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 26 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 524:2 - 526:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 524:2 - 526:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_27_forwards_matches : mword ty27 -> bool*) + +val _ = Define ` + ((hex_bits_27_forwards_matches:(27)words$word -> bool) bv= T)`; + + +(*val hex_bits_27_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_27_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_27_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 27 words$word # ii)) option)) of + SOME ((g__13, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_27_backwards : string -> M (mword ty27)*) + +val _ = Define ` + ((hex_bits_27_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((27)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_27_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 27 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 543:2 - 545:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 543:2 - 545:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_28_forwards_matches : mword ty28 -> bool*) + +val _ = Define ` + ((hex_bits_28_forwards_matches:(28)words$word -> bool) bv= T)`; + + +(*val hex_bits_28_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_28_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_28_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 28 words$word # ii)) option)) of + SOME ((g__12, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_28_backwards : string -> M (mword ty28)*) + +val _ = Define ` + ((hex_bits_28_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((28)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_28_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 28 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 562:2 - 564:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 562:2 - 564:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_29_forwards_matches : mword ty29 -> bool*) + +val _ = Define ` + ((hex_bits_29_forwards_matches:(29)words$word -> bool) bv= T)`; + + +(*val hex_bits_29_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_29_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_29_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 29 words$word # ii)) option)) of + SOME ((g__11, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_29_backwards : string -> M (mword ty29)*) + +val _ = Define ` + ((hex_bits_29_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((29)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_29_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 29 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 581:2 - 583:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 581:2 - 583:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_30_forwards_matches : mword ty30 -> bool*) + +val _ = Define ` + ((hex_bits_30_forwards_matches:(30)words$word -> bool) bv= T)`; + + +(*val hex_bits_30_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_30_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_30_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 30 words$word # ii)) option)) of + SOME ((g__10, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_30_backwards : string -> M (mword ty30)*) + +val _ = Define ` + ((hex_bits_30_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((30)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_30_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 30 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 600:2 - 602:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 600:2 - 602:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_31_forwards_matches : mword ty31 -> bool*) + +val _ = Define ` + ((hex_bits_31_forwards_matches:(31)words$word -> bool) bv= T)`; + + +(*val hex_bits_31_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_31_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_31_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 31 words$word # ii)) option)) of + SOME ((g__9, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_31_backwards : string -> M (mword ty31)*) + +val _ = Define ` + ((hex_bits_31_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((31)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_31_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 31 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 619:2 - 621:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 619:2 - 621:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_32_forwards_matches : mword ty32 -> bool*) + +val _ = Define ` + ((hex_bits_32_forwards_matches:(32)words$word -> bool) bv= T)`; + + +(*val hex_bits_32_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_32_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_32_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 32 words$word # ii)) option)) of + SOME ((g__8, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_32_backwards : string -> M (mword ty32)*) + +val _ = Define ` + ((hex_bits_32_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_32_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 32 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 638:2 - 640:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 638:2 - 640:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_33_forwards_matches : mword ty33 -> bool*) + +val _ = Define ` + ((hex_bits_33_forwards_matches:(33)words$word -> bool) bv= T)`; + + +(*val hex_bits_33_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_33_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_33_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 33 words$word # ii)) option)) of + SOME ((g__7, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_33_backwards : string -> M (mword ty33)*) + +val _ = Define ` + ((hex_bits_33_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((33)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_33_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 33 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 657:2 - 659:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 657:2 - 659:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_48_forwards_matches : mword ty48 -> bool*) + +val _ = Define ` + ((hex_bits_48_forwards_matches:(48)words$word -> bool) bv= T)`; + + +(*val hex_bits_48_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_48_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_48_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 48 words$word # ii)) option)) of + SOME ((g__6, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_48_backwards : string -> M (mword ty48)*) + +val _ = Define ` + ((hex_bits_48_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((48)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_48_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 48 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 676:2 - 678:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 676:2 - 678:3") + (sail2_state_monad$exitS () ) + )))`; + + +(*val hex_bits_64_forwards_matches : mword ty64 -> bool*) + +val _ = Define ` + ((hex_bits_64_forwards_matches:(64)words$word -> bool) bv= T)`; + + +(*val hex_bits_64_backwards_matches : string -> bool*) + +val _ = Define ` + ((hex_bits_64_backwards_matches:string -> bool) s= + ((case s of + s => + if ((case ((hex_bits_64_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s : (( 64 words$word # ii)) option)) of + SOME ((g__5, n)) => + if (((n = ((string_length s))))) then T else F + | _ => F + )) then T else F + )))`; + + +(*val hex_bits_64_backwards : string -> M (mword ty64)*) + +val _ = Define ` + ((hex_bits_64_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((64)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= + ((case ((hex_bits_64_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s : (( 64 words$word # ii))option)) of + SOME ((bv, n)) => + if (((n = ((string_length s))))) then sail2_state_monad$returnS bv + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 695:2 - 697:3") + (sail2_state_monad$exitS () ) + | _ => sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/prelude_mapping.sail 695:2 - 697:3") + (sail2_state_monad$exitS () ) + )))`; + + +val _ = Define ` +((default_meta:unit)= () )`; + + +(*val __WriteRAM_Meta : mword ty32 -> integer -> unit -> M unit*) + +val _ = Define ` + ((WriteRAM_Meta:(32)words$word -> int -> unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width meta= (sail2_state_monad$returnS () ))`; + + +(*val __ReadRAM_Meta : mword ty32 -> integer -> M unit*) + +val _ = Define ` + ((ReadRAM_Meta:(32)words$word -> int ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width= (sail2_state_monad$returnS () ))`; + + +(*val write_ram : forall 'int8_times_n. Size 'int8_times_n => write_kind -> mword ty32 -> integer -> mword 'int8_times_n -> unit -> M bool*) + +val _ = Define ` + ((write_ram:write_kind ->(32)words$word -> int -> 'int8_times_n words$word -> unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) wk addr width data meta= (sail2_state_monad$bindS + (sail2_state_monad$write_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict wk (( 32 : int):ii) addr width data) (\ (ret : bool) . sail2_state_monad$seqS + (if ret then WriteRAM_Meta addr width meta else sail2_state_monad$returnS () ) (sail2_state_monad$returnS ret))))`; + + +(*val write_ram_ea : write_kind -> mword ty32 -> integer -> M unit*) + +val _ = Define ` + ((write_ram_ea:write_kind ->(32)words$word -> int ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) wk addr width= (sail2_state_monad$returnS () ))`; + + +(*val read_ram : forall 'int8_times_n. Size 'int8_times_n => read_kind -> mword ty32 -> integer -> M (mword 'int8_times_n)*) + +val _ = Define ` + ((read_ram:read_kind ->(32)words$word -> int ->(regstate)sail2_state_monad$sequential_state ->((('int8_times_n words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rk addr width= ((sail2_state_monad$read_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict rk (( 32 : int):ii) addr width : ( 'int8_times_n words$word) M)))`; + + +(*val __TraceMemoryWrite : forall 'm 'int8_times_n. Size 'm, Size 'int8_times_n => integer -> mword 'm -> mword 'int8_times_n -> unit*) + +(*val __TraceMemoryRead : forall 'm 'int8_times_n. Size 'm, Size 'int8_times_n => integer -> mword 'm -> mword 'int8_times_n -> unit*) + +val _ = Define ` + ((xlen_val:int)= ((( 32 : int):ii)))`; + + +val _ = Define ` + ((xlen_max_unsigned:int)= (((pow2 (( 32 : int):ii))) - (( 1 : int):ii)))`; + + +val _ = Define ` + ((xlen_max_signed:int)= (((pow2 (((( 32 : int):ii) - (( 1 : int):ii))))) - (( 1 : int):ii)))`; + + +val _ = Define ` + ((xlen_min_signed:int)= ((( 0 : int):ii) - ((pow2 (((( 32 : int):ii) - (( 1 : int):ii)))))))`; + + +(*val regidx_to_regno : mword ty5 -> integer*) + +val _ = Define ` + ((regidx_to_regno:(5)words$word -> int) b= + (let r = (lem$w2ui b) in + r))`; + + +(*val creg2reg_idx : mword ty3 -> mword ty5*) + +val _ = Define ` + ((creg2reg_idx:(3)words$word ->(5)words$word) creg= ((concat_vec (vec_of_bits [B0;B1] : 2 words$word) creg : 5 words$word)))`; + + +val _ = Define ` +((zreg:(5)words$word)= ((vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))`; + + +val _ = Define ` +((ra:(5)words$word)= ((vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word)))`; + + +val _ = Define ` +((sp:(5)words$word)= ((vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))`; + + +(*val Architecture_of_num : integer -> Architecture*) + +val _ = Define ` + ((Architecture_of_num:int -> Architecture) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RV32 + else if (((p0_ = (( 1 : int):ii)))) then RV64 + else RV128))`; + + +(*val num_of_Architecture : Architecture -> integer*) + +val _ = Define ` + ((num_of_Architecture:Architecture -> int) arg_= + ((case arg_ of RV32 => (( 0 : int):ii) | RV64 => (( 1 : int):ii) | RV128 => (( 2 : int):ii) )))`; + + +(*val architecture : mword ty2 -> maybe Architecture*) + +val _ = Define ` + ((architecture:(2)words$word ->(Architecture)option) a= + (let b__0 = a in + if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then SOME RV32 + else if (((b__0 = (vec_of_bits [B1;B0] : 2 words$word)))) then SOME RV64 + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then SOME RV128 + else NONE))`; + + +(*val arch_to_bits : Architecture -> mword ty2*) + +val _ = Define ` + ((arch_to_bits:Architecture ->(2)words$word) a= + ((case a of + RV32 => (vec_of_bits [B0;B1] : 2 words$word) + | RV64 => (vec_of_bits [B1;B0] : 2 words$word) + | RV128 => (vec_of_bits [B1;B1] : 2 words$word) + )))`; + + +(*val Privilege_of_num : integer -> Privilege*) + +val _ = Define ` + ((Privilege_of_num:int -> Privilege) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then User + else if (((p0_ = (( 1 : int):ii)))) then Supervisor + else Machine))`; + + +(*val num_of_Privilege : Privilege -> integer*) + +val _ = Define ` + ((num_of_Privilege:Privilege -> int) arg_= + ((case arg_ of User => (( 0 : int):ii) | Supervisor => (( 1 : int):ii) | Machine => (( 2 : int):ii) )))`; + + +(*val privLevel_to_bits : Privilege -> mword ty2*) + +val _ = Define ` + ((privLevel_to_bits:Privilege ->(2)words$word) p= + ((case p of + User => (vec_of_bits [B0;B0] : 2 words$word) + | Supervisor => (vec_of_bits [B0;B1] : 2 words$word) + | Machine => (vec_of_bits [B1;B1] : 2 words$word) + )))`; + + +(*val privLevel_of_bits : mword ty2 -> M Privilege*) + +val _ = Define ` + ((privLevel_of_bits:(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Privilege),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) p= + (let b__0 = p in + if (((b__0 = (vec_of_bits [B0;B0] : 2 words$word)))) then sail2_state_monad$returnS User + else if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then sail2_state_monad$returnS Supervisor + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then sail2_state_monad$returnS Machine + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at model/riscv_types.sail 78:2 - 82:3") (sail2_state_monad$exitS () )))`; + + +(*val privLevel_to_str : Privilege -> string*) + +val _ = Define ` + ((privLevel_to_str:Privilege -> string) p= ((case p of User => "U" | Supervisor => "S" | Machine => "M" )))`; + + +(*val print_insn : ast -> M string*) + +(*val Retired_of_num : integer -> Retired*) + +val _ = Define ` + ((Retired_of_num:int -> Retired) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RETIRE_SUCCESS + else RETIRE_FAIL))`; + + +(*val num_of_Retired : Retired -> integer*) + +val _ = Define ` + ((num_of_Retired:Retired -> int) arg_= ((case arg_ of RETIRE_SUCCESS => (( 0 : int):ii) | RETIRE_FAIL => (( 1 : int):ii) )))`; + + +(*val AccessType_of_num : integer -> AccessType*) + +val _ = Define ` + ((AccessType_of_num:int -> AccessType) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Read + else if (((p0_ = (( 1 : int):ii)))) then Write + else if (((p0_ = (( 2 : int):ii)))) then ReadWrite + else Execute))`; + + +(*val num_of_AccessType : AccessType -> integer*) + +val _ = Define ` + ((num_of_AccessType:AccessType -> int) arg_= + ((case arg_ of Read => (( 0 : int):ii) | Write => (( 1 : int):ii) | ReadWrite => (( 2 : int):ii) | Execute => (( 3 : int):ii) )))`; + + +(*val accessType_to_str : AccessType -> string*) + +val _ = Define ` + ((accessType_to_str:AccessType -> string) a= + ((case a of Read => "R" | Write => "W" | ReadWrite => "RW" | Execute => "X" )))`; + + +(*val word_width_of_num : integer -> word_width*) + +val _ = Define ` + ((word_width_of_num:int -> word_width) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then BYTE + else if (((p0_ = (( 1 : int):ii)))) then HALF + else if (((p0_ = (( 2 : int):ii)))) then WORD + else DOUBLE))`; + + +(*val num_of_word_width : word_width -> integer*) + +val _ = Define ` + ((num_of_word_width:word_width -> int) arg_= + ((case arg_ of BYTE => (( 0 : int):ii) | HALF => (( 1 : int):ii) | WORD => (( 2 : int):ii) | DOUBLE => (( 3 : int):ii) )))`; + + +(*val InterruptType_of_num : integer -> InterruptType*) + +val _ = Define ` + ((InterruptType_of_num:int -> InterruptType) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then I_U_Software + else if (((p0_ = (( 1 : int):ii)))) then I_S_Software + else if (((p0_ = (( 2 : int):ii)))) then I_M_Software + else if (((p0_ = (( 3 : int):ii)))) then I_U_Timer + else if (((p0_ = (( 4 : int):ii)))) then I_S_Timer + else if (((p0_ = (( 5 : int):ii)))) then I_M_Timer + else if (((p0_ = (( 6 : int):ii)))) then I_U_External + else if (((p0_ = (( 7 : int):ii)))) then I_S_External + else I_M_External))`; + + +(*val num_of_InterruptType : InterruptType -> integer*) + +val _ = Define ` + ((num_of_InterruptType:InterruptType -> int) arg_= + ((case arg_ of + I_U_Software => (( 0 : int):ii) + | I_S_Software => (( 1 : int):ii) + | I_M_Software => (( 2 : int):ii) + | I_U_Timer => (( 3 : int):ii) + | I_S_Timer => (( 4 : int):ii) + | I_M_Timer => (( 5 : int):ii) + | I_U_External => (( 6 : int):ii) + | I_S_External => (( 7 : int):ii) + | I_M_External => (( 8 : int):ii) + )))`; + + +(*val interruptType_to_bits : InterruptType -> mword ty8*) + +val _ = Define ` + ((interruptType_to_bits:InterruptType ->(8)words$word) i= + ((case i of + I_U_Software => (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word) + | I_S_Software => (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B1] : 8 words$word) + | I_M_Software => (vec_of_bits [B0;B0;B0;B0;B0;B0;B1;B1] : 8 words$word) + | I_U_Timer => (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0] : 8 words$word) + | I_S_Timer => (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B1] : 8 words$word) + | I_M_Timer => (vec_of_bits [B0;B0;B0;B0;B0;B1;B1;B1] : 8 words$word) + | I_U_External => (vec_of_bits [B0;B0;B0;B0;B1;B0;B0;B0] : 8 words$word) + | I_S_External => (vec_of_bits [B0;B0;B0;B0;B1;B0;B0;B1] : 8 words$word) + | I_M_External => (vec_of_bits [B0;B0;B0;B0;B1;B0;B1;B1] : 8 words$word) + )))`; + + +(*val ExceptionType_of_num : integer -> ExceptionType*) + +val _ = Define ` + ((ExceptionType_of_num:int -> ExceptionType) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then E_Fetch_Addr_Align + else if (((p0_ = (( 1 : int):ii)))) then E_Fetch_Access_Fault + else if (((p0_ = (( 2 : int):ii)))) then E_Illegal_Instr + else if (((p0_ = (( 3 : int):ii)))) then E_Breakpoint + else if (((p0_ = (( 4 : int):ii)))) then E_Load_Addr_Align + else if (((p0_ = (( 5 : int):ii)))) then E_Load_Access_Fault + else if (((p0_ = (( 6 : int):ii)))) then E_SAMO_Addr_Align + else if (((p0_ = (( 7 : int):ii)))) then E_SAMO_Access_Fault + else if (((p0_ = (( 8 : int):ii)))) then E_U_EnvCall + else if (((p0_ = (( 9 : int):ii)))) then E_S_EnvCall + else if (((p0_ = (( 10 : int):ii)))) then E_Reserved_10 + else if (((p0_ = (( 11 : int):ii)))) then E_M_EnvCall + else if (((p0_ = (( 12 : int):ii)))) then E_Fetch_Page_Fault + else if (((p0_ = (( 13 : int):ii)))) then E_Load_Page_Fault + else if (((p0_ = (( 14 : int):ii)))) then E_Reserved_14 + else if (((p0_ = (( 15 : int):ii)))) then E_SAMO_Page_Fault + else E_CHERI))`; + + +(*val num_of_ExceptionType : ExceptionType -> integer*) + +val _ = Define ` + ((num_of_ExceptionType:ExceptionType -> int) arg_= + ((case arg_ of + E_Fetch_Addr_Align => (( 0 : int):ii) + | E_Fetch_Access_Fault => (( 1 : int):ii) + | E_Illegal_Instr => (( 2 : int):ii) + | E_Breakpoint => (( 3 : int):ii) + | E_Load_Addr_Align => (( 4 : int):ii) + | E_Load_Access_Fault => (( 5 : int):ii) + | E_SAMO_Addr_Align => (( 6 : int):ii) + | E_SAMO_Access_Fault => (( 7 : int):ii) + | E_U_EnvCall => (( 8 : int):ii) + | E_S_EnvCall => (( 9 : int):ii) + | E_Reserved_10 => (( 10 : int):ii) + | E_M_EnvCall => (( 11 : int):ii) + | E_Fetch_Page_Fault => (( 12 : int):ii) + | E_Load_Page_Fault => (( 13 : int):ii) + | E_Reserved_14 => (( 14 : int):ii) + | E_SAMO_Page_Fault => (( 15 : int):ii) + | E_CHERI => (( 16 : int):ii) + )))`; + + +(*val exceptionType_to_bits : ExceptionType -> mword ty8*) + +val _ = Define ` + ((exceptionType_to_bits:ExceptionType ->(8)words$word) e= + ((case e of + E_Fetch_Addr_Align => (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word) + | E_Fetch_Access_Fault => (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B1] : 8 words$word) + | E_Illegal_Instr => (vec_of_bits [B0;B0;B0;B0;B0;B0;B1;B0] : 8 words$word) + | E_Breakpoint => (vec_of_bits [B0;B0;B0;B0;B0;B0;B1;B1] : 8 words$word) + | E_Load_Addr_Align => (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0] : 8 words$word) + | E_Load_Access_Fault => (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B1] : 8 words$word) + | E_SAMO_Addr_Align => (vec_of_bits [B0;B0;B0;B0;B0;B1;B1;B0] : 8 words$word) + | E_SAMO_Access_Fault => (vec_of_bits [B0;B0;B0;B0;B0;B1;B1;B1] : 8 words$word) + | E_U_EnvCall => (vec_of_bits [B0;B0;B0;B0;B1;B0;B0;B0] : 8 words$word) + | E_S_EnvCall => (vec_of_bits [B0;B0;B0;B0;B1;B0;B0;B1] : 8 words$word) + | E_Reserved_10 => (vec_of_bits [B0;B0;B0;B0;B1;B0;B1;B0] : 8 words$word) + | E_M_EnvCall => (vec_of_bits [B0;B0;B0;B0;B1;B0;B1;B1] : 8 words$word) + | E_Fetch_Page_Fault => (vec_of_bits [B0;B0;B0;B0;B1;B1;B0;B0] : 8 words$word) + | E_Load_Page_Fault => (vec_of_bits [B0;B0;B0;B0;B1;B1;B0;B1] : 8 words$word) + | E_Reserved_14 => (vec_of_bits [B0;B0;B0;B0;B1;B1;B1;B0] : 8 words$word) + | E_SAMO_Page_Fault => (vec_of_bits [B0;B0;B0;B0;B1;B1;B1;B1] : 8 words$word) + | E_CHERI => (vec_of_bits [B0;B0;B1;B0;B0;B0;B0;B0] : 8 words$word) + )))`; + + +(*val exceptionType_to_str : ExceptionType -> string*) + +val _ = Define ` + ((exceptionType_to_str:ExceptionType -> string) e= + ((case e of + E_Fetch_Addr_Align => "misaligned-fetch" + | E_Fetch_Access_Fault => "fetch-access-fault" + | E_Illegal_Instr => "illegal-instruction" + | E_Breakpoint => "breakpoint" + | E_Load_Addr_Align => "misaligned-load" + | E_Load_Access_Fault => "load-access-fault" + | E_SAMO_Addr_Align => "misaliged-store/amo" + | E_SAMO_Access_Fault => "store/amo-access-fault" + | E_U_EnvCall => "u-call" + | E_S_EnvCall => "s-call" + | E_Reserved_10 => "reserved-0" + | E_M_EnvCall => "m-call" + | E_Fetch_Page_Fault => "fetch-page-fault" + | E_Load_Page_Fault => "load-page-fault" + | E_Reserved_14 => "reserved-1" + | E_SAMO_Page_Fault => "store/amo-page-fault" + | E_CHERI => "CHERI" + )))`; + + +(*val not_implemented : forall 'a. string -> M 'a*) + +val _ = Define ` + ((not_implemented:string ->(regstate)sail2_state_monad$sequential_state ->(('a,(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) message= (sail2_state_monad$throwS (Error_not_implemented message)))`; + + +(*val internal_error : forall 'a. string -> M 'a*) + +val _ = Define ` + ((internal_error:string ->(regstate)sail2_state_monad$sequential_state ->(('a,(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= (sail2_state_monad$seqS (sail2_state_monad$assert_expS F s) (sail2_state_monad$exitS () )))`; + + +(*val TrapVectorMode_of_num : integer -> TrapVectorMode*) + +val _ = Define ` + ((TrapVectorMode_of_num:int -> TrapVectorMode) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then TV_Direct + else if (((p0_ = (( 1 : int):ii)))) then TV_Vector + else TV_Reserved))`; + + +(*val num_of_TrapVectorMode : TrapVectorMode -> integer*) + +val _ = Define ` + ((num_of_TrapVectorMode:TrapVectorMode -> int) arg_= + ((case arg_ of TV_Direct => (( 0 : int):ii) | TV_Vector => (( 1 : int):ii) | TV_Reserved => (( 2 : int):ii) )))`; + + +(*val trapVectorMode_of_bits : mword ty2 -> TrapVectorMode*) + +val _ = Define ` + ((trapVectorMode_of_bits:(2)words$word -> TrapVectorMode) m= + (let b__0 = m in + if (((b__0 = (vec_of_bits [B0;B0] : 2 words$word)))) then TV_Direct + else if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then TV_Vector + else TV_Reserved))`; + + +(*val ExtStatus_of_num : integer -> ExtStatus*) + +val _ = Define ` + ((ExtStatus_of_num:int -> ExtStatus) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Off + else if (((p0_ = (( 1 : int):ii)))) then Initial + else if (((p0_ = (( 2 : int):ii)))) then Clean + else Dirty))`; + + +(*val num_of_ExtStatus : ExtStatus -> integer*) + +val _ = Define ` + ((num_of_ExtStatus:ExtStatus -> int) arg_= + ((case arg_ of Off => (( 0 : int):ii) | Initial => (( 1 : int):ii) | Clean => (( 2 : int):ii) | Dirty => (( 3 : int):ii) )))`; + + +(*val extStatus_to_bits : ExtStatus -> mword ty2*) + +val _ = Define ` + ((extStatus_to_bits:ExtStatus ->(2)words$word) e= + ((case e of + Off => (vec_of_bits [B0;B0] : 2 words$word) + | Initial => (vec_of_bits [B0;B1] : 2 words$word) + | Clean => (vec_of_bits [B1;B0] : 2 words$word) + | Dirty => (vec_of_bits [B1;B1] : 2 words$word) + )))`; + + +(*val extStatus_of_bits : mword ty2 -> M ExtStatus*) + +val _ = Define ` + ((extStatus_of_bits:(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((ExtStatus),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) e= + (let b__0 = e in + if (((b__0 = (vec_of_bits [B0;B0] : 2 words$word)))) then sail2_state_monad$returnS Off + else if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then sail2_state_monad$returnS Initial + else if (((b__0 = (vec_of_bits [B1;B0] : 2 words$word)))) then sail2_state_monad$returnS Clean + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then sail2_state_monad$returnS Dirty + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at model/riscv_types.sail 264:2 - 269:3") (sail2_state_monad$exitS () )))`; + + +(*val SATPMode_of_num : integer -> SATPMode*) + +val _ = Define ` + ((SATPMode_of_num:int -> SATPMode) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then Sbare + else if (((p0_ = (( 1 : int):ii)))) then Sv32 + else if (((p0_ = (( 2 : int):ii)))) then Sv39 + else Sv48))`; + + +(*val num_of_SATPMode : SATPMode -> integer*) + +val _ = Define ` + ((num_of_SATPMode:SATPMode -> int) arg_= + ((case arg_ of Sbare => (( 0 : int):ii) | Sv32 => (( 1 : int):ii) | Sv39 => (( 2 : int):ii) | Sv48 => (( 3 : int):ii) )))`; + + +(*val satp64Mode_of_bits : Architecture -> mword ty4 -> maybe SATPMode*) + +val _ = Define ` + ((satp64Mode_of_bits:Architecture ->(4)words$word ->(SATPMode)option) (a : Architecture) (m : satp_mode)= + ((case (a, m) of + (g__4, b__0) => + if (((b__0 = (vec_of_bits [B0;B0;B0;B0] : 4 words$word)))) then SOME Sbare + else + (case (g__4, b__0) of + (RV32, b__0) => + if (((b__0 = (vec_of_bits [B0;B0;B0;B1] : 4 words$word)))) then SOME Sv32 + else (case (RV32, b__0) of (_, _) => NONE ) + | (RV64, b__0) => + if (((b__0 = (vec_of_bits [B1;B0;B0;B0] : 4 words$word)))) then SOME Sv39 + else if (((b__0 = (vec_of_bits [B1;B0;B0;B1] : 4 words$word)))) then SOME Sv48 + else (case (RV64, b__0) of (_, _) => NONE ) + | (_, _) => NONE + ) + )))`; + + +(*val uop_of_num : integer -> uop*) + +val _ = Define ` + ((uop_of_num:int -> uop) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RISCV_LUI + else RISCV_AUIPC))`; + + +(*val num_of_uop : uop -> integer*) + +val _ = Define ` + ((num_of_uop:uop -> int) arg_= ((case arg_ of RISCV_LUI => (( 0 : int):ii) | RISCV_AUIPC => (( 1 : int):ii) )))`; + + +(*val bop_of_num : integer -> bop*) + +val _ = Define ` + ((bop_of_num:int -> bop) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RISCV_BEQ + else if (((p0_ = (( 1 : int):ii)))) then RISCV_BNE + else if (((p0_ = (( 2 : int):ii)))) then RISCV_BLT + else if (((p0_ = (( 3 : int):ii)))) then RISCV_BGE + else if (((p0_ = (( 4 : int):ii)))) then RISCV_BLTU + else RISCV_BGEU))`; + + +(*val num_of_bop : bop -> integer*) + +val _ = Define ` + ((num_of_bop:bop -> int) arg_= + ((case arg_ of + RISCV_BEQ => (( 0 : int):ii) + | RISCV_BNE => (( 1 : int):ii) + | RISCV_BLT => (( 2 : int):ii) + | RISCV_BGE => (( 3 : int):ii) + | RISCV_BLTU => (( 4 : int):ii) + | RISCV_BGEU => (( 5 : int):ii) + )))`; + + +(*val iop_of_num : integer -> iop*) + +val _ = Define ` + ((iop_of_num:int -> iop) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RISCV_ADDI + else if (((p0_ = (( 1 : int):ii)))) then RISCV_SLTI + else if (((p0_ = (( 2 : int):ii)))) then RISCV_SLTIU + else if (((p0_ = (( 3 : int):ii)))) then RISCV_XORI + else if (((p0_ = (( 4 : int):ii)))) then RISCV_ORI + else RISCV_ANDI))`; + + +(*val num_of_iop : iop -> integer*) + +val _ = Define ` + ((num_of_iop:iop -> int) arg_= + ((case arg_ of + RISCV_ADDI => (( 0 : int):ii) + | RISCV_SLTI => (( 1 : int):ii) + | RISCV_SLTIU => (( 2 : int):ii) + | RISCV_XORI => (( 3 : int):ii) + | RISCV_ORI => (( 4 : int):ii) + | RISCV_ANDI => (( 5 : int):ii) + )))`; + + +(*val sop_of_num : integer -> sop*) + +val _ = Define ` + ((sop_of_num:int -> sop) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RISCV_SLLI + else if (((p0_ = (( 1 : int):ii)))) then RISCV_SRLI + else RISCV_SRAI))`; + + +(*val num_of_sop : sop -> integer*) + +val _ = Define ` + ((num_of_sop:sop -> int) arg_= + ((case arg_ of RISCV_SLLI => (( 0 : int):ii) | RISCV_SRLI => (( 1 : int):ii) | RISCV_SRAI => (( 2 : int):ii) )))`; + + +(*val rop_of_num : integer -> rop*) + +val _ = Define ` + ((rop_of_num:int -> rop) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RISCV_ADD + else if (((p0_ = (( 1 : int):ii)))) then RISCV_SUB + else if (((p0_ = (( 2 : int):ii)))) then RISCV_SLL + else if (((p0_ = (( 3 : int):ii)))) then RISCV_SLT + else if (((p0_ = (( 4 : int):ii)))) then RISCV_SLTU + else if (((p0_ = (( 5 : int):ii)))) then RISCV_XOR + else if (((p0_ = (( 6 : int):ii)))) then RISCV_SRL + else if (((p0_ = (( 7 : int):ii)))) then RISCV_SRA + else if (((p0_ = (( 8 : int):ii)))) then RISCV_OR + else RISCV_AND))`; + + +(*val num_of_rop : rop -> integer*) + +val _ = Define ` + ((num_of_rop:rop -> int) arg_= + ((case arg_ of + RISCV_ADD => (( 0 : int):ii) + | RISCV_SUB => (( 1 : int):ii) + | RISCV_SLL => (( 2 : int):ii) + | RISCV_SLT => (( 3 : int):ii) + | RISCV_SLTU => (( 4 : int):ii) + | RISCV_XOR => (( 5 : int):ii) + | RISCV_SRL => (( 6 : int):ii) + | RISCV_SRA => (( 7 : int):ii) + | RISCV_OR => (( 8 : int):ii) + | RISCV_AND => (( 9 : int):ii) + )))`; + + +(*val ropw_of_num : integer -> ropw*) + +val _ = Define ` + ((ropw_of_num:int -> ropw) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RISCV_ADDW + else if (((p0_ = (( 1 : int):ii)))) then RISCV_SUBW + else if (((p0_ = (( 2 : int):ii)))) then RISCV_SLLW + else if (((p0_ = (( 3 : int):ii)))) then RISCV_SRLW + else RISCV_SRAW))`; + + +(*val num_of_ropw : ropw -> integer*) + +val _ = Define ` + ((num_of_ropw:ropw -> int) arg_= + ((case arg_ of + RISCV_ADDW => (( 0 : int):ii) + | RISCV_SUBW => (( 1 : int):ii) + | RISCV_SLLW => (( 2 : int):ii) + | RISCV_SRLW => (( 3 : int):ii) + | RISCV_SRAW => (( 4 : int):ii) + )))`; + + +(*val sopw_of_num : integer -> sopw*) + +val _ = Define ` + ((sopw_of_num:int -> sopw) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then RISCV_SLLIW + else if (((p0_ = (( 1 : int):ii)))) then RISCV_SRLIW + else RISCV_SRAIW))`; + + +(*val num_of_sopw : sopw -> integer*) + +val _ = Define ` + ((num_of_sopw:sopw -> int) arg_= + ((case arg_ of RISCV_SLLIW => (( 0 : int):ii) | RISCV_SRLIW => (( 1 : int):ii) | RISCV_SRAIW => (( 2 : int):ii) )))`; + + +(*val amoop_of_num : integer -> amoop*) + +val _ = Define ` + ((amoop_of_num:int -> amoop) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then AMOSWAP + else if (((p0_ = (( 1 : int):ii)))) then AMOADD + else if (((p0_ = (( 2 : int):ii)))) then AMOXOR + else if (((p0_ = (( 3 : int):ii)))) then AMOAND + else if (((p0_ = (( 4 : int):ii)))) then AMOOR + else if (((p0_ = (( 5 : int):ii)))) then AMOMIN + else if (((p0_ = (( 6 : int):ii)))) then AMOMAX + else if (((p0_ = (( 7 : int):ii)))) then AMOMINU + else AMOMAXU))`; + + +(*val num_of_amoop : amoop -> integer*) + +val _ = Define ` + ((num_of_amoop:amoop -> int) arg_= + ((case arg_ of + AMOSWAP => (( 0 : int):ii) + | AMOADD => (( 1 : int):ii) + | AMOXOR => (( 2 : int):ii) + | AMOAND => (( 3 : int):ii) + | AMOOR => (( 4 : int):ii) + | AMOMIN => (( 5 : int):ii) + | AMOMAX => (( 6 : int):ii) + | AMOMINU => (( 7 : int):ii) + | AMOMAXU => (( 8 : int):ii) + )))`; + + +(*val csrop_of_num : integer -> csrop*) + +val _ = Define ` + ((csrop_of_num:int -> csrop) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then CSRRW + else if (((p0_ = (( 1 : int):ii)))) then CSRRS + else CSRRC))`; + + +(*val num_of_csrop : csrop -> integer*) + +val _ = Define ` + ((num_of_csrop:csrop -> int) arg_= ((case arg_ of CSRRW => (( 0 : int):ii) | CSRRS => (( 1 : int):ii) | CSRRC => (( 2 : int):ii) )))`; + + +(*val sep_forwards : unit -> string*) + +val _ = Define ` + ((sep_forwards:unit -> string) arg_= + ((case arg_ of + () => + string_append ((opt_spc_forwards () )) + ((string_append "," ((string_append ((def_spc_forwards () )) "")))) + )))`; + + +(*val sep_backwards : string -> M unit*) + +(*val _s0_ : string -> maybe unit*) + +val _ = Define ` + ((s0_:string ->(unit)option) s1_0= + ((case s1_0 of + s2_0 => + (case ((opt_spc_matches_prefix0 s2_0)) of + SOME ((() , s3_0)) => + let s4_0 = (string_drop s2_0 s3_0) in + if ((string_startswith s4_0 ",")) then + (case ((string_drop s4_0 ((string_length ",")))) of + s5_0 => + (case ((def_spc_matches_prefix s5_0)) of + SOME ((() , s6_0)) => + let p0_ = (string_drop s5_0 s6_0) in + if (((p0_ = ""))) then SOME () else NONE + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((sep_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let s7_0 = arg_ in + if ((case ((s0_ s7_0)) of SOME (() ) => T | _ => F )) then + (case s0_ s7_0 of (SOME (() )) => sail2_state_monad$returnS () ) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val sep_forwards_matches : unit -> bool*) + +val _ = Define ` + ((sep_forwards_matches:unit -> bool) arg_= + ((case arg_ of () => T )))`; + + +(*val sep_backwards_matches : string -> bool*) + +(*val _s8_ : string -> maybe unit*) + +val _ = Define ` + ((s8_:string ->(unit)option) s9_0= + ((case s9_0 of + s10_0 => + (case ((opt_spc_matches_prefix0 s10_0)) of + SOME ((() , s11_0)) => + let s12_0 = (string_drop s10_0 s11_0) in + if ((string_startswith s12_0 ",")) then + (case ((string_drop s12_0 ((string_length ",")))) of + s13_0 => + (case ((def_spc_matches_prefix s13_0)) of + SOME ((() , s14_0)) => + let p0_ = (string_drop s13_0 s14_0) in + if (((p0_ = ""))) then SOME () else NONE + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((sep_backwards_matches:string -> bool) arg_= + (let s15_0 = arg_ in + if ((case ((s8_ s15_0)) of SOME (() ) => T | _ => F )) then + (case s8_ s15_0 of (SOME (() )) => T ) + else F))`; + + +(*val sep_matches_prefix : string -> maybe ((unit * ii))*) + +(*val _s16_ : string -> maybe string*) + +val _ = Define ` + ((s16_:string ->(string)option) s17_0= + ((case s17_0 of + s18_0 => + (case ((opt_spc_matches_prefix0 s18_0)) of + SOME ((() , s19_0)) => + let s20_0 = (string_drop s18_0 s19_0) in + if ((string_startswith s20_0 ",")) then + (case ((string_drop s20_0 ((string_length ",")))) of + s21_0 => + (case ((def_spc_matches_prefix s21_0)) of + SOME ((() , s22_0)) => + (case ((string_drop s21_0 s22_0)) of s_ => SOME s_ ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((sep_matches_prefix:string ->(unit#int)option) arg_= + (let s23_0 = arg_ in + if ((case ((s16_ s23_0)) of SOME (s_) => T | _ => F )) then + (case s16_ s23_0 of + (SOME (s_)) => + SOME (() , ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val bool_bits_forwards : bool -> mword ty1*) + +val _ = Define ` + ((bool_bits_forwards:bool ->(1)words$word) arg_= + ((case arg_ of + T => (vec_of_bits [B1] : 1 words$word) + | F => (vec_of_bits [B0] : 1 words$word) + )))`; + + +(*val bool_bits_backwards : mword ty1 -> M bool*) + +val _ = Define ` + ((bool_bits_backwards:(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then sail2_state_monad$returnS T + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then sail2_state_monad$returnS F + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bool_bits_forwards_matches : bool -> bool*) + +val _ = Define ` + ((bool_bits_forwards_matches:bool -> bool) arg_= + ((case arg_ of T => T | F => T )))`; + + +(*val bool_bits_backwards_matches : mword ty1 -> bool*) + +val _ = Define ` + ((bool_bits_backwards_matches:(1)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then T + else F))`; + + +(*val bool_not_bits_forwards : bool -> mword ty1*) + +val _ = Define ` + ((bool_not_bits_forwards:bool ->(1)words$word) arg_= + ((case arg_ of + T => (vec_of_bits [B0] : 1 words$word) + | F => (vec_of_bits [B1] : 1 words$word) + )))`; + + +(*val bool_not_bits_backwards : mword ty1 -> M bool*) + +val _ = Define ` + ((bool_not_bits_backwards:(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then sail2_state_monad$returnS T + else if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then sail2_state_monad$returnS F + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bool_not_bits_forwards_matches : bool -> bool*) + +val _ = Define ` + ((bool_not_bits_forwards_matches:bool -> bool) arg_= + ((case arg_ of T => T | F => T )))`; + + +(*val bool_not_bits_backwards_matches : mword ty1 -> bool*) + +val _ = Define ` + ((bool_not_bits_backwards_matches:(1)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then T + else F))`; + + +(*val size_bits_forwards : word_width -> mword ty2*) + +val _ = Define ` + ((size_bits_forwards:word_width ->(2)words$word) arg_= + ((case arg_ of + BYTE => (vec_of_bits [B0;B0] : 2 words$word) + | HALF => (vec_of_bits [B0;B1] : 2 words$word) + | WORD => (vec_of_bits [B1;B0] : 2 words$word) + | DOUBLE => (vec_of_bits [B1;B1] : 2 words$word) + )))`; + + +(*val size_bits_backwards : mword ty2 -> M word_width*) + +val _ = Define ` + ((size_bits_backwards:(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((word_width),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0] : 2 words$word)))) then sail2_state_monad$returnS BYTE + else if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then sail2_state_monad$returnS HALF + else if (((b__0 = (vec_of_bits [B1;B0] : 2 words$word)))) then sail2_state_monad$returnS WORD + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then sail2_state_monad$returnS DOUBLE + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val size_bits_forwards_matches : word_width -> bool*) + +val _ = Define ` + ((size_bits_forwards_matches:word_width -> bool) arg_= + ((case arg_ of BYTE => T | HALF => T | WORD => T | DOUBLE => T )))`; + + +(*val size_bits_backwards_matches : mword ty2 -> bool*) + +val _ = Define ` + ((size_bits_backwards_matches:(2)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0] : 2 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0] : 2 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then T + else F))`; + + +(*val size_mnemonic_forwards : word_width -> string*) + +val _ = Define ` + ((size_mnemonic_forwards:word_width -> string) arg_= + ((case arg_ of BYTE => "b" | HALF => "h" | WORD => "w" | DOUBLE => "d" )))`; + + +(*val size_mnemonic_backwards : string -> M word_width*) + +val _ = Define ` + ((size_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((word_width),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "b"))) then sail2_state_monad$returnS BYTE + else if (((p0_ = "h"))) then sail2_state_monad$returnS HALF + else if (((p0_ = "w"))) then sail2_state_monad$returnS WORD + else if (((p0_ = "d"))) then sail2_state_monad$returnS DOUBLE + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val size_mnemonic_forwards_matches : word_width -> bool*) + +val _ = Define ` + ((size_mnemonic_forwards_matches:word_width -> bool) arg_= + ((case arg_ of BYTE => T | HALF => T | WORD => T | DOUBLE => T )))`; + + +(*val size_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((size_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "b"))) then T + else if (((p0_ = "h"))) then T + else if (((p0_ = "w"))) then T + else if (((p0_ = "d"))) then T + else F))`; + + +(*val size_mnemonic_matches_prefix : string -> maybe ((word_width * ii))*) + +(*val _s36_ : string -> maybe string*) + +val _ = Define ` + ((s36_:string ->(string)option) s37_0= + (let s38_0 = s37_0 in + if ((string_startswith s38_0 "d")) then + (case ((string_drop s38_0 ((string_length "d")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s32_ : string -> maybe string*) + +val _ = Define ` + ((s32_:string ->(string)option) s33_0= + (let s34_0 = s33_0 in + if ((string_startswith s34_0 "w")) then + (case ((string_drop s34_0 ((string_length "w")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s28_ : string -> maybe string*) + +val _ = Define ` + ((s28_:string ->(string)option) s29_0= + (let s30_0 = s29_0 in + if ((string_startswith s30_0 "h")) then + (case ((string_drop s30_0 ((string_length "h")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s24_ : string -> maybe string*) + +val _ = Define ` + ((s24_:string ->(string)option) s25_0= + (let s26_0 = s25_0 in + if ((string_startswith s26_0 "b")) then + (case ((string_drop s26_0 ((string_length "b")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((size_mnemonic_matches_prefix:string ->(word_width#int)option) arg_= + (let s27_0 = arg_ in + if ((case ((s24_ s27_0)) of SOME (s_) => T | _ => F )) then + (case s24_ s27_0 of + (SOME (s_)) => + SOME (BYTE, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s28_ s27_0)) of SOME (s_) => T | _ => F )) then + (case s28_ s27_0 of + (SOME (s_)) => + SOME (HALF, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s32_ s27_0)) of SOME (s_) => T | _ => F )) then + (case s32_ s27_0 of + (SOME (s_)) => + SOME (WORD, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s36_ s27_0)) of SOME (s_) => T | _ => F )) then + (case s36_ s27_0 of + (SOME (s_)) => + SOME (DOUBLE, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val word_width_bytes : word_width -> integer*) + +val _ = Define ` + ((word_width_bytes:word_width -> int) width= + ((case width of BYTE => (( 1 : int):ii) | HALF => (( 2 : int):ii) | WORD => (( 4 : int):ii) | DOUBLE => (( 8 : int):ii) )))`; + + +val _ = Define ` +((zero_reg:(32)words$word)= ((EXTZ (( 32 : int):ii) (vec_of_bits [B0;B0;B0;B0] : 4 words$word) : 32 words$word)))`; + + +(*val RegStr : mword ty32 -> string*) + +val _ = Define ` + ((RegStr:(32)words$word -> string) r= (string_of_bits r))`; + + +(*val regval_from_reg : mword ty32 -> mword ty32*) + +val _ = Define ` + ((regval_from_reg:(32)words$word ->(32)words$word) r= r)`; + + +(*val regval_into_reg : mword ty32 -> mword ty32*) + +val _ = Define ` + ((regval_into_reg:(32)words$word ->(32)words$word) v= v)`; + + +(*val rX : integer -> M (mword ty32)*) + +val _ = Define ` + ((rX:int ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r= + (let p0_ = r in sail2_state_monad$bindS + (if (((p0_ = (( 0 : int):ii)))) then sail2_state_monad$returnS zero_reg + else if (((p0_ = (( 1 : int):ii)))) then (sail2_state_monad$read_regS x1_ref : ( 32 words$word) M) + else if (((p0_ = (( 2 : int):ii)))) then (sail2_state_monad$read_regS x2_ref : ( 32 words$word) M) + else if (((p0_ = (( 3 : int):ii)))) then (sail2_state_monad$read_regS x3_ref : ( 32 words$word) M) + else if (((p0_ = (( 4 : int):ii)))) then (sail2_state_monad$read_regS x4_ref : ( 32 words$word) M) + else if (((p0_ = (( 5 : int):ii)))) then (sail2_state_monad$read_regS x5_ref : ( 32 words$word) M) + else if (((p0_ = (( 6 : int):ii)))) then (sail2_state_monad$read_regS x6_ref : ( 32 words$word) M) + else if (((p0_ = (( 7 : int):ii)))) then (sail2_state_monad$read_regS x7_ref : ( 32 words$word) M) + else if (((p0_ = (( 8 : int):ii)))) then (sail2_state_monad$read_regS x8_ref : ( 32 words$word) M) + else if (((p0_ = (( 9 : int):ii)))) then (sail2_state_monad$read_regS x9_ref : ( 32 words$word) M) + else if (((p0_ = (( 10 : int):ii)))) then (sail2_state_monad$read_regS x10_ref : ( 32 words$word) M) + else if (((p0_ = (( 11 : int):ii)))) then (sail2_state_monad$read_regS x11_ref : ( 32 words$word) M) + else if (((p0_ = (( 12 : int):ii)))) then (sail2_state_monad$read_regS x12_ref : ( 32 words$word) M) + else if (((p0_ = (( 13 : int):ii)))) then (sail2_state_monad$read_regS x13_ref : ( 32 words$word) M) + else if (((p0_ = (( 14 : int):ii)))) then (sail2_state_monad$read_regS x14_ref : ( 32 words$word) M) + else if (((p0_ = (( 15 : int):ii)))) then (sail2_state_monad$read_regS x15_ref : ( 32 words$word) M) + else if (((p0_ = (( 16 : int):ii)))) then (sail2_state_monad$read_regS x16_ref : ( 32 words$word) M) + else if (((p0_ = (( 17 : int):ii)))) then (sail2_state_monad$read_regS x17_ref : ( 32 words$word) M) + else if (((p0_ = (( 18 : int):ii)))) then (sail2_state_monad$read_regS x18_ref : ( 32 words$word) M) + else if (((p0_ = (( 19 : int):ii)))) then (sail2_state_monad$read_regS x19_ref : ( 32 words$word) M) + else if (((p0_ = (( 20 : int):ii)))) then (sail2_state_monad$read_regS x20_ref : ( 32 words$word) M) + else if (((p0_ = (( 21 : int):ii)))) then (sail2_state_monad$read_regS x21_ref : ( 32 words$word) M) + else if (((p0_ = (( 22 : int):ii)))) then (sail2_state_monad$read_regS x22_ref : ( 32 words$word) M) + else if (((p0_ = (( 23 : int):ii)))) then (sail2_state_monad$read_regS x23_ref : ( 32 words$word) M) + else if (((p0_ = (( 24 : int):ii)))) then (sail2_state_monad$read_regS x24_ref : ( 32 words$word) M) + else if (((p0_ = (( 25 : int):ii)))) then (sail2_state_monad$read_regS x25_ref : ( 32 words$word) M) + else if (((p0_ = (( 26 : int):ii)))) then (sail2_state_monad$read_regS x26_ref : ( 32 words$word) M) + else if (((p0_ = (( 27 : int):ii)))) then (sail2_state_monad$read_regS x27_ref : ( 32 words$word) M) + else if (((p0_ = (( 28 : int):ii)))) then (sail2_state_monad$read_regS x28_ref : ( 32 words$word) M) + else if (((p0_ = (( 29 : int):ii)))) then (sail2_state_monad$read_regS x29_ref : ( 32 words$word) M) + else if (((p0_ = (( 30 : int):ii)))) then (sail2_state_monad$read_regS x30_ref : ( 32 words$word) M) + else if (((p0_ = (( 31 : int):ii)))) then (sail2_state_monad$read_regS x31_ref : ( 32 words$word) M) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "invalid register number") (sail2_state_monad$exitS () )) (\ (v : regtype) . + sail2_state_monad$returnS ((regval_from_reg v : 32 words$word)))))`; + + +(*val rvfi_wX : integer -> mword ty32 -> unit*) + +val _ = Define ` + ((rvfi_wX:int ->(32)words$word -> unit) r v= () )`; + + +(*val wX : integer -> mword ty32 -> M unit*) + +val _ = Define ` + ((wX:int ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r in_v= + (let v = ((regval_into_reg in_v : 32 words$word)) in + let p0_ = r in sail2_state_monad$seqS + (if (((p0_ = (( 0 : int):ii)))) then sail2_state_monad$returnS () + else if (((p0_ = (( 1 : int):ii)))) then sail2_state_monad$write_regS x1_ref v + else if (((p0_ = (( 2 : int):ii)))) then sail2_state_monad$write_regS x2_ref v + else if (((p0_ = (( 3 : int):ii)))) then sail2_state_monad$write_regS x3_ref v + else if (((p0_ = (( 4 : int):ii)))) then sail2_state_monad$write_regS x4_ref v + else if (((p0_ = (( 5 : int):ii)))) then sail2_state_monad$write_regS x5_ref v + else if (((p0_ = (( 6 : int):ii)))) then sail2_state_monad$write_regS x6_ref v + else if (((p0_ = (( 7 : int):ii)))) then sail2_state_monad$write_regS x7_ref v + else if (((p0_ = (( 8 : int):ii)))) then sail2_state_monad$write_regS x8_ref v + else if (((p0_ = (( 9 : int):ii)))) then sail2_state_monad$write_regS x9_ref v + else if (((p0_ = (( 10 : int):ii)))) then sail2_state_monad$write_regS x10_ref v + else if (((p0_ = (( 11 : int):ii)))) then sail2_state_monad$write_regS x11_ref v + else if (((p0_ = (( 12 : int):ii)))) then sail2_state_monad$write_regS x12_ref v + else if (((p0_ = (( 13 : int):ii)))) then sail2_state_monad$write_regS x13_ref v + else if (((p0_ = (( 14 : int):ii)))) then sail2_state_monad$write_regS x14_ref v + else if (((p0_ = (( 15 : int):ii)))) then sail2_state_monad$write_regS x15_ref v + else if (((p0_ = (( 16 : int):ii)))) then sail2_state_monad$write_regS x16_ref v + else if (((p0_ = (( 17 : int):ii)))) then sail2_state_monad$write_regS x17_ref v + else if (((p0_ = (( 18 : int):ii)))) then sail2_state_monad$write_regS x18_ref v + else if (((p0_ = (( 19 : int):ii)))) then sail2_state_monad$write_regS x19_ref v + else if (((p0_ = (( 20 : int):ii)))) then sail2_state_monad$write_regS x20_ref v + else if (((p0_ = (( 21 : int):ii)))) then sail2_state_monad$write_regS x21_ref v + else if (((p0_ = (( 22 : int):ii)))) then sail2_state_monad$write_regS x22_ref v + else if (((p0_ = (( 23 : int):ii)))) then sail2_state_monad$write_regS x23_ref v + else if (((p0_ = (( 24 : int):ii)))) then sail2_state_monad$write_regS x24_ref v + else if (((p0_ = (( 25 : int):ii)))) then sail2_state_monad$write_regS x25_ref v + else if (((p0_ = (( 26 : int):ii)))) then sail2_state_monad$write_regS x26_ref v + else if (((p0_ = (( 27 : int):ii)))) then sail2_state_monad$write_regS x27_ref v + else if (((p0_ = (( 28 : int):ii)))) then sail2_state_monad$write_regS x28_ref v + else if (((p0_ = (( 29 : int):ii)))) then sail2_state_monad$write_regS x29_ref v + else if (((p0_ = (( 30 : int):ii)))) then sail2_state_monad$write_regS x30_ref v + else if (((p0_ = (( 31 : int):ii)))) then sail2_state_monad$write_regS x31_ref v + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "invalid register number") (sail2_state_monad$exitS () )) + (sail2_state_monad$returnS (if (((r <> (( 0 : int):ii)))) then + let (_ : unit) = (rvfi_wX r in_v) in + if ((get_config_print_reg () )) then + print_dbg + ((STRCAT "x" + ((STRCAT ((stringFromInteger r)) ((STRCAT " <- " ((RegStr v)))))))) + else () + else () ))))`; + + +(*val reg_name_abi : mword ty5 -> M string*) + +val _ = Define ` + ((reg_name_abi:(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r= + (let b__0 = r in + if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))))) + then + sail2_state_monad$returnS "zero" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "ra" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "sp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "gp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "tp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t0" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "t1" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t2" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "fp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s1" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a0" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a1" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a2" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a3" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a4" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a5" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a6" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a7" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s2" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s3" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s4" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s5" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s6" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s7" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s8" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s9" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s10" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s11" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "t3" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t4" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "t5" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t6" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at model/riscv_regs.sail 149:2 - 182:3") (sail2_state_monad$exitS () )))`; + + +(*val reg_name_forwards : mword ty5 -> M string*) + +val _ = Define ` + ((reg_name_forwards:(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))))) + then + sail2_state_monad$returnS "zero" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "ra" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "sp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "gp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "tp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t0" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "t1" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t2" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "fp" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s1" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a0" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a1" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a2" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a3" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a4" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a5" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "a6" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "a7" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s2" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s3" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s4" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s5" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s6" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s7" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s8" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s9" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "s10" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "s11" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "t3" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t4" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : 5 words$word)))))) then + sail2_state_monad$returnS "t5" + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : 5 words$word)))))) then + sail2_state_monad$returnS "t6" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val reg_name_backwards : string -> M (mword ty5)*) + +val _ = Define ` + ((reg_name_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((5)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "zero"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + else if (((p0_ = "ra"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word) + else if (((p0_ = "sp"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word) + else if (((p0_ = "gp"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word) + else if (((p0_ = "tp"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word) + else if (((p0_ = "t0"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B0;B1] : 5 words$word) + else if (((p0_ = "t1"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0] : 5 words$word) + else if (((p0_ = "t2"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1] : 5 words$word) + else if (((p0_ = "fp"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word) + else if (((p0_ = "s1"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B0;B0;B1] : 5 words$word) + else if (((p0_ = "a0"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B0;B1;B0] : 5 words$word) + else if (((p0_ = "a1"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B0;B1;B1] : 5 words$word) + else if (((p0_ = "a2"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word) + else if (((p0_ = "a3"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B0;B1] : 5 words$word) + else if (((p0_ = "a4"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B1;B0] : 5 words$word) + else if (((p0_ = "a5"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B1;B1] : 5 words$word) + else if (((p0_ = "a6"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word) + else if (((p0_ = "a7"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B0;B0;B1] : 5 words$word) + else if (((p0_ = "s2"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B0;B1;B0] : 5 words$word) + else if (((p0_ = "s3"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B0;B1;B1] : 5 words$word) + else if (((p0_ = "s4"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word) + else if (((p0_ = "s5"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B0;B1] : 5 words$word) + else if (((p0_ = "s6"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B1;B0] : 5 words$word) + else if (((p0_ = "s7"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B1;B1] : 5 words$word) + else if (((p0_ = "s8"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word) + else if (((p0_ = "s9"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B1] : 5 words$word) + else if (((p0_ = "s10"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B1;B0] : 5 words$word) + else if (((p0_ = "s11"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B1;B1] : 5 words$word) + else if (((p0_ = "t3"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word) + else if (((p0_ = "t4"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B0;B1] : 5 words$word) + else if (((p0_ = "t5"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B1;B0] : 5 words$word) + else if (((p0_ = "t6"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B1;B1] : 5 words$word) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val reg_name_forwards_matches : mword ty5 -> bool*) + +val _ = Define ` + ((reg_name_forwards_matches:(5)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))))) + then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : 5 words$word)))))) then + T + else F))`; + + +(*val reg_name_backwards_matches : string -> bool*) + +val _ = Define ` + ((reg_name_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "zero"))) then T + else if (((p0_ = "ra"))) then T + else if (((p0_ = "sp"))) then T + else if (((p0_ = "gp"))) then T + else if (((p0_ = "tp"))) then T + else if (((p0_ = "t0"))) then T + else if (((p0_ = "t1"))) then T + else if (((p0_ = "t2"))) then T + else if (((p0_ = "fp"))) then T + else if (((p0_ = "s1"))) then T + else if (((p0_ = "a0"))) then T + else if (((p0_ = "a1"))) then T + else if (((p0_ = "a2"))) then T + else if (((p0_ = "a3"))) then T + else if (((p0_ = "a4"))) then T + else if (((p0_ = "a5"))) then T + else if (((p0_ = "a6"))) then T + else if (((p0_ = "a7"))) then T + else if (((p0_ = "s2"))) then T + else if (((p0_ = "s3"))) then T + else if (((p0_ = "s4"))) then T + else if (((p0_ = "s5"))) then T + else if (((p0_ = "s6"))) then T + else if (((p0_ = "s7"))) then T + else if (((p0_ = "s8"))) then T + else if (((p0_ = "s9"))) then T + else if (((p0_ = "s10"))) then T + else if (((p0_ = "s11"))) then T + else if (((p0_ = "t3"))) then T + else if (((p0_ = "t4"))) then T + else if (((p0_ = "t5"))) then T + else if (((p0_ = "t6"))) then T + else F))`; + + +(*val reg_name_matches_prefix : string -> maybe ((mword ty5 * ii))*) + +(*val _s164_ : string -> maybe string*) + +val _ = Define ` + ((s164_:string ->(string)option) s165_0= + (let s166_0 = s165_0 in + if ((string_startswith s166_0 "t6")) then + (case ((string_drop s166_0 ((string_length "t6")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s160_ : string -> maybe string*) + +val _ = Define ` + ((s160_:string ->(string)option) s161_0= + (let s162_0 = s161_0 in + if ((string_startswith s162_0 "t5")) then + (case ((string_drop s162_0 ((string_length "t5")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s156_ : string -> maybe string*) + +val _ = Define ` + ((s156_:string ->(string)option) s157_0= + (let s158_0 = s157_0 in + if ((string_startswith s158_0 "t4")) then + (case ((string_drop s158_0 ((string_length "t4")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s152_ : string -> maybe string*) + +val _ = Define ` + ((s152_:string ->(string)option) s153_0= + (let s154_0 = s153_0 in + if ((string_startswith s154_0 "t3")) then + (case ((string_drop s154_0 ((string_length "t3")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s148_ : string -> maybe string*) + +val _ = Define ` + ((s148_:string ->(string)option) s149_0= + (let s150_0 = s149_0 in + if ((string_startswith s150_0 "s11")) then + (case ((string_drop s150_0 ((string_length "s11")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s144_ : string -> maybe string*) + +val _ = Define ` + ((s144_:string ->(string)option) s145_0= + (let s146_0 = s145_0 in + if ((string_startswith s146_0 "s10")) then + (case ((string_drop s146_0 ((string_length "s10")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s140_ : string -> maybe string*) + +val _ = Define ` + ((s140_:string ->(string)option) s141_0= + (let s142_0 = s141_0 in + if ((string_startswith s142_0 "s9")) then + (case ((string_drop s142_0 ((string_length "s9")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s136_ : string -> maybe string*) + +val _ = Define ` + ((s136_:string ->(string)option) s137_0= + (let s138_0 = s137_0 in + if ((string_startswith s138_0 "s8")) then + (case ((string_drop s138_0 ((string_length "s8")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s132_ : string -> maybe string*) + +val _ = Define ` + ((s132_:string ->(string)option) s133_0= + (let s134_0 = s133_0 in + if ((string_startswith s134_0 "s7")) then + (case ((string_drop s134_0 ((string_length "s7")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s128_ : string -> maybe string*) + +val _ = Define ` + ((s128_:string ->(string)option) s129_0= + (let s130_0 = s129_0 in + if ((string_startswith s130_0 "s6")) then + (case ((string_drop s130_0 ((string_length "s6")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s124_ : string -> maybe string*) + +val _ = Define ` + ((s124_:string ->(string)option) s125_0= + (let s126_0 = s125_0 in + if ((string_startswith s126_0 "s5")) then + (case ((string_drop s126_0 ((string_length "s5")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s120_ : string -> maybe string*) + +val _ = Define ` + ((s120_:string ->(string)option) s121_0= + (let s122_0 = s121_0 in + if ((string_startswith s122_0 "s4")) then + (case ((string_drop s122_0 ((string_length "s4")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s116_ : string -> maybe string*) + +val _ = Define ` + ((s116_:string ->(string)option) s117_0= + (let s118_0 = s117_0 in + if ((string_startswith s118_0 "s3")) then + (case ((string_drop s118_0 ((string_length "s3")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s112_ : string -> maybe string*) + +val _ = Define ` + ((s112_:string ->(string)option) s113_0= + (let s114_0 = s113_0 in + if ((string_startswith s114_0 "s2")) then + (case ((string_drop s114_0 ((string_length "s2")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s108_ : string -> maybe string*) + +val _ = Define ` + ((s108_:string ->(string)option) s109_0= + (let s110_0 = s109_0 in + if ((string_startswith s110_0 "a7")) then + (case ((string_drop s110_0 ((string_length "a7")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s104_ : string -> maybe string*) + +val _ = Define ` + ((s104_:string ->(string)option) s105_0= + (let s106_0 = s105_0 in + if ((string_startswith s106_0 "a6")) then + (case ((string_drop s106_0 ((string_length "a6")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s100_ : string -> maybe string*) + +val _ = Define ` + ((s100_:string ->(string)option) s101_0= + (let s102_0 = s101_0 in + if ((string_startswith s102_0 "a5")) then + (case ((string_drop s102_0 ((string_length "a5")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s96_ : string -> maybe string*) + +val _ = Define ` + ((s96_:string ->(string)option) s97_0= + (let s98_0 = s97_0 in + if ((string_startswith s98_0 "a4")) then + (case ((string_drop s98_0 ((string_length "a4")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s92_ : string -> maybe string*) + +val _ = Define ` + ((s92_:string ->(string)option) s93_0= + (let s94_0 = s93_0 in + if ((string_startswith s94_0 "a3")) then + (case ((string_drop s94_0 ((string_length "a3")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s88_ : string -> maybe string*) + +val _ = Define ` + ((s88_:string ->(string)option) s89_0= + (let s90_0 = s89_0 in + if ((string_startswith s90_0 "a2")) then + (case ((string_drop s90_0 ((string_length "a2")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s84_ : string -> maybe string*) + +val _ = Define ` + ((s84_:string ->(string)option) s85_0= + (let s86_0 = s85_0 in + if ((string_startswith s86_0 "a1")) then + (case ((string_drop s86_0 ((string_length "a1")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s80_ : string -> maybe string*) + +val _ = Define ` + ((s80_:string ->(string)option) s81_0= + (let s82_0 = s81_0 in + if ((string_startswith s82_0 "a0")) then + (case ((string_drop s82_0 ((string_length "a0")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s76_ : string -> maybe string*) + +val _ = Define ` + ((s76_:string ->(string)option) s77_0= + (let s78_0 = s77_0 in + if ((string_startswith s78_0 "s1")) then + (case ((string_drop s78_0 ((string_length "s1")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s72_ : string -> maybe string*) + +val _ = Define ` + ((s72_:string ->(string)option) s73_0= + (let s74_0 = s73_0 in + if ((string_startswith s74_0 "fp")) then + (case ((string_drop s74_0 ((string_length "fp")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s68_ : string -> maybe string*) + +val _ = Define ` + ((s68_:string ->(string)option) s69_0= + (let s70_0 = s69_0 in + if ((string_startswith s70_0 "t2")) then + (case ((string_drop s70_0 ((string_length "t2")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s64_ : string -> maybe string*) + +val _ = Define ` + ((s64_:string ->(string)option) s65_0= + (let s66_0 = s65_0 in + if ((string_startswith s66_0 "t1")) then + (case ((string_drop s66_0 ((string_length "t1")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s60_ : string -> maybe string*) + +val _ = Define ` + ((s60_:string ->(string)option) s61_0= + (let s62_0 = s61_0 in + if ((string_startswith s62_0 "t0")) then + (case ((string_drop s62_0 ((string_length "t0")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s56_ : string -> maybe string*) + +val _ = Define ` + ((s56_:string ->(string)option) s57_0= + (let s58_0 = s57_0 in + if ((string_startswith s58_0 "tp")) then + (case ((string_drop s58_0 ((string_length "tp")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s52_ : string -> maybe string*) + +val _ = Define ` + ((s52_:string ->(string)option) s53_0= + (let s54_0 = s53_0 in + if ((string_startswith s54_0 "gp")) then + (case ((string_drop s54_0 ((string_length "gp")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s48_ : string -> maybe string*) + +val _ = Define ` + ((s48_:string ->(string)option) s49_0= + (let s50_0 = s49_0 in + if ((string_startswith s50_0 "sp")) then + (case ((string_drop s50_0 ((string_length "sp")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s44_ : string -> maybe string*) + +val _ = Define ` + ((s44_:string ->(string)option) s45_0= + (let s46_0 = s45_0 in + if ((string_startswith s46_0 "ra")) then + (case ((string_drop s46_0 ((string_length "ra")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s40_ : string -> maybe string*) + +val _ = Define ` + ((s40_:string ->(string)option) s41_0= + (let s42_0 = s41_0 in + if ((string_startswith s42_0 "zero")) then + (case ((string_drop s42_0 ((string_length "zero")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((reg_name_matches_prefix:string ->((5)words$word#int)option) arg_= + (let s43_0 = arg_ in + if ((case ((s40_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s40_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s44_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s44_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s48_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s48_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s52_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s52_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s56_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s56_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s60_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s60_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s64_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s64_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s68_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s68_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s72_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s72_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s76_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s76_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B0;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s80_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s80_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B0;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s84_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s84_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B0;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s88_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s88_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s92_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s92_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s96_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s96_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s100_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s100_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s104_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s104_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s108_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s108_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B0;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s112_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s112_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B0;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s116_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s116_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B0;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s120_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s120_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s124_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s124_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s128_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s128_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s132_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s132_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s136_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s136_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s140_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s140_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s144_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s144_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s148_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s148_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s152_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s152_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s156_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s156_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B0;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s160_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s160_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B1;B0] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s164_ s43_0)) of SOME (s_) => T | _ => F )) then + (case s164_ s43_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B1;B1] : 5 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val creg_name_forwards : mword ty3 -> M string*) + +val _ = Define ` + ((creg_name_forwards:(3)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then sail2_state_monad$returnS "s0" + else if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS "s1" + else if (((b__0 = (vec_of_bits [B0;B1;B0] : 3 words$word)))) then sail2_state_monad$returnS "a0" + else if (((b__0 = (vec_of_bits [B0;B1;B1] : 3 words$word)))) then sail2_state_monad$returnS "a1" + else if (((b__0 = (vec_of_bits [B1;B0;B0] : 3 words$word)))) then sail2_state_monad$returnS "a2" + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS "a3" + else if (((b__0 = (vec_of_bits [B1;B1;B0] : 3 words$word)))) then sail2_state_monad$returnS "a4" + else if (((b__0 = (vec_of_bits [B1;B1;B1] : 3 words$word)))) then sail2_state_monad$returnS "a5" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val creg_name_backwards : string -> M (mword ty3)*) + +val _ = Define ` + ((creg_name_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((3)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "s0"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B0] : 3 words$word) + else if (((p0_ = "s1"))) then sail2_state_monad$returnS (vec_of_bits [B0;B0;B1] : 3 words$word) + else if (((p0_ = "a0"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B0] : 3 words$word) + else if (((p0_ = "a1"))) then sail2_state_monad$returnS (vec_of_bits [B0;B1;B1] : 3 words$word) + else if (((p0_ = "a2"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B0] : 3 words$word) + else if (((p0_ = "a3"))) then sail2_state_monad$returnS (vec_of_bits [B1;B0;B1] : 3 words$word) + else if (((p0_ = "a4"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B0] : 3 words$word) + else if (((p0_ = "a5"))) then sail2_state_monad$returnS (vec_of_bits [B1;B1;B1] : 3 words$word) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val creg_name_forwards_matches : mword ty3 -> bool*) + +val _ = Define ` + ((creg_name_forwards_matches:(3)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B1;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B1;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1;B1] : 3 words$word)))) then T + else F))`; + + +(*val creg_name_backwards_matches : string -> bool*) + +val _ = Define ` + ((creg_name_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "s0"))) then T + else if (((p0_ = "s1"))) then T + else if (((p0_ = "a0"))) then T + else if (((p0_ = "a1"))) then T + else if (((p0_ = "a2"))) then T + else if (((p0_ = "a3"))) then T + else if (((p0_ = "a4"))) then T + else if (((p0_ = "a5"))) then T + else F))`; + + +(*val creg_name_matches_prefix : string -> maybe ((mword ty3 * ii))*) + +(*val _s196_ : string -> maybe string*) + +val _ = Define ` + ((s196_:string ->(string)option) s197_0= + (let s198_0 = s197_0 in + if ((string_startswith s198_0 "a5")) then + (case ((string_drop s198_0 ((string_length "a5")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s192_ : string -> maybe string*) + +val _ = Define ` + ((s192_:string ->(string)option) s193_0= + (let s194_0 = s193_0 in + if ((string_startswith s194_0 "a4")) then + (case ((string_drop s194_0 ((string_length "a4")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s188_ : string -> maybe string*) + +val _ = Define ` + ((s188_:string ->(string)option) s189_0= + (let s190_0 = s189_0 in + if ((string_startswith s190_0 "a3")) then + (case ((string_drop s190_0 ((string_length "a3")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s184_ : string -> maybe string*) + +val _ = Define ` + ((s184_:string ->(string)option) s185_0= + (let s186_0 = s185_0 in + if ((string_startswith s186_0 "a2")) then + (case ((string_drop s186_0 ((string_length "a2")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s180_ : string -> maybe string*) + +val _ = Define ` + ((s180_:string ->(string)option) s181_0= + (let s182_0 = s181_0 in + if ((string_startswith s182_0 "a1")) then + (case ((string_drop s182_0 ((string_length "a1")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s176_ : string -> maybe string*) + +val _ = Define ` + ((s176_:string ->(string)option) s177_0= + (let s178_0 = s177_0 in + if ((string_startswith s178_0 "a0")) then + (case ((string_drop s178_0 ((string_length "a0")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s172_ : string -> maybe string*) + +val _ = Define ` + ((s172_:string ->(string)option) s173_0= + (let s174_0 = s173_0 in + if ((string_startswith s174_0 "s1")) then + (case ((string_drop s174_0 ((string_length "s1")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s168_ : string -> maybe string*) + +val _ = Define ` + ((s168_:string ->(string)option) s169_0= + (let s170_0 = s169_0 in + if ((string_startswith s170_0 "s0")) then + (case ((string_drop s170_0 ((string_length "s0")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((creg_name_matches_prefix:string ->((3)words$word#int)option) arg_= + (let s171_0 = arg_ in + if ((case ((s168_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s168_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s172_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s172_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s176_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s176_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B0] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s180_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s180_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s184_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s184_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B0] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s188_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s188_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s192_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s192_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s196_ s171_0)) of SOME (s_) => T | _ => F )) then + (case s196_ s171_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1] : 3 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val init_base_regs : unit -> M unit*) + +val _ = Define ` + ((init_base_regs:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS x1_ref zero_reg) + (sail2_state_monad$write_regS x2_ref zero_reg)) + (sail2_state_monad$write_regS x3_ref zero_reg)) + (sail2_state_monad$write_regS x4_ref zero_reg)) + (sail2_state_monad$write_regS x5_ref zero_reg)) + (sail2_state_monad$write_regS x6_ref zero_reg)) + (sail2_state_monad$write_regS x7_ref zero_reg)) + (sail2_state_monad$write_regS x8_ref zero_reg)) + (sail2_state_monad$write_regS x9_ref zero_reg)) + (sail2_state_monad$write_regS x10_ref zero_reg)) + (sail2_state_monad$write_regS x11_ref zero_reg)) + (sail2_state_monad$write_regS x12_ref zero_reg)) + (sail2_state_monad$write_regS x13_ref zero_reg)) + (sail2_state_monad$write_regS x14_ref zero_reg)) + (sail2_state_monad$write_regS x15_ref zero_reg)) + (sail2_state_monad$write_regS x16_ref zero_reg)) + (sail2_state_monad$write_regS x17_ref zero_reg)) + (sail2_state_monad$write_regS x18_ref zero_reg)) + (sail2_state_monad$write_regS x19_ref zero_reg)) + (sail2_state_monad$write_regS x20_ref zero_reg)) + (sail2_state_monad$write_regS x21_ref zero_reg)) + (sail2_state_monad$write_regS x22_ref zero_reg)) + (sail2_state_monad$write_regS x23_ref zero_reg)) + (sail2_state_monad$write_regS x24_ref zero_reg)) + (sail2_state_monad$write_regS x25_ref zero_reg)) + (sail2_state_monad$write_regS x26_ref zero_reg)) + (sail2_state_monad$write_regS x27_ref zero_reg)) + (sail2_state_monad$write_regS x28_ref zero_reg)) + (sail2_state_monad$write_regS x29_ref zero_reg)) (sail2_state_monad$write_regS x30_ref zero_reg)) (sail2_state_monad$write_regS x31_ref zero_reg)))`; + + +(* + Retrieves the architectural PC value. This is not necessarily the value + found in the PC register as extensions may choose to override this function. + The value in the PC register is the absolute virtual address of the instruction + to fetch. + *) +(*val get_arch_pc : unit -> M (mword ty32)*) + +val _ = Define ` + ((get_arch_pc:unit ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = ((sail2_state_monad$read_regS PC_ref : ( 32 words$word) M)))`; + + +(*val get_next_pc : unit -> M (mword ty32)*) + +val _ = Define ` + ((get_next_pc:unit ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = ((sail2_state_monad$read_regS nextPC_ref : ( 32 words$word) M)))`; + + +(*val set_next_pc : mword ty32 -> M unit*) + +val _ = Define ` + ((set_next_pc:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) pc= (sail2_state_monad$write_regS nextPC_ref pc))`; + + +(*val tick_pc : unit -> M unit*) + +val _ = Define ` + ((tick_pc:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS nextPC_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . sail2_state_monad$write_regS PC_ref w__0)))`; + + +(*val Mk_Misa : mword ty32 -> Misa*) + +val _ = Define ` + ((Mk_Misa:(32)words$word -> Misa) v= (<| Misa_Misa_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Misa_bits : Misa -> mword ty32*) + +val _ = Define ` + ((get_Misa_bits:Misa ->(32)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Misa_bits : register_ref regstate register_value Misa -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Misa_bits:((regstate),(register_value),(Misa))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_bits : Misa -> mword ty32 -> Misa*) + +val _ = Define ` + ((update_Misa_bits:Misa ->(32)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_SV48_PTE_bits : SV48_PTE -> mword ty64 -> SV48_PTE*) + +(*val _get_SV48_PTE_bits : SV48_PTE -> mword ty64*) + +(*val _set_SV48_PTE_bits : register_ref regstate register_value SV48_PTE -> mword ty64 -> M unit*) + +(*val _get_Misa_MXL : Misa -> mword ty2*) + +val _ = Define ` + ((get_Misa_MXL:Misa ->(2)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 31 : int):ii) (( 30 : int):ii) : 2 words$word)))`; + + +(*val _set_Misa_MXL : register_ref regstate register_value Misa -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_Misa_MXL:((regstate),(register_value),(Misa))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 31 : int):ii) (( 30 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_MXL : Misa -> mword ty2 -> Misa*) + +val _ = Define ` + ((update_Misa_MXL:Misa ->(2)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 31 : int):ii) (( 30 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_Z : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_Z:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_Z : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_Z:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 25 : int):ii) (( 25 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_Z : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_Z:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 25 : int):ii) (( 25 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_Y : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_Y:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 24 : int):ii) (( 24 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_Y : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_Y:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 24 : int):ii) (( 24 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_Y : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_Y:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 24 : int):ii) (( 24 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_X : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_X:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 23 : int):ii) (( 23 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_X : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_X:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 23 : int):ii) (( 23 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_X : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_X:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 23 : int):ii) (( 23 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_X : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_X : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_X : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val _get_Misa_W : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_W:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 22 : int):ii) (( 22 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_W : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_W:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 22 : int):ii) (( 22 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_W : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_W:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 22 : int):ii) (( 22 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_W : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_W : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_W : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val _get_Misa_V : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_V:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 21 : int):ii) (( 21 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_V : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_V:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 21 : int):ii) (( 21 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_V : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_V:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 21 : int):ii) (( 21 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_V : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_V : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_V : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val _get_Misa_U : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_U:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 20 : int):ii) (( 20 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_U : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_U:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 20 : int):ii) (( 20 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_U : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_U:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 20 : int):ii) (( 20 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_U : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_U : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_U : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val _get_Misa_T : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_T:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 19 : int):ii) (( 19 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_T : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_T:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 19 : int):ii) (( 19 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_T : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_T:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 19 : int):ii) (( 19 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_S : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_S:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 18 : int):ii) (( 18 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_S : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_S:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 18 : int):ii) (( 18 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_S : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_S:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 18 : int):ii) (( 18 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_R : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_R:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 17 : int):ii) (( 17 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_R : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_R:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 17 : int):ii) (( 17 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_R : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_R:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 17 : int):ii) (( 17 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_R : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_R : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_R : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val _get_Misa_Q : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_Q:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 16 : int):ii) (( 16 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_Q : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_Q:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 16 : int):ii) (( 16 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_Q : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_Q:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 16 : int):ii) (( 16 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_P : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_P:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 15 : int):ii) (( 15 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_P : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_P:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 15 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_P : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_P:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 15 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_O : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_O:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_O : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_O:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 14 : int):ii) (( 14 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_O : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_O:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 14 : int):ii) (( 14 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_N : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_N:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 13 : int):ii) (( 13 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_N : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_N:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 13 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_N : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_N:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 13 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_M : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_M:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_M : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_M:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 12 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_M : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_M:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 12 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_L : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_L:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 11 : int):ii) (( 11 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_L : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_L:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 11 : int):ii) (( 11 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_L : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_L:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 11 : int):ii) (( 11 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Pmpcfg_ent_L : Pmpcfg_ent -> mword ty1 -> Pmpcfg_ent*) + +(*val _get_Pmpcfg_ent_L : Pmpcfg_ent -> mword ty1*) + +(*val _set_Pmpcfg_ent_L : register_ref regstate register_value Pmpcfg_ent -> mword ty1 -> M unit*) + +(*val _get_Misa_K : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_K:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 10 : int):ii) (( 10 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_K : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_K:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 10 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_K : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_K:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 10 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_J : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_J:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 9 : int):ii) (( 9 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_J : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_J:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_J : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_J:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_I : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_I:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_I : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_I:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_I : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_I:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_H : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_H:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_H : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_H:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_H : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_H:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_G : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_G:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_G : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_G:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_G : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_G:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_G : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_G : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_G : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val _get_Misa_F : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_F:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_F : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_F:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_F : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_F:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_E : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_E:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_E : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_E:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_E : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_E:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_D : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_D:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_D : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_D:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_D : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_D:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_D : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_D : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_D : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val _get_Misa_C : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_C:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_C : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_C:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_C : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_C:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_B : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_B:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_B : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_B:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_B : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_B:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Misa_A : Misa -> mword ty1*) + +val _ = Define ` + ((get_Misa_A:Misa ->(1)words$word) v= ((subrange_vec_dec v.Misa_Misa_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Misa_A : register_ref regstate register_value Misa -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Misa_A:((regstate),(register_value),(Misa))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec r.Misa_Misa_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Misa_A : Misa -> mword ty1 -> Misa*) + +val _ = Define ` + ((update_Misa_A:Misa ->(1)words$word -> Misa) v x= + ((v with<| + Misa_Misa_chunk_0 := + ((update_subrange_vec_dec v.Misa_Misa_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_PTE_Bits_A : PTE_Bits -> mword ty1 -> PTE_Bits*) + +(*val _get_PTE_Bits_A : PTE_Bits -> mword ty1*) + +(*val _set_PTE_Bits_A : register_ref regstate register_value PTE_Bits -> mword ty1 -> M unit*) + +(*val legalize_misa : Misa -> mword ty32 -> M Misa*) + +val _ = Define ` + ((legalize_misa:Misa ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Misa),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (m : Misa) (v : xlenbits)= + (if ((sys_enable_writable_misa () )) then + let v = (Mk_Misa v) in sail2_state_monad$bindS + (sail2_state$and_boolS + (sail2_state_monad$returnS (((((get_Misa_C v : 1 words$word)) = ((bool_to_bits F : 1 words$word)))))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS nextPC_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + sail2_state_monad$returnS (((((bit_to_bool ((access_vec_dec w__0 (( 1 : int):ii))))) = T)))))) (\ (w__1 : bool) . + sail2_state_monad$returnS (if w__1 then m + else update_Misa_C m ((get_Misa_C v : 1 words$word)))) + else sail2_state_monad$returnS m))`; + + +(*val haveAtomics : unit -> M bool*) + +val _ = Define ` + ((haveAtomics:unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS (((((get_Misa_A w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))`; + + +(*val haveRVC : unit -> M bool*) + +val _ = Define ` + ((haveRVC:unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS (((((get_Misa_C w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))`; + + +(*val haveMulDiv : unit -> M bool*) + +val _ = Define ` + ((haveMulDiv:unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS (((((get_Misa_M w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))`; + + +(*val haveSupMode : unit -> M bool*) + +val _ = Define ` + ((haveSupMode:unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS (((((get_Misa_S w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))`; + + +(*val haveUsrMode : unit -> M bool*) + +val _ = Define ` + ((haveUsrMode:unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS (((((get_Misa_U w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))`; + + +(*val haveNExt : unit -> M bool*) + +val _ = Define ` + ((haveNExt:unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS (((((get_Misa_N w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))`; + + +(*val Mk_Mstatus : mword ty32 -> Mstatus*) + +val _ = Define ` + ((Mk_Mstatus:(32)words$word -> Mstatus) v= + (<| Mstatus_Mstatus_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Mstatus_bits : Mstatus -> mword ty32*) + +val _ = Define ` + ((get_Mstatus_bits:Mstatus ->(32)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Mstatus_bits : register_ref regstate register_value Mstatus -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Mstatus_bits:((regstate),(register_value),(Mstatus))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_bits : Mstatus -> mword ty32 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_bits:Mstatus ->(32)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_SD : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_SD:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_SD : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_SD:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_SD : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_SD:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_SD : Sstatus -> mword ty1 -> Sstatus*) + +(*val _get_Sstatus_SD : Sstatus -> mword ty1*) + +(*val _set_Sstatus_SD : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +(*val _get_Mstatus_TSR : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_TSR:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 22 : int):ii) (( 22 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_TSR : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_TSR:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 22 : int):ii) (( 22 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_TSR : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_TSR:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 22 : int):ii) (( 22 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_TW : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_TW:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 21 : int):ii) (( 21 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_TW : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_TW:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 21 : int):ii) (( 21 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_TW : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_TW:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 21 : int):ii) (( 21 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_TVM : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_TVM:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 20 : int):ii) (( 20 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_TVM : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_TVM:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 20 : int):ii) (( 20 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_TVM : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_TVM:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 20 : int):ii) (( 20 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_MXR : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_MXR:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 19 : int):ii) (( 19 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_MXR : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_MXR:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 19 : int):ii) (( 19 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_MXR : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_MXR:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 19 : int):ii) (( 19 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_MXR : Sstatus -> mword ty1 -> Sstatus*) + +(*val _get_Sstatus_MXR : Sstatus -> mword ty1*) + +(*val _set_Sstatus_MXR : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +(*val _get_Mstatus_SUM : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_SUM:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 18 : int):ii) (( 18 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_SUM : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_SUM:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 18 : int):ii) (( 18 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_SUM : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_SUM:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 18 : int):ii) (( 18 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_SUM : Sstatus -> mword ty1 -> Sstatus*) + +(*val _get_Sstatus_SUM : Sstatus -> mword ty1*) + +(*val _set_Sstatus_SUM : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +(*val _get_Mstatus_MPRV : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_MPRV:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 17 : int):ii) (( 17 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_MPRV : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_MPRV:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 17 : int):ii) (( 17 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_MPRV : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_MPRV:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 17 : int):ii) (( 17 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_XS : Mstatus -> mword ty2*) + +val _ = Define ` + ((get_Mstatus_XS:Mstatus ->(2)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 16 : int):ii) (( 15 : int):ii) : 2 words$word)))`; + + +(*val _set_Mstatus_XS : register_ref regstate register_value Mstatus -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_Mstatus_XS:((regstate),(register_value),(Mstatus))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 16 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_XS : Mstatus -> mword ty2 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_XS:Mstatus ->(2)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 16 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_XS : Sstatus -> mword ty2 -> Sstatus*) + +(*val _get_Sstatus_XS : Sstatus -> mword ty2*) + +(*val _set_Sstatus_XS : register_ref regstate register_value Sstatus -> mword ty2 -> M unit*) + +(*val _get_Mstatus_FS : Mstatus -> mword ty2*) + +val _ = Define ` + ((get_Mstatus_FS:Mstatus ->(2)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 14 : int):ii) (( 13 : int):ii) : 2 words$word)))`; + + +(*val _set_Mstatus_FS : register_ref regstate register_value Mstatus -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_Mstatus_FS:((regstate),(register_value),(Mstatus))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 14 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_FS : Mstatus -> mword ty2 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_FS:Mstatus ->(2)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 14 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_FS : Sstatus -> mword ty2 -> Sstatus*) + +(*val _get_Sstatus_FS : Sstatus -> mword ty2*) + +(*val _set_Sstatus_FS : register_ref regstate register_value Sstatus -> mword ty2 -> M unit*) + +(*val _get_Mstatus_MPP : Mstatus -> mword ty2*) + +val _ = Define ` + ((get_Mstatus_MPP:Mstatus ->(2)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 12 : int):ii) (( 11 : int):ii) : 2 words$word)))`; + + +(*val _set_Mstatus_MPP : register_ref regstate register_value Mstatus -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_Mstatus_MPP:((regstate),(register_value),(Mstatus))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 12 : int):ii) (( 11 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_MPP : Mstatus -> mword ty2 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_MPP:Mstatus ->(2)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 12 : int):ii) (( 11 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_SPP : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_SPP:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_SPP : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_SPP:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_SPP : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_SPP:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_SPP : Sstatus -> mword ty1 -> Sstatus*) + +(*val _get_Sstatus_SPP : Sstatus -> mword ty1*) + +(*val _set_Sstatus_SPP : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +(*val _get_Mstatus_MPIE : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_MPIE:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_MPIE : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_MPIE:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_MPIE : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_MPIE:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_SPIE : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_SPIE:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_SPIE : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_SPIE:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_SPIE : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_SPIE:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_SPIE : Sstatus -> mword ty1 -> Sstatus*) + +(*val _get_Sstatus_SPIE : Sstatus -> mword ty1*) + +(*val _set_Sstatus_SPIE : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +(*val _get_Mstatus_UPIE : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_UPIE:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_UPIE : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_UPIE:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_UPIE : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_UPIE:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Ustatus_UPIE : Ustatus -> mword ty1 -> Ustatus*) + +(*val _get_Ustatus_UPIE : Ustatus -> mword ty1*) + +(*val _set_Ustatus_UPIE : register_ref regstate register_value Ustatus -> mword ty1 -> M unit*) + +(*val _get_Mstatus_MIE : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_MIE:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_MIE : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_MIE:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_MIE : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_MIE:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mstatus_SIE : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_SIE:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_SIE : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_SIE:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_SIE : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_SIE:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sstatus_SIE : Sstatus -> mword ty1 -> Sstatus*) + +(*val _get_Sstatus_SIE : Sstatus -> mword ty1*) + +(*val _set_Sstatus_SIE : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +(*val _get_Mstatus_UIE : Mstatus -> mword ty1*) + +val _ = Define ` + ((get_Mstatus_UIE:Mstatus ->(1)words$word) v= ((subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Mstatus_UIE : register_ref regstate register_value Mstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mstatus_UIE:((regstate),(register_value),(Mstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec r.Mstatus_Mstatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mstatus_UIE : Mstatus -> mword ty1 -> Mstatus*) + +val _ = Define ` + ((update_Mstatus_UIE:Mstatus ->(1)words$word -> Mstatus) v x= + ((v with<| + Mstatus_Mstatus_chunk_0 := + ((update_subrange_vec_dec v.Mstatus_Mstatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Ustatus_UIE : Ustatus -> mword ty1 -> Ustatus*) + +(*val _get_Ustatus_UIE : Ustatus -> mword ty1*) + +(*val _set_Ustatus_UIE : register_ref regstate register_value Ustatus -> mword ty1 -> M unit*) + +(*val effectivePrivilege : Mstatus -> Privilege -> M Privilege*) + +val _ = Define ` + ((effectivePrivilege:Mstatus -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((Privilege),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (m : Mstatus) (priv : Privilege)= + (if (((((get_Mstatus_MPRV m : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__0 : Mstatus) . + privLevel_of_bits ((get_Mstatus_MPP w__0 : 2 words$word))) + else sail2_state_monad$read_regS cur_privilege_ref))`; + + +(*val get_mstatus_SXL : Mstatus -> mword ty2*) + +val _ = Define ` + ((get_mstatus_SXL:Mstatus ->(2)words$word) m= ((arch_to_bits RV32 : 2 words$word)))`; + + +(*val set_mstatus_SXL : Mstatus -> mword ty2 -> Mstatus*) + +val _ = Define ` + ((set_mstatus_SXL:Mstatus ->(2)words$word -> Mstatus) (m : Mstatus) (a : arch_xlen)= m)`; + + +(*val get_mstatus_UXL : Mstatus -> mword ty2*) + +val _ = Define ` + ((get_mstatus_UXL:Mstatus ->(2)words$word) m= ((arch_to_bits RV32 : 2 words$word)))`; + + +(*val set_mstatus_UXL : Mstatus -> mword ty2 -> Mstatus*) + +val _ = Define ` + ((set_mstatus_UXL:Mstatus ->(2)words$word -> Mstatus) (m : Mstatus) (a : arch_xlen)= m)`; + + +(*val legalize_mstatus : Mstatus -> mword ty32 -> M Mstatus*) + +val _ = Define ` + ((legalize_mstatus:Mstatus ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Mstatus),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (o1 : Mstatus) (v : xlenbits)= + (let (m : Mstatus) = (Mk_Mstatus v) in + let m = (update_Mstatus_XS m ((extStatus_to_bits Off : 2 words$word))) in sail2_state_monad$bindS + (sail2_state$or_boolS + ( sail2_state_monad$bindS(extStatus_of_bits ((get_Mstatus_FS m : 2 words$word))) (\ (w__0 : ExtStatus) . + sail2_state_monad$returnS (((((extStatus_to_bits w__0 : 2 words$word)) = ((extStatus_to_bits Dirty : 2 words$word))))))) + ( sail2_state_monad$bindS(extStatus_of_bits ((get_Mstatus_XS m : 2 words$word))) (\ (w__1 : ExtStatus) . + sail2_state_monad$returnS (((((extStatus_to_bits w__1 : 2 words$word)) = ((extStatus_to_bits Dirty : 2 words$word)))))))) (\ (w__2 : bool) . + let m = (update_Mstatus_SD m ((bool_to_bits w__2 : 1 words$word))) in + let m = (set_mstatus_SXL m ((get_mstatus_SXL o1 : 2 words$word))) in + let m = (set_mstatus_UXL m ((get_mstatus_UXL o1 : 2 words$word))) in + let m = (update_Mstatus_UPIE m ((bool_to_bits F : 1 words$word))) in + let m = (update_Mstatus_UIE m ((bool_to_bits F : 1 words$word))) in + sail2_state_monad$returnS m)))`; + + +(*val cur_Architecture : unit -> M Architecture*) + +val _ = Define ` + ((cur_Architecture:unit ->(regstate)sail2_state_monad$sequential_state ->(((Architecture),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__0 : Privilege) . sail2_state_monad$bindS + (case w__0 of + Machine => sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__1 : Misa) . sail2_state_monad$returnS ((get_Misa_MXL w__1 : 2 words$word))) + | Supervisor => sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__2 : Mstatus) . sail2_state_monad$returnS ((get_mstatus_SXL w__2 : 2 words$word))) + | User => sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__3 : Mstatus) . sail2_state_monad$returnS ((get_mstatus_UXL w__3 : 2 words$word))) + ) (\ (a : arch_xlen) . + (case ((architecture a)) of + SOME (a) => sail2_state_monad$returnS a + | NONE => internal_error "Invalid current architecture" + )))))`; + + +(*val in32BitMode : unit -> M bool*) + +val _ = Define ` + ((in32BitMode:unit ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS (cur_Architecture () ) (\ (w__0 : Architecture) . sail2_state_monad$returnS (((w__0 = RV32))))))`; + + +(*val Mk_Minterrupts : mword ty32 -> Minterrupts*) + +val _ = Define ` + ((Mk_Minterrupts:(32)words$word -> Minterrupts) v= + (<| Minterrupts_Minterrupts_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Minterrupts_bits : Minterrupts -> mword ty32*) + +val _ = Define ` + ((get_Minterrupts_bits:Minterrupts ->(32)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Minterrupts_bits : register_ref regstate register_value Minterrupts -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_bits:((regstate),(register_value),(Minterrupts))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_bits : Minterrupts -> mword ty32 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_bits:Minterrupts ->(32)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Minterrupts_MEI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_MEI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 11 : int):ii) (( 11 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_MEI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_MEI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 11 : int):ii) (( 11 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_MEI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_MEI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 11 : int):ii) (( 11 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Minterrupts_SEI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_SEI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 9 : int):ii) (( 9 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_SEI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_SEI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_SEI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_SEI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sinterrupts_SEI : Sinterrupts -> mword ty1 -> Sinterrupts*) + +(*val _get_Sinterrupts_SEI : Sinterrupts -> mword ty1*) + +(*val _set_Sinterrupts_SEI : register_ref regstate register_value Sinterrupts -> mword ty1 -> M unit*) + +(*val _get_Minterrupts_UEI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_UEI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_UEI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_UEI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_UEI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_UEI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Uinterrupts_UEI : Uinterrupts -> mword ty1 -> Uinterrupts*) + +(*val _get_Uinterrupts_UEI : Uinterrupts -> mword ty1*) + +(*val _set_Uinterrupts_UEI : register_ref regstate register_value Uinterrupts -> mword ty1 -> M unit*) + +(*val _get_Minterrupts_MTI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_MTI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_MTI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_MTI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_MTI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_MTI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Minterrupts_STI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_STI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_STI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_STI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_STI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_STI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sinterrupts_STI : Sinterrupts -> mword ty1 -> Sinterrupts*) + +(*val _get_Sinterrupts_STI : Sinterrupts -> mword ty1*) + +(*val _set_Sinterrupts_STI : register_ref regstate register_value Sinterrupts -> mword ty1 -> M unit*) + +(*val _get_Minterrupts_UTI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_UTI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_UTI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_UTI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_UTI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_UTI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Uinterrupts_UTI : Uinterrupts -> mword ty1 -> Uinterrupts*) + +(*val _get_Uinterrupts_UTI : Uinterrupts -> mword ty1*) + +(*val _set_Uinterrupts_UTI : register_ref regstate register_value Uinterrupts -> mword ty1 -> M unit*) + +(*val _get_Minterrupts_MSI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_MSI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_MSI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_MSI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_MSI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_MSI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Minterrupts_SSI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_SSI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_SSI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_SSI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_SSI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_SSI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sinterrupts_SSI : Sinterrupts -> mword ty1 -> Sinterrupts*) + +(*val _get_Sinterrupts_SSI : Sinterrupts -> mword ty1*) + +(*val _set_Sinterrupts_SSI : register_ref regstate register_value Sinterrupts -> mword ty1 -> M unit*) + +(*val _get_Minterrupts_USI : Minterrupts -> mword ty1*) + +val _ = Define ` + ((get_Minterrupts_USI:Minterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Minterrupts_USI : register_ref regstate register_value Minterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Minterrupts_USI:((regstate),(register_value),(Minterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec r.Minterrupts_Minterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Minterrupts_USI : Minterrupts -> mword ty1 -> Minterrupts*) + +val _ = Define ` + ((update_Minterrupts_USI:Minterrupts ->(1)words$word -> Minterrupts) v x= + ((v with<| + Minterrupts_Minterrupts_chunk_0 := + ((update_subrange_vec_dec v.Minterrupts_Minterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Uinterrupts_USI : Uinterrupts -> mword ty1 -> Uinterrupts*) + +(*val _get_Uinterrupts_USI : Uinterrupts -> mword ty1*) + +(*val _set_Uinterrupts_USI : register_ref regstate register_value Uinterrupts -> mword ty1 -> M unit*) + +(*val legalize_mip : Minterrupts -> mword ty32 -> M Minterrupts*) + +val _ = Define ` + ((legalize_mip:Minterrupts ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Minterrupts),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (o1 : Minterrupts) (v : xlenbits)= + (let v = (Mk_Minterrupts v) in + let m = (update_Minterrupts_SEI o1 ((get_Minterrupts_SEI v : 1 words$word))) in + let m = (update_Minterrupts_STI m ((get_Minterrupts_STI v : 1 words$word))) in + let m = (update_Minterrupts_SSI m ((get_Minterrupts_SSI v : 1 words$word))) in sail2_state_monad$bindS + (haveUsrMode () ) (\ (w__0 : bool) . + sail2_state_monad$returnS (if w__0 then + let m = (update_Minterrupts_UEI m ((get_Minterrupts_UEI v : 1 words$word))) in + let m = (update_Minterrupts_UTI m ((get_Minterrupts_UTI v : 1 words$word))) in + update_Minterrupts_USI m ((get_Minterrupts_USI v : 1 words$word)) + else m))))`; + + +(*val legalize_mie : Minterrupts -> mword ty32 -> M Minterrupts*) + +val _ = Define ` + ((legalize_mie:Minterrupts ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Minterrupts),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (o1 : Minterrupts) (v : xlenbits)= + (let v = (Mk_Minterrupts v) in + let m = (update_Minterrupts_MEI o1 ((get_Minterrupts_MEI v : 1 words$word))) in + let m = (update_Minterrupts_MTI m ((get_Minterrupts_MTI v : 1 words$word))) in + let m = (update_Minterrupts_MSI m ((get_Minterrupts_MSI v : 1 words$word))) in + let m = (update_Minterrupts_SEI m ((get_Minterrupts_SEI v : 1 words$word))) in + let m = (update_Minterrupts_STI m ((get_Minterrupts_STI v : 1 words$word))) in + let m = (update_Minterrupts_SSI m ((get_Minterrupts_SSI v : 1 words$word))) in sail2_state_monad$bindS + (haveUsrMode () ) (\ (w__0 : bool) . + sail2_state_monad$returnS (if w__0 then + let m = (update_Minterrupts_UEI m ((get_Minterrupts_UEI v : 1 words$word))) in + let m = (update_Minterrupts_UTI m ((get_Minterrupts_UTI v : 1 words$word))) in + update_Minterrupts_USI m ((get_Minterrupts_USI v : 1 words$word)) + else m))))`; + + +(*val legalize_mideleg : Minterrupts -> mword ty32 -> Minterrupts*) + +val _ = Define ` + ((legalize_mideleg:Minterrupts ->(32)words$word -> Minterrupts) (o1 : Minterrupts) (v : xlenbits)= + (let m = (Mk_Minterrupts v) in + let m = (update_Minterrupts_MEI m ((bool_to_bits F : 1 words$word))) in + let m = (update_Minterrupts_MTI m ((bool_to_bits F : 1 words$word))) in + update_Minterrupts_MSI m ((bool_to_bits F : 1 words$word))))`; + + +(*val Mk_Medeleg : mword ty32 -> Medeleg*) + +val _ = Define ` + ((Mk_Medeleg:(32)words$word -> Medeleg) v= + (<| Medeleg_Medeleg_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Medeleg_bits : Medeleg -> mword ty32*) + +val _ = Define ` + ((get_Medeleg_bits:Medeleg ->(32)words$word) v= ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Medeleg_bits : register_ref regstate register_value Medeleg -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Medeleg_bits:((regstate),(register_value),(Medeleg))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_bits : Medeleg -> mword ty32 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_bits:Medeleg ->(32)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Medeleg_SAMO_Page_Fault : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_SAMO_Page_Fault:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 15 : int):ii) (( 15 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_SAMO_Page_Fault : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_SAMO_Page_Fault:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 15 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_SAMO_Page_Fault : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_SAMO_Page_Fault:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 15 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Medeleg_Load_Page_Fault : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Load_Page_Fault:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 13 : int):ii) (( 13 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Load_Page_Fault : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Load_Page_Fault:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 13 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Load_Page_Fault : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Load_Page_Fault:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 13 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Medeleg_Fetch_Page_Fault : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Fetch_Page_Fault:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Fetch_Page_Fault : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Fetch_Page_Fault:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 12 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Fetch_Page_Fault : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Fetch_Page_Fault:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 12 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Medeleg_MEnvCall : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_MEnvCall:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 10 : int):ii) (( 10 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_MEnvCall : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_MEnvCall:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 10 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_MEnvCall : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_MEnvCall:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 10 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Medeleg_SEnvCall : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_SEnvCall:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 9 : int):ii) (( 9 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_SEnvCall : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_SEnvCall:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_SEnvCall : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_SEnvCall:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Medeleg_UEnvCall : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_UEnvCall:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_UEnvCall : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_UEnvCall:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_UEnvCall : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_UEnvCall:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_UEnvCall : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_UEnvCall : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_UEnvCall : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_SAMO_Access_Fault : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_SAMO_Access_Fault:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_SAMO_Access_Fault : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_SAMO_Access_Fault:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_SAMO_Access_Fault : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_SAMO_Access_Fault:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_SAMO_Access_Fault : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_SAMO_Access_Fault : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_SAMO_Access_Fault : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_SAMO_Addr_Align : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_SAMO_Addr_Align:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_SAMO_Addr_Align : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_SAMO_Addr_Align:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_SAMO_Addr_Align : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_SAMO_Addr_Align:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_SAMO_Addr_Align : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_SAMO_Addr_Align : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_SAMO_Addr_Align : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_Load_Access_Fault : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Load_Access_Fault:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Load_Access_Fault : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Load_Access_Fault:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Load_Access_Fault : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Load_Access_Fault:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_Load_Access_Fault : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_Load_Access_Fault : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_Load_Access_Fault : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_Load_Addr_Align : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Load_Addr_Align:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Load_Addr_Align : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Load_Addr_Align:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Load_Addr_Align : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Load_Addr_Align:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_Load_Addr_Align : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_Load_Addr_Align : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_Load_Addr_Align : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_Breakpoint : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Breakpoint:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Breakpoint : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Breakpoint:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Breakpoint : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Breakpoint:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_Breakpoint : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_Breakpoint : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_Breakpoint : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_Illegal_Instr : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Illegal_Instr:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Illegal_Instr : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Illegal_Instr:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Illegal_Instr : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Illegal_Instr:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_Illegal_Instr : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_Illegal_Instr : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_Illegal_Instr : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_Fetch_Access_Fault : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Fetch_Access_Fault:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Fetch_Access_Fault : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Fetch_Access_Fault:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Fetch_Access_Fault : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Fetch_Access_Fault:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_Fetch_Access_Fault : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_Fetch_Access_Fault : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_Fetch_Access_Fault : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val _get_Medeleg_Fetch_Addr_Align : Medeleg -> mword ty1*) + +val _ = Define ` + ((get_Medeleg_Fetch_Addr_Align:Medeleg ->(1)words$word) v= + ((subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Medeleg_Fetch_Addr_Align : register_ref regstate register_value Medeleg -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Medeleg_Fetch_Addr_Align:((regstate),(register_value),(Medeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec r.Medeleg_Medeleg_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Medeleg_Fetch_Addr_Align : Medeleg -> mword ty1 -> Medeleg*) + +val _ = Define ` + ((update_Medeleg_Fetch_Addr_Align:Medeleg ->(1)words$word -> Medeleg) v x= + ((v with<| + Medeleg_Medeleg_chunk_0 := + ((update_subrange_vec_dec v.Medeleg_Medeleg_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Sedeleg_Fetch_Addr_Align : Sedeleg -> mword ty1 -> Sedeleg*) + +(*val _get_Sedeleg_Fetch_Addr_Align : Sedeleg -> mword ty1*) + +(*val _set_Sedeleg_Fetch_Addr_Align : register_ref regstate register_value Sedeleg -> mword ty1 -> M unit*) + +(*val legalize_medeleg : Medeleg -> mword ty32 -> Medeleg*) + +val _ = Define ` + ((legalize_medeleg:Medeleg ->(32)words$word -> Medeleg) (o1 : Medeleg) (v : xlenbits)= + (let m = (Mk_Medeleg v) in + update_Medeleg_MEnvCall m ((bool_to_bits F : 1 words$word))))`; + + +(*val Mk_Mtvec : mword ty32 -> Mtvec*) + +val _ = Define ` + ((Mk_Mtvec:(32)words$word -> Mtvec) v= (<| Mtvec_Mtvec_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Mtvec_bits : Mtvec -> mword ty32*) + +val _ = Define ` + ((get_Mtvec_bits:Mtvec ->(32)words$word) v= ((subrange_vec_dec v.Mtvec_Mtvec_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Mtvec_bits : register_ref regstate register_value Mtvec -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Mtvec_bits:((regstate),(register_value),(Mtvec))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mtvec_Mtvec_chunk_0 := + ((update_subrange_vec_dec r.Mtvec_Mtvec_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mtvec_bits : Mtvec -> mword ty32 -> Mtvec*) + +val _ = Define ` + ((update_Mtvec_bits:Mtvec ->(32)words$word -> Mtvec) v x= + ((v with<| + Mtvec_Mtvec_chunk_0 := + ((update_subrange_vec_dec v.Mtvec_Mtvec_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mtvec_Base : Mtvec -> mword ty30*) + +val _ = Define ` + ((get_Mtvec_Base:Mtvec ->(30)words$word) v= ((subrange_vec_dec v.Mtvec_Mtvec_chunk_0 (( 31 : int):ii) (( 2 : int):ii) : 30 words$word)))`; + + +(*val _set_Mtvec_Base : register_ref regstate register_value Mtvec -> mword ty30 -> M unit*) + +val _ = Define ` + ((set_Mtvec_Base:((regstate),(register_value),(Mtvec))register_ref ->(30)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mtvec_Mtvec_chunk_0 := + ((update_subrange_vec_dec r.Mtvec_Mtvec_chunk_0 (( 31 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec v (( 29 : int):ii) (( 0 : int):ii) : 30 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mtvec_Base : Mtvec -> mword ty30 -> Mtvec*) + +val _ = Define ` + ((update_Mtvec_Base:Mtvec ->(30)words$word -> Mtvec) v x= + ((v with<| + Mtvec_Mtvec_chunk_0 := + ((update_subrange_vec_dec v.Mtvec_Mtvec_chunk_0 (( 31 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec x (( 29 : int):ii) (( 0 : int):ii) : 30 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mtvec_Mode : Mtvec -> mword ty2*) + +val _ = Define ` + ((get_Mtvec_Mode:Mtvec ->(2)words$word) v= ((subrange_vec_dec v.Mtvec_Mtvec_chunk_0 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)))`; + + +(*val _set_Mtvec_Mode : register_ref regstate register_value Mtvec -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_Mtvec_Mode:((regstate),(register_value),(Mtvec))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mtvec_Mtvec_chunk_0 := + ((update_subrange_vec_dec r.Mtvec_Mtvec_chunk_0 (( 1 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mtvec_Mode : Mtvec -> mword ty2 -> Mtvec*) + +val _ = Define ` + ((update_Mtvec_Mode:Mtvec ->(2)words$word -> Mtvec) v x= + ((v with<| + Mtvec_Mtvec_chunk_0 := + ((update_subrange_vec_dec v.Mtvec_Mtvec_chunk_0 (( 1 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_Satp32_Mode : Satp32 -> mword ty1 -> Satp32*) + +(*val _get_Satp32_Mode : Satp32 -> mword ty1*) + +(*val _set_Satp32_Mode : register_ref regstate register_value Satp32 -> mword ty1 -> M unit*) + +(*val legalize_tvec : Mtvec -> mword ty32 -> Mtvec*) + +val _ = Define ` + ((legalize_tvec:Mtvec ->(32)words$word -> Mtvec) (o1 : Mtvec) (v : xlenbits)= + (let v = (Mk_Mtvec v) in + (case ((trapVectorMode_of_bits ((get_Mtvec_Mode v : 2 words$word)))) of + TV_Direct => v + | TV_Vector => v + | _ => update_Mtvec_Mode v ((get_Mtvec_Mode o1 : 2 words$word)) + )))`; + + +(*val Mk_Mcause : mword ty32 -> Mcause*) + +val _ = Define ` + ((Mk_Mcause:(32)words$word -> Mcause) v= (<| Mcause_Mcause_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Mcause_bits : Mcause -> mword ty32*) + +val _ = Define ` + ((get_Mcause_bits:Mcause ->(32)words$word) v= ((subrange_vec_dec v.Mcause_Mcause_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Mcause_bits : register_ref regstate register_value Mcause -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Mcause_bits:((regstate),(register_value),(Mcause))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mcause_Mcause_chunk_0 := + ((update_subrange_vec_dec r.Mcause_Mcause_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mcause_bits : Mcause -> mword ty32 -> Mcause*) + +val _ = Define ` + ((update_Mcause_bits:Mcause ->(32)words$word -> Mcause) v x= + ((v with<| + Mcause_Mcause_chunk_0 := + ((update_subrange_vec_dec v.Mcause_Mcause_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mcause_IsInterrupt : Mcause -> mword ty1*) + +val _ = Define ` + ((get_Mcause_IsInterrupt:Mcause ->(1)words$word) v= + ((subrange_vec_dec v.Mcause_Mcause_chunk_0 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)))`; + + +(*val _set_Mcause_IsInterrupt : register_ref regstate register_value Mcause -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Mcause_IsInterrupt:((regstate),(register_value),(Mcause))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mcause_Mcause_chunk_0 := + ((update_subrange_vec_dec r.Mcause_Mcause_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mcause_IsInterrupt : Mcause -> mword ty1 -> Mcause*) + +val _ = Define ` + ((update_Mcause_IsInterrupt:Mcause ->(1)words$word -> Mcause) v x= + ((v with<| + Mcause_Mcause_chunk_0 := + ((update_subrange_vec_dec v.Mcause_Mcause_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Mcause_Cause : Mcause -> mword ty31*) + +val _ = Define ` + ((get_Mcause_Cause:Mcause ->(31)words$word) v= ((subrange_vec_dec v.Mcause_Mcause_chunk_0 (( 30 : int):ii) (( 0 : int):ii) : 31 words$word)))`; + + +(*val _set_Mcause_Cause : register_ref regstate register_value Mcause -> mword ty31 -> M unit*) + +val _ = Define ` + ((set_Mcause_Cause:((regstate),(register_value),(Mcause))register_ref ->(31)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Mcause_Mcause_chunk_0 := + ((update_subrange_vec_dec r.Mcause_Mcause_chunk_0 (( 30 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 30 : int):ii) (( 0 : int):ii) : 31 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Mcause_Cause : Mcause -> mword ty31 -> Mcause*) + +val _ = Define ` + ((update_Mcause_Cause:Mcause ->(31)words$word -> Mcause) v x= + ((v with<| + Mcause_Mcause_chunk_0 := + ((update_subrange_vec_dec v.Mcause_Mcause_chunk_0 (( 30 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 30 : int):ii) (( 0 : int):ii) : 31 words$word)) + : 32 words$word))|>)))`; + + +(*val tvec_addr : Mtvec -> Mcause -> maybe (mword ty32)*) + +val _ = Define ` + ((tvec_addr:Mtvec -> Mcause ->((32)words$word)option) (m : Mtvec) (c : Mcause)= + (let (base : xlenbits) = + ((concat_vec ((get_Mtvec_Base m : 30 words$word)) (vec_of_bits [B0;B0] : 2 words$word) + : 32 words$word)) in + (case ((trapVectorMode_of_bits ((get_Mtvec_Mode m : 2 words$word)))) of + TV_Direct => SOME base + | TV_Vector => + if (((((get_Mcause_IsInterrupt c : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME ((add_vec base + ((shiftl ((EXTZ (( 32 : int):ii) ((get_Mcause_Cause c : 31 words$word)) : 32 words$word)) + (( 2 : int):ii) + : 32 words$word)) + : 32 words$word)) + else SOME base + | TV_Reserved => NONE + )))`; + + +(*val legalize_xepc : mword ty32 -> M (mword ty32)*) + +val _ = Define ` + ((legalize_xepc:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) v= (sail2_state_monad$bindS + (sail2_state$or_boolS (sail2_state_monad$returnS ((sys_enable_writable_misa () ))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS (((((get_Misa_C w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) (\ (w__1 : + bool) . + sail2_state_monad$returnS (if w__1 then (update_vec_dec v (( 0 : int):ii) B0 : 32 words$word) + else + (and_vec v ((EXTS (( 32 : int):ii) (vec_of_bits [B1;B0;B0] : 3 words$word) : 32 words$word)) + : 32 words$word)))))`; + + +(*val pc_alignment_mask : unit -> M (mword ty32)*) + +val _ = Define ` + ((pc_alignment_mask:unit ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__0 : Misa) . + sail2_state_monad$returnS ((not_vec + ((EXTZ (( 32 : int):ii) + (if (((((get_Misa_C w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + (vec_of_bits [B0;B0] : 2 words$word) + else (vec_of_bits [B1;B0] : 2 words$word)) + : 32 words$word)) + : 32 words$word)))))`; + + +(*val Mk_Counteren : mword ty32 -> Counteren*) + +val _ = Define ` + ((Mk_Counteren:(32)words$word -> Counteren) v= + (<| Counteren_Counteren_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Counteren_bits : Counteren -> mword ty32*) + +val _ = Define ` + ((get_Counteren_bits:Counteren ->(32)words$word) v= + ((subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Counteren_bits : register_ref regstate register_value Counteren -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Counteren_bits:((regstate),(register_value),(Counteren))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec r.Counteren_Counteren_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Counteren_bits : Counteren -> mword ty32 -> Counteren*) + +val _ = Define ` + ((update_Counteren_bits:Counteren ->(32)words$word -> Counteren) v x= + ((v with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Counteren_HPM : Counteren -> mword ty29*) + +val _ = Define ` + ((get_Counteren_HPM:Counteren ->(29)words$word) v= + ((subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 31 : int):ii) (( 3 : int):ii) : 29 words$word)))`; + + +(*val _set_Counteren_HPM : register_ref regstate register_value Counteren -> mword ty29 -> M unit*) + +val _ = Define ` + ((set_Counteren_HPM:((regstate),(register_value),(Counteren))register_ref ->(29)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec r.Counteren_Counteren_chunk_0 (( 31 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 28 : int):ii) (( 0 : int):ii) : 29 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Counteren_HPM : Counteren -> mword ty29 -> Counteren*) + +val _ = Define ` + ((update_Counteren_HPM:Counteren ->(29)words$word -> Counteren) v x= + ((v with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 31 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 28 : int):ii) (( 0 : int):ii) : 29 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Counteren_IR : Counteren -> mword ty1*) + +val _ = Define ` + ((get_Counteren_IR:Counteren ->(1)words$word) v= + ((subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)))`; + + +(*val _set_Counteren_IR : register_ref regstate register_value Counteren -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Counteren_IR:((regstate),(register_value),(Counteren))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec r.Counteren_Counteren_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Counteren_IR : Counteren -> mword ty1 -> Counteren*) + +val _ = Define ` + ((update_Counteren_IR:Counteren ->(1)words$word -> Counteren) v x= + ((v with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Counteren_TM : Counteren -> mword ty1*) + +val _ = Define ` + ((get_Counteren_TM:Counteren ->(1)words$word) v= + ((subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +(*val _set_Counteren_TM : register_ref regstate register_value Counteren -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Counteren_TM:((regstate),(register_value),(Counteren))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec r.Counteren_Counteren_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Counteren_TM : Counteren -> mword ty1 -> Counteren*) + +val _ = Define ` + ((update_Counteren_TM:Counteren ->(1)words$word -> Counteren) v x= + ((v with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Counteren_CY : Counteren -> mword ty1*) + +val _ = Define ` + ((get_Counteren_CY:Counteren ->(1)words$word) v= + ((subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Counteren_CY : register_ref regstate register_value Counteren -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Counteren_CY:((regstate),(register_value),(Counteren))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec r.Counteren_Counteren_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Counteren_CY : Counteren -> mword ty1 -> Counteren*) + +val _ = Define ` + ((update_Counteren_CY:Counteren ->(1)words$word -> Counteren) v x= + ((v with<| + Counteren_Counteren_chunk_0 := + ((update_subrange_vec_dec v.Counteren_Counteren_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val legalize_mcounteren : Counteren -> mword ty32 -> Counteren*) + +val _ = Define ` + ((legalize_mcounteren:Counteren ->(32)words$word -> Counteren) (c : Counteren) (v : xlenbits)= + (let c = (update_Counteren_IR c ((cast_unit_vec0 ((access_vec_dec v (( 2 : int):ii))) : 1 words$word))) in + let c = (update_Counteren_TM c ((cast_unit_vec0 ((access_vec_dec v (( 1 : int):ii))) : 1 words$word))) in + update_Counteren_CY c ((cast_unit_vec0 ((access_vec_dec v (( 0 : int):ii))) : 1 words$word))))`; + + +(*val legalize_scounteren : Counteren -> mword ty32 -> Counteren*) + +val _ = Define ` + ((legalize_scounteren:Counteren ->(32)words$word -> Counteren) (c : Counteren) (v : xlenbits)= + (let c = (update_Counteren_IR c ((cast_unit_vec0 ((access_vec_dec v (( 2 : int):ii))) : 1 words$word))) in + let c = (update_Counteren_TM c ((cast_unit_vec0 ((access_vec_dec v (( 1 : int):ii))) : 1 words$word))) in + update_Counteren_CY c ((cast_unit_vec0 ((access_vec_dec v (( 0 : int):ii))) : 1 words$word))))`; + + +(*val retire_instruction : unit -> M unit*) + +val _ = Define ` + ((retire_instruction:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_written_ref) (\ (w__0 : bool) . + if (((w__0 = T))) then sail2_state_monad$write_regS minstret_written_ref F + else sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_ref : ( 64 words$word) M) (\ (w__1 : 64 words$word) . + sail2_state_monad$write_regS minstret_ref ((add_vec_int w__1 (( 1 : int):ii) : 64 words$word))))))`; + + +(*val Mk_Sstatus : mword ty32 -> Sstatus*) + +val _ = Define ` + ((Mk_Sstatus:(32)words$word -> Sstatus) v= + (<| Sstatus_Sstatus_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Sstatus_bits : Sstatus -> mword ty32*) + +val _ = Define ` + ((get_Sstatus_bits:Sstatus ->(32)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Sstatus_bits : register_ref regstate register_value Sstatus -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Sstatus_bits:((regstate),(register_value),(Sstatus))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sstatus_bits : Sstatus -> mword ty32 -> Sstatus*) + +val _ = Define ` + ((update_Sstatus_bits:Sstatus ->(32)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_SD:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_SD:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_SD:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_MXR:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 19 : int):ii) (( 19 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_MXR:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 19 : int):ii) (( 19 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_MXR:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 19 : int):ii) (( 19 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_SUM:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 18 : int):ii) (( 18 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_SUM:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 18 : int):ii) (( 18 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_SUM:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 18 : int):ii) (( 18 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_XS:Sstatus ->(2)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 16 : int):ii) (( 15 : int):ii) : 2 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_XS:((regstate),(register_value),(Sstatus))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 16 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_XS:Sstatus ->(2)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 16 : int):ii) (( 15 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_FS:Sstatus ->(2)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 14 : int):ii) (( 13 : int):ii) : 2 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_FS:((regstate),(register_value),(Sstatus))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 14 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_FS:Sstatus ->(2)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 14 : int):ii) (( 13 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_SPP:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_SPP:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_SPP:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_SPIE:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_SPIE:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_SPIE:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Sstatus_UPIE : Sstatus -> mword ty1*) + +val _ = Define ` + ((get_Sstatus_UPIE:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +(*val _set_Sstatus_UPIE : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Sstatus_UPIE:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sstatus_UPIE : Sstatus -> mword ty1 -> Sstatus*) + +val _ = Define ` + ((update_Sstatus_UPIE:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sstatus_SIE:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sstatus_SIE:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sstatus_SIE:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Sstatus_UIE : Sstatus -> mword ty1*) + +val _ = Define ` + ((get_Sstatus_UIE:Sstatus ->(1)words$word) v= ((subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Sstatus_UIE : register_ref regstate register_value Sstatus -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Sstatus_UIE:((regstate),(register_value),(Sstatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec r.Sstatus_Sstatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sstatus_UIE : Sstatus -> mword ty1 -> Sstatus*) + +val _ = Define ` + ((update_Sstatus_UIE:Sstatus ->(1)words$word -> Sstatus) v x= + ((v with<| + Sstatus_Sstatus_chunk_0 := + ((update_subrange_vec_dec v.Sstatus_Sstatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val get_sstatus_UXL : Sstatus -> mword ty2*) + +val _ = Define ` + ((get_sstatus_UXL:Sstatus ->(2)words$word) s= + (let m = (Mk_Mstatus ((get_Sstatus_bits s : 32 words$word))) in + (get_mstatus_UXL m : 2 words$word)))`; + + +(*val set_sstatus_UXL : Sstatus -> mword ty2 -> Sstatus*) + +val _ = Define ` + ((set_sstatus_UXL:Sstatus ->(2)words$word -> Sstatus) (s : Sstatus) (a : arch_xlen)= + (let m = (Mk_Mstatus ((get_Sstatus_bits s : 32 words$word))) in + let m = (set_mstatus_UXL m a) in + Mk_Sstatus ((get_Mstatus_bits m : 32 words$word))))`; + + +(*val lower_mstatus : Mstatus -> Sstatus*) + +val _ = Define ` + ((lower_mstatus:Mstatus -> Sstatus) m= + (let s = (Mk_Sstatus ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))) in + let s = (update_Sstatus_SD s ((get_Mstatus_SD m : 1 words$word))) in + let s = (set_sstatus_UXL s ((get_mstatus_UXL m : 2 words$word))) in + let s = (update_Sstatus_MXR s ((get_Mstatus_MXR m : 1 words$word))) in + let s = (update_Sstatus_SUM s ((get_Mstatus_SUM m : 1 words$word))) in + let s = (update_Sstatus_XS s ((get_Mstatus_XS m : 2 words$word))) in + let s = (update_Sstatus_FS s ((get_Mstatus_FS m : 2 words$word))) in + let s = (update_Sstatus_SPP s ((get_Mstatus_SPP m : 1 words$word))) in + let s = (update_Sstatus_SPIE s ((get_Mstatus_SPIE m : 1 words$word))) in + let s = (update_Sstatus_UPIE s ((get_Mstatus_UPIE m : 1 words$word))) in + let s = (update_Sstatus_SIE s ((get_Mstatus_SIE m : 1 words$word))) in + update_Sstatus_UIE s ((get_Mstatus_UIE m : 1 words$word))))`; + + +(*val lift_sstatus : Mstatus -> Sstatus -> M Mstatus*) + +val _ = Define ` + ((lift_sstatus:Mstatus -> Sstatus ->(regstate)sail2_state_monad$sequential_state ->(((Mstatus),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (m : Mstatus) (s : Sstatus)= + (let m = (update_Mstatus_MXR m ((get_Sstatus_MXR s : 1 words$word))) in + let m = (update_Mstatus_SUM m ((get_Sstatus_SUM s : 1 words$word))) in + let m = (update_Mstatus_XS m ((get_Sstatus_XS s : 2 words$word))) in + let m = (update_Mstatus_FS m ((get_Sstatus_FS s : 2 words$word))) in sail2_state_monad$bindS + (sail2_state$or_boolS + ( sail2_state_monad$bindS(extStatus_of_bits ((get_Mstatus_FS m : 2 words$word))) (\ (w__0 : ExtStatus) . + sail2_state_monad$returnS (((((extStatus_to_bits w__0 : 2 words$word)) = ((extStatus_to_bits Dirty : 2 words$word))))))) + ( sail2_state_monad$bindS(extStatus_of_bits ((get_Mstatus_XS m : 2 words$word))) (\ (w__1 : ExtStatus) . + sail2_state_monad$returnS (((((extStatus_to_bits w__1 : 2 words$word)) = ((extStatus_to_bits Dirty : 2 words$word)))))))) (\ (w__2 : bool) . + let m = (update_Mstatus_SD m ((bool_to_bits w__2 : 1 words$word))) in + let m = (update_Mstatus_SPP m ((get_Sstatus_SPP s : 1 words$word))) in + let m = (update_Mstatus_SPIE m ((get_Sstatus_SPIE s : 1 words$word))) in + let m = (update_Mstatus_UPIE m ((get_Sstatus_UPIE s : 1 words$word))) in + let m = (update_Mstatus_SIE m ((get_Sstatus_SIE s : 1 words$word))) in + let m = (update_Mstatus_UIE m ((get_Sstatus_UIE s : 1 words$word))) in + sail2_state_monad$returnS m)))`; + + +(*val legalize_sstatus : Mstatus -> mword ty32 -> M Mstatus*) + +val _ = Define ` + ((legalize_sstatus:Mstatus ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Mstatus),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (m : Mstatus) (v : xlenbits)= (lift_sstatus m ((Mk_Sstatus v))))`; + + +(*val Mk_Sedeleg : mword ty32 -> Sedeleg*) + +val _ = Define ` + ((Mk_Sedeleg:(32)words$word -> Sedeleg) v= + (<| Sedeleg_Sedeleg_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Sedeleg_bits : Sedeleg -> mword ty32*) + +val _ = Define ` + ((get_Sedeleg_bits:Sedeleg ->(32)words$word) v= ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Sedeleg_bits : register_ref regstate register_value Sedeleg -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Sedeleg_bits:((regstate),(register_value),(Sedeleg))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sedeleg_bits : Sedeleg -> mword ty32 -> Sedeleg*) + +val _ = Define ` + ((update_Sedeleg_bits:Sedeleg ->(32)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_UEnvCall:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_UEnvCall:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_UEnvCall:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_SAMO_Access_Fault:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_SAMO_Access_Fault:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_SAMO_Access_Fault:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_SAMO_Addr_Align:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_SAMO_Addr_Align:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_SAMO_Addr_Align:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_Load_Access_Fault:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_Load_Access_Fault:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_Load_Access_Fault:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_Load_Addr_Align:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_Load_Addr_Align:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_Load_Addr_Align:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_Breakpoint:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_Breakpoint:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_Breakpoint:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_Illegal_Instr:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_Illegal_Instr:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_Illegal_Instr:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_Fetch_Access_Fault:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_Fetch_Access_Fault:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_Fetch_Access_Fault:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sedeleg_Fetch_Addr_Align:Sedeleg ->(1)words$word) v= + ((subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sedeleg_Fetch_Addr_Align:((regstate),(register_value),(Sedeleg))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec r.Sedeleg_Sedeleg_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sedeleg_Fetch_Addr_Align:Sedeleg ->(1)words$word -> Sedeleg) v x= + ((v with<| + Sedeleg_Sedeleg_chunk_0 := + ((update_subrange_vec_dec v.Sedeleg_Sedeleg_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val legalize_sedeleg : Sedeleg -> mword ty32 -> Sedeleg*) + +val _ = Define ` + ((legalize_sedeleg:Sedeleg ->(32)words$word -> Sedeleg) (s : Sedeleg) (v : xlenbits)= + (Mk_Sedeleg ((EXTZ (( 32 : int):ii) ((subrange_vec_dec v (( 8 : int):ii) (( 0 : int):ii) : 9 words$word)) : 32 words$word))))`; + + +(*val Mk_Sinterrupts : mword ty32 -> Sinterrupts*) + +val _ = Define ` + ((Mk_Sinterrupts:(32)words$word -> Sinterrupts) v= + (<| Sinterrupts_Sinterrupts_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Sinterrupts_bits : Sinterrupts -> mword ty32*) + +val _ = Define ` + ((get_Sinterrupts_bits:Sinterrupts ->(32)words$word) v= + ((subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Sinterrupts_bits : register_ref regstate register_value Sinterrupts -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Sinterrupts_bits:((regstate),(register_value),(Sinterrupts))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Sinterrupts_Sinterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sinterrupts_bits : Sinterrupts -> mword ty32 -> Sinterrupts*) + +val _ = Define ` + ((update_Sinterrupts_bits:Sinterrupts ->(32)words$word -> Sinterrupts) v x= + ((v with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sinterrupts_SEI:Sinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 9 : int):ii) (( 9 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sinterrupts_SEI:((regstate),(register_value),(Sinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Sinterrupts_Sinterrupts_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sinterrupts_SEI:Sinterrupts ->(1)words$word -> Sinterrupts) v x= + ((v with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 9 : int):ii) (( 9 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Sinterrupts_UEI : Sinterrupts -> mword ty1*) + +val _ = Define ` + ((get_Sinterrupts_UEI:Sinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +(*val _set_Sinterrupts_UEI : register_ref regstate register_value Sinterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Sinterrupts_UEI:((regstate),(register_value),(Sinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Sinterrupts_Sinterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sinterrupts_UEI : Sinterrupts -> mword ty1 -> Sinterrupts*) + +val _ = Define ` + ((update_Sinterrupts_UEI:Sinterrupts ->(1)words$word -> Sinterrupts) v x= + ((v with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sinterrupts_STI:Sinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sinterrupts_STI:((regstate),(register_value),(Sinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Sinterrupts_Sinterrupts_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sinterrupts_STI:Sinterrupts ->(1)words$word -> Sinterrupts) v x= + ((v with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Sinterrupts_UTI : Sinterrupts -> mword ty1*) + +val _ = Define ` + ((get_Sinterrupts_UTI:Sinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +(*val _set_Sinterrupts_UTI : register_ref regstate register_value Sinterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Sinterrupts_UTI:((regstate),(register_value),(Sinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Sinterrupts_Sinterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sinterrupts_UTI : Sinterrupts -> mword ty1 -> Sinterrupts*) + +val _ = Define ` + ((update_Sinterrupts_UTI:Sinterrupts ->(1)words$word -> Sinterrupts) v x= + ((v with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Sinterrupts_SSI:Sinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Sinterrupts_SSI:((regstate),(register_value),(Sinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Sinterrupts_Sinterrupts_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Sinterrupts_SSI:Sinterrupts ->(1)words$word -> Sinterrupts) v x= + ((v with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_Sinterrupts_USI : Sinterrupts -> mword ty1*) + +val _ = Define ` + ((get_Sinterrupts_USI:Sinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Sinterrupts_USI : register_ref regstate register_value Sinterrupts -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Sinterrupts_USI:((regstate),(register_value),(Sinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Sinterrupts_Sinterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Sinterrupts_USI : Sinterrupts -> mword ty1 -> Sinterrupts*) + +val _ = Define ` + ((update_Sinterrupts_USI:Sinterrupts ->(1)words$word -> Sinterrupts) v x= + ((v with<| + Sinterrupts_Sinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Sinterrupts_Sinterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val lower_mip : Minterrupts -> Minterrupts -> Sinterrupts*) + +val _ = Define ` + ((lower_mip:Minterrupts -> Minterrupts -> Sinterrupts) (m : Minterrupts) (d : Minterrupts)= + (let (s : Sinterrupts) = + (Mk_Sinterrupts ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))) in + let s = + (update_Sinterrupts_SEI s + ((and_vec ((get_Minterrupts_SEI m : 1 words$word)) ((get_Minterrupts_SEI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_STI s + ((and_vec ((get_Minterrupts_STI m : 1 words$word)) ((get_Minterrupts_STI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_SSI s + ((and_vec ((get_Minterrupts_SSI m : 1 words$word)) ((get_Minterrupts_SSI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_UEI s + ((and_vec ((get_Minterrupts_UEI m : 1 words$word)) ((get_Minterrupts_UEI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_UTI s + ((and_vec ((get_Minterrupts_UTI m : 1 words$word)) ((get_Minterrupts_UTI d : 1 words$word)) + : 1 words$word))) in + update_Sinterrupts_USI s + ((and_vec ((get_Minterrupts_USI m : 1 words$word)) ((get_Minterrupts_USI d : 1 words$word)) + : 1 words$word))))`; + + +(*val lower_mie : Minterrupts -> Minterrupts -> Sinterrupts*) + +val _ = Define ` + ((lower_mie:Minterrupts -> Minterrupts -> Sinterrupts) (m : Minterrupts) (d : Minterrupts)= + (let (s : Sinterrupts) = + (Mk_Sinterrupts ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))) in + let s = + (update_Sinterrupts_SEI s + ((and_vec ((get_Minterrupts_SEI m : 1 words$word)) ((get_Minterrupts_SEI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_STI s + ((and_vec ((get_Minterrupts_STI m : 1 words$word)) ((get_Minterrupts_STI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_SSI s + ((and_vec ((get_Minterrupts_SSI m : 1 words$word)) ((get_Minterrupts_SSI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_UEI s + ((and_vec ((get_Minterrupts_UEI m : 1 words$word)) ((get_Minterrupts_UEI d : 1 words$word)) + : 1 words$word))) in + let s = + (update_Sinterrupts_UTI s + ((and_vec ((get_Minterrupts_UTI m : 1 words$word)) ((get_Minterrupts_UTI d : 1 words$word)) + : 1 words$word))) in + update_Sinterrupts_USI s + ((and_vec ((get_Minterrupts_USI m : 1 words$word)) ((get_Minterrupts_USI d : 1 words$word)) + : 1 words$word))))`; + + +(*val lift_sip : Minterrupts -> Minterrupts -> Sinterrupts -> M Minterrupts*) + +val _ = Define ` + ((lift_sip:Minterrupts -> Minterrupts -> Sinterrupts ->(regstate)sail2_state_monad$sequential_state ->(((Minterrupts),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (o1 : Minterrupts) (d : Minterrupts) (s : Sinterrupts)= + (let (m : Minterrupts) = o1 in + let m = + (update_Minterrupts_SSI m + ((and_vec ((get_Sinterrupts_SSI s : 1 words$word)) ((get_Minterrupts_SSI d : 1 words$word)) + : 1 words$word))) in sail2_state_monad$bindS + (haveNExt () ) (\ (w__0 : bool) . + sail2_state_monad$returnS (if w__0 then + let m = + (if (((((get_Minterrupts_UEI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Minterrupts_UEI m ((get_Sinterrupts_UEI s : 1 words$word)) + else m) in + if (((((get_Minterrupts_USI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + update_Minterrupts_USI m ((get_Sinterrupts_USI s : 1 words$word)) + else m + else m))))`; + + +(*val legalize_sip : Minterrupts -> Minterrupts -> mword ty32 -> M Minterrupts*) + +val _ = Define ` + ((legalize_sip:Minterrupts -> Minterrupts ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Minterrupts),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (m : Minterrupts) (d : Minterrupts) (v : xlenbits)= + (lift_sip m d ((Mk_Sinterrupts v))))`; + + +(*val lift_sie : Minterrupts -> Minterrupts -> Sinterrupts -> M Minterrupts*) + +val _ = Define ` + ((lift_sie:Minterrupts -> Minterrupts -> Sinterrupts ->(regstate)sail2_state_monad$sequential_state ->(((Minterrupts),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (o1 : Minterrupts) (d : Minterrupts) (s : Sinterrupts)= + (let (m : Minterrupts) = o1 in + let m = + (if (((((get_Minterrupts_SEI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Minterrupts_SEI m ((get_Sinterrupts_SEI s : 1 words$word)) + else m) in + let m = + (if (((((get_Minterrupts_STI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Minterrupts_STI m ((get_Sinterrupts_STI s : 1 words$word)) + else m) in + let m = + (if (((((get_Minterrupts_SSI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Minterrupts_SSI m ((get_Sinterrupts_SSI s : 1 words$word)) + else m) in sail2_state_monad$bindS + (haveNExt () ) (\ (w__0 : bool) . + sail2_state_monad$returnS (if w__0 then + let m = + (if (((((get_Minterrupts_UEI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Minterrupts_UEI m ((get_Sinterrupts_UEI s : 1 words$word)) + else m) in + let m = + (if (((((get_Minterrupts_UTI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Minterrupts_UTI m ((get_Sinterrupts_UTI s : 1 words$word)) + else m) in + if (((((get_Minterrupts_USI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + update_Minterrupts_USI m ((get_Sinterrupts_USI s : 1 words$word)) + else m + else m))))`; + + +(*val legalize_sie : Minterrupts -> Minterrupts -> mword ty32 -> M Minterrupts*) + +val _ = Define ` + ((legalize_sie:Minterrupts -> Minterrupts ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Minterrupts),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (m : Minterrupts) (d : Minterrupts) (v : xlenbits)= + (lift_sie m d ((Mk_Sinterrupts v))))`; + + +(*val Mk_Satp64 : mword ty64 -> Satp64*) + +val _ = Define ` + ((Mk_Satp64:(64)words$word -> Satp64) v= (<| Satp64_Satp64_chunk_0 := ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) |>))`; + + +(*val _get_Satp64_bits : Satp64 -> mword ty64*) + +val _ = Define ` + ((get_Satp64_bits:Satp64 ->(64)words$word) v= ((subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)))`; + + +(*val _set_Satp64_bits : register_ref regstate register_value Satp64 -> mword ty64 -> M unit*) + +val _ = Define ` + ((set_Satp64_bits:((regstate),(register_value),(Satp64))register_ref ->(64)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec r.Satp64_Satp64_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Satp64_bits : Satp64 -> mword ty64 -> Satp64*) + +val _ = Define ` + ((update_Satp64_bits:Satp64 ->(64)words$word -> Satp64) v x= + ((v with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_Satp64_Mode : Satp64 -> mword ty4*) + +val _ = Define ` + ((get_Satp64_Mode:Satp64 ->(4)words$word) v= ((subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 63 : int):ii) (( 60 : int):ii) : 4 words$word)))`; + + +(*val _set_Satp64_Mode : register_ref regstate register_value Satp64 -> mword ty4 -> M unit*) + +val _ = Define ` + ((set_Satp64_Mode:((regstate),(register_value),(Satp64))register_ref ->(4)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec r.Satp64_Satp64_chunk_0 (( 63 : int):ii) (( 60 : int):ii) + ((subrange_vec_dec v (( 3 : int):ii) (( 0 : int):ii) : 4 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Satp64_Mode : Satp64 -> mword ty4 -> Satp64*) + +val _ = Define ` + ((update_Satp64_Mode:Satp64 ->(4)words$word -> Satp64) v x= + ((v with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 63 : int):ii) (( 60 : int):ii) + ((subrange_vec_dec x (( 3 : int):ii) (( 0 : int):ii) : 4 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_Satp64_Asid : Satp64 -> mword ty16*) + +val _ = Define ` + ((get_Satp64_Asid:Satp64 ->(16)words$word) v= ((subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 59 : int):ii) (( 44 : int):ii) : 16 words$word)))`; + + +(*val _set_Satp64_Asid : register_ref regstate register_value Satp64 -> mword ty16 -> M unit*) + +val _ = Define ` + ((set_Satp64_Asid:((regstate),(register_value),(Satp64))register_ref ->(16)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec r.Satp64_Satp64_chunk_0 (( 59 : int):ii) (( 44 : int):ii) + ((subrange_vec_dec v (( 15 : int):ii) (( 0 : int):ii) : 16 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Satp64_Asid : Satp64 -> mword ty16 -> Satp64*) + +val _ = Define ` + ((update_Satp64_Asid:Satp64 ->(16)words$word -> Satp64) v x= + ((v with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 59 : int):ii) (( 44 : int):ii) + ((subrange_vec_dec x (( 15 : int):ii) (( 0 : int):ii) : 16 words$word)) + : 64 words$word))|>)))`; + + +(*val _update_Satp32_Asid : Satp32 -> mword ty9 -> Satp32*) + +(*val _get_Satp32_Asid : Satp32 -> mword ty9*) + +(*val _set_Satp32_Asid : register_ref regstate register_value Satp32 -> mword ty9 -> M unit*) + +(*val _get_Satp64_PPN : Satp64 -> mword ty44*) + +val _ = Define ` + ((get_Satp64_PPN:Satp64 ->(44)words$word) v= ((subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)))`; + + +(*val _set_Satp64_PPN : register_ref regstate register_value Satp64 -> mword ty44 -> M unit*) + +val _ = Define ` + ((set_Satp64_PPN:((regstate),(register_value),(Satp64))register_ref ->(44)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec r.Satp64_Satp64_chunk_0 (( 43 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Satp64_PPN : Satp64 -> mword ty44 -> Satp64*) + +val _ = Define ` + ((update_Satp64_PPN:Satp64 ->(44)words$word -> Satp64) v x= + ((v with<| + Satp64_Satp64_chunk_0 := + ((update_subrange_vec_dec v.Satp64_Satp64_chunk_0 (( 43 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 64 words$word))|>)))`; + + +(*val _update_Satp32_PPN : Satp32 -> mword ty22 -> Satp32*) + +(*val _get_Satp32_PPN : Satp32 -> mword ty22*) + +(*val _set_Satp32_PPN : register_ref regstate register_value Satp32 -> mword ty22 -> M unit*) + +(*val legalize_satp64 : Architecture -> mword ty64 -> mword ty64 -> mword ty64*) + +val _ = Define ` + ((legalize_satp64:Architecture ->(64)words$word ->(64)words$word ->(64)words$word) (a : Architecture) (o1 : 64 bits) (v : 64 bits)= + (let s = (Mk_Satp64 v) in + (case ((satp64Mode_of_bits a ((get_Satp64_Mode s : 4 words$word)))) of + NONE => o1 + | SOME (Sv32) => o1 + | SOME (_) => (get_Satp64_bits s : 64 words$word) + )))`; + + +(*val Mk_Satp32 : mword ty32 -> Satp32*) + +val _ = Define ` + ((Mk_Satp32:(32)words$word -> Satp32) v= (<| Satp32_Satp32_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Satp32_bits : Satp32 -> mword ty32*) + +val _ = Define ` + ((get_Satp32_bits:Satp32 ->(32)words$word) v= ((subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Satp32_bits : register_ref regstate register_value Satp32 -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Satp32_bits:((regstate),(register_value),(Satp32))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec r.Satp32_Satp32_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Satp32_bits : Satp32 -> mword ty32 -> Satp32*) + +val _ = Define ` + ((update_Satp32_bits:Satp32 ->(32)words$word -> Satp32) v x= + ((v with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Satp32_Mode:Satp32 ->(1)words$word) v= ((subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Satp32_Mode:((regstate),(register_value),(Satp32))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec r.Satp32_Satp32_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Satp32_Mode:Satp32 ->(1)words$word -> Satp32) v x= + ((v with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 31 : int):ii) (( 31 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Satp32_Asid:Satp32 ->(9)words$word) v= ((subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 30 : int):ii) (( 22 : int):ii) : 9 words$word)))`; + + +val _ = Define ` + ((set_Satp32_Asid:((regstate),(register_value),(Satp32))register_ref ->(9)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec r.Satp32_Satp32_chunk_0 (( 30 : int):ii) (( 22 : int):ii) + ((subrange_vec_dec v (( 8 : int):ii) (( 0 : int):ii) : 9 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Satp32_Asid:Satp32 ->(9)words$word -> Satp32) v x= + ((v with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 30 : int):ii) (( 22 : int):ii) + ((subrange_vec_dec x (( 8 : int):ii) (( 0 : int):ii) : 9 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Satp32_PPN:Satp32 ->(22)words$word) v= ((subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 21 : int):ii) (( 0 : int):ii) : 22 words$word)))`; + + +val _ = Define ` + ((set_Satp32_PPN:((regstate),(register_value),(Satp32))register_ref ->(22)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec r.Satp32_Satp32_chunk_0 (( 21 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 21 : int):ii) (( 0 : int):ii) : 22 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Satp32_PPN:Satp32 ->(22)words$word -> Satp32) v x= + ((v with<| + Satp32_Satp32_chunk_0 := + ((update_subrange_vec_dec v.Satp32_Satp32_chunk_0 (( 21 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 21 : int):ii) (( 0 : int):ii) : 22 words$word)) + : 32 words$word))|>)))`; + + +(*val legalize_satp32 : Architecture -> mword ty32 -> mword ty32 -> mword ty32*) + +val _ = Define ` + ((legalize_satp32:Architecture ->(32)words$word ->(32)words$word ->(32)words$word) (a : Architecture) (o1 : 32 bits) (v : 32 bits)= v)`; + + +(*val PmpAddrMatchType_of_num : integer -> PmpAddrMatchType*) + +val _ = Define ` + ((PmpAddrMatchType_of_num:int -> PmpAddrMatchType) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then OFF + else if (((p0_ = (( 1 : int):ii)))) then TOR + else if (((p0_ = (( 2 : int):ii)))) then NA4 + else NAPOT))`; + + +(*val num_of_PmpAddrMatchType : PmpAddrMatchType -> integer*) + +val _ = Define ` + ((num_of_PmpAddrMatchType:PmpAddrMatchType -> int) arg_= + ((case arg_ of OFF => (( 0 : int):ii) | TOR => (( 1 : int):ii) | NA4 => (( 2 : int):ii) | NAPOT => (( 3 : int):ii) )))`; + + +(*val pmpAddrMatchType_of_bits : mword ty2 -> M PmpAddrMatchType*) + +val _ = Define ` + ((pmpAddrMatchType_of_bits:(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((PmpAddrMatchType),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) bs= + (let b__0 = bs in + if (((b__0 = (vec_of_bits [B0;B0] : 2 words$word)))) then sail2_state_monad$returnS OFF + else if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then sail2_state_monad$returnS TOR + else if (((b__0 = (vec_of_bits [B1;B0] : 2 words$word)))) then sail2_state_monad$returnS NA4 + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then sail2_state_monad$returnS NAPOT + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at model/riscv_pmp_regs.sail 7:2 - 12:3") (sail2_state_monad$exitS () )))`; + + +(*val pmpAddrMatchType_to_bits : PmpAddrMatchType -> mword ty2*) + +val _ = Define ` + ((pmpAddrMatchType_to_bits:PmpAddrMatchType ->(2)words$word) bs= + ((case bs of + OFF => (vec_of_bits [B0;B0] : 2 words$word) + | TOR => (vec_of_bits [B0;B1] : 2 words$word) + | NA4 => (vec_of_bits [B1;B0] : 2 words$word) + | NAPOT => (vec_of_bits [B1;B1] : 2 words$word) + )))`; + + +(*val Mk_Pmpcfg_ent : mword ty8 -> Pmpcfg_ent*) + +val _ = Define ` + ((Mk_Pmpcfg_ent:(8)words$word -> Pmpcfg_ent) v= + (<| Pmpcfg_ent_Pmpcfg_ent_chunk_0 := ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) |>))`; + + +(*val _get_Pmpcfg_ent_bits : Pmpcfg_ent -> mword ty8*) + +val _ = Define ` + ((get_Pmpcfg_ent_bits:Pmpcfg_ent ->(8)words$word) v= + ((subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)))`; + + +(*val _set_Pmpcfg_ent_bits : register_ref regstate register_value Pmpcfg_ent -> mword ty8 -> M unit*) + +val _ = Define ` + ((set_Pmpcfg_ent_bits:((regstate),(register_value),(Pmpcfg_ent))register_ref ->(8)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec r.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Pmpcfg_ent_bits : Pmpcfg_ent -> mword ty8 -> Pmpcfg_ent*) + +val _ = Define ` + ((update_Pmpcfg_ent_bits:Pmpcfg_ent ->(8)words$word -> Pmpcfg_ent) v x= + ((v with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_Pmpcfg_ent_L:Pmpcfg_ent ->(1)words$word) v= + ((subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Pmpcfg_ent_L:((regstate),(register_value),(Pmpcfg_ent))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec r.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Pmpcfg_ent_L:Pmpcfg_ent ->(1)words$word -> Pmpcfg_ent) v x= + ((v with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +(*val _get_Pmpcfg_ent_A : Pmpcfg_ent -> mword ty2*) + +val _ = Define ` + ((get_Pmpcfg_ent_A:Pmpcfg_ent ->(2)words$word) v= + ((subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)))`; + + +(*val _set_Pmpcfg_ent_A : register_ref regstate register_value Pmpcfg_ent -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_Pmpcfg_ent_A:((regstate),(register_value),(Pmpcfg_ent))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec r.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 4 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Pmpcfg_ent_A : Pmpcfg_ent -> mword ty2 -> Pmpcfg_ent*) + +val _ = Define ` + ((update_Pmpcfg_ent_A:Pmpcfg_ent ->(2)words$word -> Pmpcfg_ent) v x= + ((v with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 4 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 8 words$word))|>)))`; + + +(*val _get_Pmpcfg_ent_X : Pmpcfg_ent -> mword ty1*) + +val _ = Define ` + ((get_Pmpcfg_ent_X:Pmpcfg_ent ->(1)words$word) v= + ((subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)))`; + + +(*val _set_Pmpcfg_ent_X : register_ref regstate register_value Pmpcfg_ent -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Pmpcfg_ent_X:((regstate),(register_value),(Pmpcfg_ent))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec r.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Pmpcfg_ent_X : Pmpcfg_ent -> mword ty1 -> Pmpcfg_ent*) + +val _ = Define ` + ((update_Pmpcfg_ent_X:Pmpcfg_ent ->(1)words$word -> Pmpcfg_ent) v x= + ((v with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +(*val _get_Pmpcfg_ent_W : Pmpcfg_ent -> mword ty1*) + +val _ = Define ` + ((get_Pmpcfg_ent_W:Pmpcfg_ent ->(1)words$word) v= + ((subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +(*val _set_Pmpcfg_ent_W : register_ref regstate register_value Pmpcfg_ent -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Pmpcfg_ent_W:((regstate),(register_value),(Pmpcfg_ent))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec r.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Pmpcfg_ent_W : Pmpcfg_ent -> mword ty1 -> Pmpcfg_ent*) + +val _ = Define ` + ((update_Pmpcfg_ent_W:Pmpcfg_ent ->(1)words$word -> Pmpcfg_ent) v x= + ((v with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +(*val _get_Pmpcfg_ent_R : Pmpcfg_ent -> mword ty1*) + +val _ = Define ` + ((get_Pmpcfg_ent_R:Pmpcfg_ent ->(1)words$word) v= + ((subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +(*val _set_Pmpcfg_ent_R : register_ref regstate register_value Pmpcfg_ent -> mword ty1 -> M unit*) + +val _ = Define ` + ((set_Pmpcfg_ent_R:((regstate),(register_value),(Pmpcfg_ent))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec r.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Pmpcfg_ent_R : Pmpcfg_ent -> mword ty1 -> Pmpcfg_ent*) + +val _ = Define ` + ((update_Pmpcfg_ent_R:Pmpcfg_ent ->(1)words$word -> Pmpcfg_ent) v x= + ((v with<| + Pmpcfg_ent_Pmpcfg_ent_chunk_0 := + ((update_subrange_vec_dec v.Pmpcfg_ent_Pmpcfg_ent_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +(*val pmpReadCfgReg : integer -> M (mword ty32)*) + +val _ = Define ` + ((pmpReadCfgReg:int ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) n= + (let p0_ = n in + if (((p0_ = (( 0 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp3cfg_ref) (\ (w__0 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp2cfg_ref) (\ (w__1 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp1cfg_ref) (\ (w__2 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp0cfg_ref) (\ (w__3 : Pmpcfg_ent) . + sail2_state_monad$returnS ((concat_vec ((get_Pmpcfg_ent_bits w__0 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__1 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__2 : 8 words$word)) + ((get_Pmpcfg_ent_bits w__3 : 8 words$word)) + : 16 words$word)) + : 24 words$word)) + : 32 words$word)))))) + else if (((p0_ = (( 1 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp7cfg_ref) (\ (w__4 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp6cfg_ref) (\ (w__5 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp5cfg_ref) (\ (w__6 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp4cfg_ref) (\ (w__7 : Pmpcfg_ent) . + sail2_state_monad$returnS ((concat_vec ((get_Pmpcfg_ent_bits w__4 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__5 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__6 : 8 words$word)) + ((get_Pmpcfg_ent_bits w__7 : 8 words$word)) + : 16 words$word)) + : 24 words$word)) + : 32 words$word)))))) + else if (((p0_ = (( 2 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp11cfg_ref) (\ (w__8 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp10cfg_ref) (\ (w__9 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp9cfg_ref) (\ (w__10 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp8cfg_ref) (\ (w__11 : Pmpcfg_ent) . + sail2_state_monad$returnS ((concat_vec ((get_Pmpcfg_ent_bits w__8 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__9 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__10 : 8 words$word)) + ((get_Pmpcfg_ent_bits w__11 : 8 words$word)) + : 16 words$word)) + : 24 words$word)) + : 32 words$word)))))) + else if (((p0_ = (( 3 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp15cfg_ref) (\ (w__12 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp14cfg_ref) (\ (w__13 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp13cfg_ref) (\ (w__14 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp12cfg_ref) (\ (w__15 : Pmpcfg_ent) . + sail2_state_monad$returnS ((concat_vec ((get_Pmpcfg_ent_bits w__12 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__13 : 8 words$word)) + ((concat_vec ((get_Pmpcfg_ent_bits w__14 : 8 words$word)) + ((get_Pmpcfg_ent_bits w__15 : 8 words$word)) + : 16 words$word)) + : 24 words$word)) + : 32 words$word)))))) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at model/riscv_pmp_regs.sail 75:2 - 85:8") (sail2_state_monad$exitS () )))`; + + +(*val pmpWriteCfg : Pmpcfg_ent -> mword ty8 -> Pmpcfg_ent*) + +val _ = Define ` + ((pmpWriteCfg:Pmpcfg_ent ->(8)words$word -> Pmpcfg_ent) (cfg : Pmpcfg_ent) (v : 8 bits)= + (if (((((get_Pmpcfg_ent_L cfg : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then cfg + else Mk_Pmpcfg_ent v))`; + + +(*val pmpWriteCfgReg : integer -> mword ty32 -> M unit*) + +val _ = Define ` + ((pmpWriteCfgReg:int ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) n v= + (let p0_ = n in + if (((p0_ = (( 0 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp0cfg_ref) (\ (w__0 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp0cfg_ref ((pmpWriteCfg w__0 ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp1cfg_ref)) (\ (w__1 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp1cfg_ref ((pmpWriteCfg w__1 ((subrange_vec_dec v (( 15 : int):ii) (( 8 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp2cfg_ref)) (\ (w__2 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp2cfg_ref ((pmpWriteCfg w__2 ((subrange_vec_dec v (( 23 : int):ii) (( 16 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp3cfg_ref)) (\ (w__3 : Pmpcfg_ent) . + sail2_state_monad$write_regS pmp3cfg_ref ((pmpWriteCfg w__3 ((subrange_vec_dec v (( 31 : int):ii) (( 24 : int):ii) : 8 words$word)))))))) + else if (((p0_ = (( 1 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp4cfg_ref) (\ (w__4 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp4cfg_ref ((pmpWriteCfg w__4 ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp5cfg_ref)) (\ (w__5 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp5cfg_ref ((pmpWriteCfg w__5 ((subrange_vec_dec v (( 15 : int):ii) (( 8 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp6cfg_ref)) (\ (w__6 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp6cfg_ref ((pmpWriteCfg w__6 ((subrange_vec_dec v (( 23 : int):ii) (( 16 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp7cfg_ref)) (\ (w__7 : Pmpcfg_ent) . + sail2_state_monad$write_regS pmp7cfg_ref ((pmpWriteCfg w__7 ((subrange_vec_dec v (( 31 : int):ii) (( 24 : int):ii) : 8 words$word)))))))) + else if (((p0_ = (( 2 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp8cfg_ref) (\ (w__8 : Pmpcfg_ent) . + let pmp8cfg8 = (pmpWriteCfg w__8 ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word))) in sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp9cfg_ref) (\ (w__9 : Pmpcfg_ent) . + let pmp9cfg9 = (pmpWriteCfg w__9 ((subrange_vec_dec v (( 15 : int):ii) (( 8 : int):ii) : 8 words$word))) in sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp10cfg_ref) (\ (w__10 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + pmp10cfg_ref + ((pmpWriteCfg w__10 ((subrange_vec_dec v (( 23 : int):ii) (( 16 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp11cfg_ref)) (\ (w__11 : Pmpcfg_ent) . + sail2_state_monad$write_regS + pmp11cfg_ref + ((pmpWriteCfg w__11 ((subrange_vec_dec v (( 31 : int):ii) (( 24 : int):ii) : 8 words$word)))))))) + else if (((p0_ = (( 3 : int):ii)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp12cfg_ref) (\ (w__12 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp12cfg_ref ((pmpWriteCfg w__12 ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp13cfg_ref)) (\ (w__13 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp13cfg_ref ((pmpWriteCfg w__13 ((subrange_vec_dec v (( 15 : int):ii) (( 8 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp14cfg_ref)) (\ (w__14 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + pmp14cfg_ref + ((pmpWriteCfg w__14 ((subrange_vec_dec v (( 23 : int):ii) (( 16 : int):ii) : 8 words$word))))) + (sail2_state_monad$read_regS pmp15cfg_ref)) (\ (w__15 : Pmpcfg_ent) . + sail2_state_monad$write_regS + pmp15cfg_ref + ((pmpWriteCfg w__15 ((subrange_vec_dec v (( 31 : int):ii) (( 24 : int):ii) : 8 words$word)))))))) + else sail2_state_monad$seqS + (sail2_state_monad$assert_expS F "Pattern match failure at model/riscv_pmp_regs.sail 94:2 - 137:8") (sail2_state_monad$exitS () )))`; + + +(*val pmpWriteAddr : Pmpcfg_ent -> mword ty32 -> mword ty32 -> mword ty32*) + +val _ = Define ` + ((pmpWriteAddr:Pmpcfg_ent ->(32)words$word ->(32)words$word ->(32)words$word) (cfg : Pmpcfg_ent) (reg : xlenbits) (v : xlenbits)= + (if (((((get_Pmpcfg_ent_L cfg : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then reg + else v))`; + + +(*val pmpAddrRange : Pmpcfg_ent -> mword ty32 -> mword ty32 -> M (maybe ((mword ty32 * mword ty32)))*) + +val _ = Define ` + ((pmpAddrRange:Pmpcfg_ent ->(32)words$word ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((((32)words$word#(32)words$word)option),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (cfg : Pmpcfg_ent) (pmpaddr : xlenbits) (prev_pmpaddr : xlenbits)= (sail2_state_monad$bindS + (pmpAddrMatchType_of_bits ((get_Pmpcfg_ent_A cfg : 2 words$word))) (\ (w__0 : PmpAddrMatchType) . + sail2_state_monad$returnS ((case w__0 of + OFF => NONE + | TOR => SOME ((shiftl prev_pmpaddr (( 2 : int):ii) : 32 words$word), (shiftl pmpaddr (( 2 : int):ii) : 32 words$word)) + | NA4 => + let lo = ((shiftl pmpaddr (( 2 : int):ii) : 32 words$word)) in + SOME (lo, (add_vec_int lo (( 4 : int):ii) : 32 words$word)) + | NAPOT => + let mask = ((xor_vec pmpaddr ((add_vec_int pmpaddr (( 1 : int):ii) : 32 words$word)) : 32 words$word)) in + let lo = ((and_vec pmpaddr ((not_vec mask : 32 words$word)) : 32 words$word)) in + let len = ((add_vec_int mask (( 1 : int):ii) : 32 words$word)) in + SOME ((shiftl lo (( 2 : int):ii) : 32 words$word), + (shiftl ((add_vec lo len : 32 words$word)) (( 2 : int):ii) : 32 words$word)) + )))))`; + + +(*val pmpCheckRWX : Pmpcfg_ent -> AccessType -> bool*) + +val _ = Define ` + ((pmpCheckRWX:Pmpcfg_ent -> AccessType -> bool) ent acc= + ((case acc of + Read => (((get_Pmpcfg_ent_R ent : 1 words$word)) = ((bool_to_bits T : 1 words$word))) + | Write => (((get_Pmpcfg_ent_W ent : 1 words$word)) = ((bool_to_bits T : 1 words$word))) + | ReadWrite => + ((((((get_Pmpcfg_ent_R ent : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ (((((get_Pmpcfg_ent_W ent : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))) + | Execute => (((get_Pmpcfg_ent_X ent : 1 words$word)) = ((bool_to_bits T : 1 words$word))) + )))`; + + +(*val pmpCheckPerms : Pmpcfg_ent -> AccessType -> Privilege -> bool*) + +val _ = Define ` + ((pmpCheckPerms:Pmpcfg_ent -> AccessType -> Privilege -> bool) ent acc priv= + ((case priv of + Machine => + if (((((get_Pmpcfg_ent_L ent : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + pmpCheckRWX ent acc + else T + | _ => pmpCheckRWX ent acc + )))`; + + +(*val pmpAddrMatch_of_num : integer -> pmpAddrMatch*) + +val _ = Define ` + ((pmpAddrMatch_of_num:int -> pmpAddrMatch) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then PMP_NoMatch + else if (((p0_ = (( 1 : int):ii)))) then PMP_PartialMatch + else PMP_Match))`; + + +(*val num_of_pmpAddrMatch : pmpAddrMatch -> integer*) + +val _ = Define ` + ((num_of_pmpAddrMatch:pmpAddrMatch -> int) arg_= + ((case arg_ of PMP_NoMatch => (( 0 : int):ii) | PMP_PartialMatch => (( 1 : int):ii) | PMP_Match => (( 2 : int):ii) )))`; + + +(*val pmpMatchAddr : mword ty32 -> mword ty32 -> maybe ((mword ty32 * mword ty32)) -> pmpAddrMatch*) + +val _ = Define ` + ((pmpMatchAddr:(32)words$word ->(32)words$word ->(xlenbits#xlenbits)option -> pmpAddrMatch) (addr : xlenbits) (width : xlenbits) (rng : pmp_addr_range)= + ((case rng of + NONE => PMP_NoMatch + | SOME ((lo, hi)) => + if ((zopz0zI_u hi lo)) then PMP_NoMatch + else if (((((zopz0zI_u ((add_vec addr width : 32 words$word)) lo)) \/ ((zopz0zI_u hi addr))))) + then + PMP_NoMatch + else if (((((zopz0zIzJ_u lo addr)) /\ ((zopz0zIzJ_u ((add_vec addr width : 32 words$word)) hi))))) then + PMP_Match + else PMP_PartialMatch + )))`; + + +(*val pmpMatch_of_num : integer -> pmpMatch*) + +val _ = Define ` + ((pmpMatch_of_num:int -> pmpMatch) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then PMP_Success + else if (((p0_ = (( 1 : int):ii)))) then PMP_Continue + else PMP_Fail))`; + + +(*val num_of_pmpMatch : pmpMatch -> integer*) + +val _ = Define ` + ((num_of_pmpMatch:pmpMatch -> int) arg_= + ((case arg_ of PMP_Success => (( 0 : int):ii) | PMP_Continue => (( 1 : int):ii) | PMP_Fail => (( 2 : int):ii) )))`; + + +(*val pmpMatchEntry : mword ty32 -> mword ty32 -> AccessType -> Privilege -> Pmpcfg_ent -> mword ty32 -> mword ty32 -> M pmpMatch*) + +val _ = Define ` + ((pmpMatchEntry:(32)words$word ->(32)words$word -> AccessType -> Privilege -> Pmpcfg_ent ->(32)words$word ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((pmpMatch),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (addr : xlenbits) (width : xlenbits) (acc : AccessType) (priv : Privilege) (ent : + Pmpcfg_ent) (pmpaddr : xlenbits) (prev_pmpaddr : xlenbits)= (sail2_state_monad$bindS + (pmpAddrRange ent pmpaddr prev_pmpaddr : ( (( 32 words$word # 32 words$word))option) M) (\ rng . + sail2_state_monad$returnS ((case ((pmpMatchAddr addr width rng)) of + PMP_NoMatch => PMP_Continue + | PMP_PartialMatch => PMP_Fail + | PMP_Match => if ((pmpCheckPerms ent acc priv)) then PMP_Success else PMP_Fail + )))))`; + + +(*val pmpCheck : mword ty32 -> integer -> AccessType -> Privilege -> M (maybe ExceptionType)*) + +val _ = Define ` + ((pmpCheck:(32)words$word -> int -> AccessType -> Privilege ->(regstate)sail2_state_monad$sequential_state ->((((ExceptionType)option),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (addr : xlenbits) (width : int) (acc : AccessType) (priv : Privilege)= + (let (width : xlenbits) = ((to_bits (( 32 : int):ii) width : 32 words$word)) in sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp0cfg_ref) (\ (w__0 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr0_ref : ( 32 words$word) M) (\ (w__1 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__0 w__1 ((zeros_implicit (( 32 : int):ii) : 32 words$word))) (\ (w__2 : + pmpMatch) . sail2_state_monad$bindS + (case w__2 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp1cfg_ref) (\ (w__3 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr1_ref : ( 32 words$word) M) (\ (w__4 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr0_ref : ( 32 words$word) M) (\ (w__5 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__3 w__4 w__5) (\ (w__6 : pmpMatch) . + (case w__6 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp2cfg_ref) (\ (w__7 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr2_ref : ( 32 words$word) M) (\ (w__8 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr1_ref : ( 32 words$word) M) (\ (w__9 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__7 w__8 w__9) (\ (w__10 : pmpMatch) . + (case w__10 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp3cfg_ref) (\ (w__11 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr3_ref : ( 32 words$word) M) (\ (w__12 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr2_ref : ( 32 words$word) M) (\ (w__13 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__11 w__12 w__13) (\ (w__14 : pmpMatch) . + (case w__14 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp4cfg_ref) (\ (w__15 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr4_ref : ( 32 words$word) M) (\ (w__16 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr3_ref : ( 32 words$word) M) (\ (w__17 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__15 w__16 w__17) (\ (w__18 : pmpMatch) . + (case w__18 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp5cfg_ref) (\ (w__19 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr5_ref : ( 32 words$word) M) (\ (w__20 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr4_ref : ( 32 words$word) M) (\ (w__21 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__19 w__20 w__21) (\ (w__22 : pmpMatch) . + (case w__22 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp6cfg_ref) (\ (w__23 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr6_ref : ( 32 words$word) M) (\ (w__24 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr5_ref : ( 32 words$word) M) (\ (w__25 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__23 w__24 w__25) (\ (w__26 : pmpMatch) . + (case w__26 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp7cfg_ref) (\ (w__27 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr7_ref : ( 32 words$word) M) (\ (w__28 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr6_ref : ( 32 words$word) M) (\ (w__29 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__27 w__28 w__29) (\ (w__30 : + pmpMatch) . + (case w__30 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp8cfg_ref) (\ (w__31 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr8_ref : ( 32 words$word) M) (\ (w__32 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr7_ref : ( 32 words$word) M) (\ (w__33 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__31 w__32 w__33) (\ (w__34 : + pmpMatch) . + (case w__34 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp9cfg_ref) (\ (w__35 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr9_ref : ( 32 words$word) M) (\ (w__36 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr8_ref : ( 32 words$word) M) (\ (w__37 : 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__35 w__36 w__37) (\ (w__38 : + pmpMatch) . + (case w__38 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp10cfg_ref) (\ (w__39 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr10_ref : ( 32 words$word) M) (\ (w__40 : + 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr9_ref : ( 32 words$word) M) (\ (w__41 : + 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__39 w__40 w__41) (\ (w__42 : + pmpMatch) . + (case w__42 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp11cfg_ref) (\ (w__43 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr11_ref : ( 32 words$word) M) (\ (w__44 : + 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr10_ref : ( 32 words$word) M) (\ (w__45 : + 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__43 w__44 w__45) (\ (w__46 : + pmpMatch) . + (case w__46 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp12cfg_ref) (\ (w__47 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr12_ref : ( 32 words$word) M) (\ (w__48 : + 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr11_ref : ( 32 words$word) M) (\ (w__49 : + 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__47 w__48 w__49) (\ (w__50 : + pmpMatch) . + (case w__50 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp13cfg_ref) (\ (w__51 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr13_ref : ( 32 words$word) M) (\ (w__52 : + 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr12_ref : ( 32 words$word) M) (\ (w__53 : + 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__51 w__52 w__53) (\ (w__54 : + pmpMatch) . + (case w__54 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp14cfg_ref) (\ (w__55 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr14_ref : ( 32 words$word) M) (\ (w__56 : + 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr13_ref : ( 32 words$word) M) (\ (w__57 : + 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__55 w__56 w__57) (\ (w__58 : + pmpMatch) . + (case w__58 of + PMP_Success => sail2_state_monad$returnS T + | PMP_Fail => sail2_state_monad$returnS F + | PMP_Continue => sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp15cfg_ref) (\ (w__59 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr15_ref : ( 32 words$word) M) (\ (w__60 : + 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr14_ref : ( 32 words$word) M) (\ (w__61 : + 32 words$word) . sail2_state_monad$bindS + (pmpMatchEntry addr width acc priv w__59 w__60 w__61) (\ (w__62 : + pmpMatch) . + sail2_state_monad$returnS ((case w__62 of + PMP_Success => T + | PMP_Fail => F + | PMP_Continue => + (case priv of + Machine => T + | _ => F + ) + )))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ))))) + ) (\ (check' : bool) . + sail2_state_monad$returnS (if check' then NONE + else + (case acc of + Read => SOME E_Load_Access_Fault + | Write => SOME E_SAMO_Access_Fault + | ReadWrite => SOME E_SAMO_Access_Fault + | Execute => SOME E_Fetch_Access_Fault + ))))))))`; + + +(*val init_pmp : unit -> M unit*) + +val _ = Define ` + ((init_pmp:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp0cfg_ref) (\ (w__0 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp0cfg_ref ((update_Pmpcfg_ent_A w__0 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp1cfg_ref)) (\ (w__1 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp1cfg_ref ((update_Pmpcfg_ent_A w__1 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp2cfg_ref)) (\ (w__2 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp2cfg_ref ((update_Pmpcfg_ent_A w__2 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp3cfg_ref)) (\ (w__3 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp3cfg_ref ((update_Pmpcfg_ent_A w__3 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp4cfg_ref)) (\ (w__4 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp4cfg_ref ((update_Pmpcfg_ent_A w__4 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp5cfg_ref)) (\ (w__5 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp5cfg_ref ((update_Pmpcfg_ent_A w__5 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp6cfg_ref)) (\ (w__6 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp6cfg_ref ((update_Pmpcfg_ent_A w__6 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp7cfg_ref)) (\ (w__7 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp7cfg_ref ((update_Pmpcfg_ent_A w__7 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp8cfg_ref)) (\ (w__8 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp8cfg_ref ((update_Pmpcfg_ent_A w__8 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp9cfg_ref)) (\ (w__9 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmp9cfg_ref ((update_Pmpcfg_ent_A w__9 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp10cfg_ref)) (\ (w__10 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + pmp10cfg_ref + ((update_Pmpcfg_ent_A w__10 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp11cfg_ref)) (\ (w__11 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + pmp11cfg_ref + ((update_Pmpcfg_ent_A w__11 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp12cfg_ref)) (\ (w__12 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + pmp12cfg_ref + ((update_Pmpcfg_ent_A w__12 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp13cfg_ref)) (\ (w__13 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + pmp13cfg_ref + ((update_Pmpcfg_ent_A w__13 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp14cfg_ref)) (\ (w__14 : Pmpcfg_ent) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + pmp14cfg_ref + ((update_Pmpcfg_ent_A w__14 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))) + (sail2_state_monad$read_regS pmp15cfg_ref)) (\ (w__15 : Pmpcfg_ent) . + sail2_state_monad$write_regS + pmp15cfg_ref + ((update_Pmpcfg_ent_A w__15 ((pmpAddrMatchType_to_bits OFF : 2 words$word))))))))))))))))))))))`; + + +(*val ext_init_regs : unit -> M unit*) + +val _ = Define ` + ((ext_init_regs:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$returnS () ))`; + + +(* +This function is called after above when running rvfi and allows the model +to be initialised differently (e.g. CHERI cap regs are initialised +to omnipotent instead of null). + *) +(*val ext_rvfi_init : unit -> M unit*) + +val _ = Define ` + ((ext_rvfi_init:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$returnS () ))`; + + +(*val ext_fetch_check_pc : mword ty32 -> mword ty32 -> Ext_FetchAddr_Check unit*) + +val _ = Define ` + ((ext_fetch_check_pc:(32)words$word ->(32)words$word ->(unit)Ext_FetchAddr_Check) (start_pc : xlenbits) (pc : xlenbits)= (Ext_FetchAddr_OK pc))`; + + +(*val ext_handle_fetch_check_error : unit -> unit*) + +val _ = Define ` + ((ext_handle_fetch_check_error:unit -> unit) err= () )`; + + +(*val ext_control_check_addr : mword ty32 -> Ext_ControlAddr_Check unit*) + +val _ = Define ` + ((ext_control_check_addr:(32)words$word ->(unit)Ext_ControlAddr_Check) pc= (Ext_ControlAddr_OK pc))`; + + +(*val ext_control_check_pc : mword ty32 -> Ext_ControlAddr_Check unit*) + +val _ = Define ` + ((ext_control_check_pc:(32)words$word ->(unit)Ext_ControlAddr_Check) pc= (Ext_ControlAddr_OK pc))`; + + +(*val ext_handle_control_check_error : unit -> unit*) + +val _ = Define ` + ((ext_handle_control_check_error:unit -> unit) err= () )`; + + +(*val ext_data_get_addr : mword ty5 -> mword ty32 -> AccessType -> word_width -> M (Ext_DataAddr_Check unit)*) + +val _ = Define ` + ((ext_data_get_addr:(5)words$word ->(32)words$word -> AccessType -> word_width ->(regstate)sail2_state_monad$sequential_state ->((((unit)Ext_DataAddr_Check),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (base : regidx) (offset : xlenbits) (acc : AccessType) (width : word_width)= (sail2_state_monad$bindS + (rX ((regidx_to_regno base)) : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + let addr = ((add_vec w__0 offset : 32 words$word)) in + sail2_state_monad$returnS (Ext_DataAddr_OK addr))))`; + + +(*val ext_handle_data_check_error : unit -> unit*) + +val _ = Define ` + ((ext_handle_data_check_error:unit -> unit) err= () )`; + + +(*val csr_name : mword ty12 -> string*) + +val _ = Define ` + ((csr_name:(12)words$word -> string) csr= + (let b__0 = csr in + if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "ustatus" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + "uie" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + "utvec" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "uscratch" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + "uepc" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "ucause" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + "utval" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + "uip" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + "fflags" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "frm" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + "fcsr" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "cycle" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + "time" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "instret" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "cycleh" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + "timeh" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "instreth" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "sstatus" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "sedeleg" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + "sideleg" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + "sie" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + "stvec" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + "scounteren" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "sscratch" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + "sepc" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "scause" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + "stval" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + "sip" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "satp" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : 12 words$word)))) then + "mvendorid" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B0] : 12 words$word)))) then + "marchid" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B1] : 12 words$word)))) then + "mimpid" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B1;B0;B0] : 12 words$word)))) then + "mhartid" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "mstatus" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + "misa" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "medeleg" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + "mideleg" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + "mie" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + "mtvec" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + "mcounteren" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "mscratch" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + "mepc" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "mcause" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + "mtval" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + "mip" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + "pmpcfg0" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word)))) then + "pmpaddr0" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "mcycle" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "minstret" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + "mcycleh" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + "minstreth" + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + "tselect" + else "UNKNOWN"))`; + + +(*val csr_name_map_forwards : mword ty12 -> M string*) + +val _ = Define ` + ((csr_name_map_forwards:(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "ustatus" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "uie" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "utvec" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "uscratch" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "uepc" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "ucause" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "utval" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "uip" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "fflags" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "frm" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "fcsr" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "cycle" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "time" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "instret" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "cycleh" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "timeh" + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "instreth" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "sstatus" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "sedeleg" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "sideleg" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "sie" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "stvec" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "scounteren" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "sscratch" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "sepc" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "scause" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "stval" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "sip" + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "satp" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "mvendorid" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "marchid" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "mimpid" + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mhartid" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mstatus" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "misa" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "medeleg" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "mideleg" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mie" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "mtvec" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mcounteren" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mscratch" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "mepc" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mcause" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "mtval" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mip" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpcfg0" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpcfg1" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpcfg2" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpcfg3" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr0" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr1" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr2" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr3" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr4" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr5" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr6" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr7" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr8" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr9" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr10" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr11" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr12" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr13" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr14" + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "pmpaddr15" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mcycle" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "minstret" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "mcycleh" + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "minstreth" + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS "tselect" + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS "tdata1" + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS "tdata2" + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS "tdata3" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val csr_name_map_backwards : string -> M (mword ty12)*) + +val _ = Define ` + ((csr_name_map_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((12)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "ustatus"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "uie"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "utvec"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word) + else if (((p0_ = "uscratch"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "uepc"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "ucause"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "utval"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "uip"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "fflags"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "frm"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "fcsr"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "cycle"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "time"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "instret"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "cycleh"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "timeh"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "instreth"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "sstatus"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "sedeleg"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "sideleg"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "sie"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "stvec"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word) + else if (((p0_ = "scounteren"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word) + else if (((p0_ = "sscratch"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "sepc"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "scause"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "stval"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "sip"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "satp"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "mvendorid"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "marchid"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "mimpid"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "mhartid"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "mstatus"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "misa"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "medeleg"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "mideleg"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "mie"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "mtvec"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word) + else if (((p0_ = "mcounteren"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word) + else if (((p0_ = "mscratch"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "mepc"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "mcause"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "mtval"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "mip"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "pmpcfg0"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "pmpcfg1"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "pmpcfg2"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "pmpcfg3"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "pmpaddr0"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "pmpaddr1"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "pmpaddr2"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "pmpaddr3"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B1] : 12 words$word) + else if (((p0_ = "pmpaddr4"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B0] : 12 words$word) + else if (((p0_ = "pmpaddr5"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B1] : 12 words$word) + else if (((p0_ = "pmpaddr6"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B0] : 12 words$word) + else if (((p0_ = "pmpaddr7"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B1] : 12 words$word) + else if (((p0_ = "pmpaddr8"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B0] : 12 words$word) + else if (((p0_ = "pmpaddr9"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B1] : 12 words$word) + else if (((p0_ = "pmpaddr10"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B0] : 12 words$word) + else if (((p0_ = "pmpaddr11"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B1] : 12 words$word) + else if (((p0_ = "pmpaddr12"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B0] : 12 words$word) + else if (((p0_ = "pmpaddr13"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B1] : 12 words$word) + else if (((p0_ = "pmpaddr14"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B0] : 12 words$word) + else if (((p0_ = "pmpaddr15"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B1] : 12 words$word) + else if (((p0_ = "mcycle"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "minstret"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "mcycleh"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "minstreth"))) then + sail2_state_monad$returnS (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "tselect"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word) + else if (((p0_ = "tdata1"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word) + else if (((p0_ = "tdata2"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word) + else if (((p0_ = "tdata3"))) then + sail2_state_monad$returnS (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val csr_name_map_forwards_matches : mword ty12 -> bool*) + +val _ = Define ` + ((csr_name_map_forwards_matches:(12)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word)))) then + T + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word)))) then + T + else F))`; + + +(*val csr_name_map_backwards_matches : string -> bool*) + +val _ = Define ` + ((csr_name_map_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "ustatus"))) then T + else if (((p0_ = "uie"))) then T + else if (((p0_ = "utvec"))) then T + else if (((p0_ = "uscratch"))) then T + else if (((p0_ = "uepc"))) then T + else if (((p0_ = "ucause"))) then T + else if (((p0_ = "utval"))) then T + else if (((p0_ = "uip"))) then T + else if (((p0_ = "fflags"))) then T + else if (((p0_ = "frm"))) then T + else if (((p0_ = "fcsr"))) then T + else if (((p0_ = "cycle"))) then T + else if (((p0_ = "time"))) then T + else if (((p0_ = "instret"))) then T + else if (((p0_ = "cycleh"))) then T + else if (((p0_ = "timeh"))) then T + else if (((p0_ = "instreth"))) then T + else if (((p0_ = "sstatus"))) then T + else if (((p0_ = "sedeleg"))) then T + else if (((p0_ = "sideleg"))) then T + else if (((p0_ = "sie"))) then T + else if (((p0_ = "stvec"))) then T + else if (((p0_ = "scounteren"))) then T + else if (((p0_ = "sscratch"))) then T + else if (((p0_ = "sepc"))) then T + else if (((p0_ = "scause"))) then T + else if (((p0_ = "stval"))) then T + else if (((p0_ = "sip"))) then T + else if (((p0_ = "satp"))) then T + else if (((p0_ = "mvendorid"))) then T + else if (((p0_ = "marchid"))) then T + else if (((p0_ = "mimpid"))) then T + else if (((p0_ = "mhartid"))) then T + else if (((p0_ = "mstatus"))) then T + else if (((p0_ = "misa"))) then T + else if (((p0_ = "medeleg"))) then T + else if (((p0_ = "mideleg"))) then T + else if (((p0_ = "mie"))) then T + else if (((p0_ = "mtvec"))) then T + else if (((p0_ = "mcounteren"))) then T + else if (((p0_ = "mscratch"))) then T + else if (((p0_ = "mepc"))) then T + else if (((p0_ = "mcause"))) then T + else if (((p0_ = "mtval"))) then T + else if (((p0_ = "mip"))) then T + else if (((p0_ = "pmpcfg0"))) then T + else if (((p0_ = "pmpcfg1"))) then T + else if (((p0_ = "pmpcfg2"))) then T + else if (((p0_ = "pmpcfg3"))) then T + else if (((p0_ = "pmpaddr0"))) then T + else if (((p0_ = "pmpaddr1"))) then T + else if (((p0_ = "pmpaddr2"))) then T + else if (((p0_ = "pmpaddr3"))) then T + else if (((p0_ = "pmpaddr4"))) then T + else if (((p0_ = "pmpaddr5"))) then T + else if (((p0_ = "pmpaddr6"))) then T + else if (((p0_ = "pmpaddr7"))) then T + else if (((p0_ = "pmpaddr8"))) then T + else if (((p0_ = "pmpaddr9"))) then T + else if (((p0_ = "pmpaddr10"))) then T + else if (((p0_ = "pmpaddr11"))) then T + else if (((p0_ = "pmpaddr12"))) then T + else if (((p0_ = "pmpaddr13"))) then T + else if (((p0_ = "pmpaddr14"))) then T + else if (((p0_ = "pmpaddr15"))) then T + else if (((p0_ = "mcycle"))) then T + else if (((p0_ = "minstret"))) then T + else if (((p0_ = "mcycleh"))) then T + else if (((p0_ = "minstreth"))) then T + else if (((p0_ = "tselect"))) then T + else if (((p0_ = "tdata1"))) then T + else if (((p0_ = "tdata2"))) then T + else if (((p0_ = "tdata3"))) then T + else F))`; + + +(*val csr_name_map_matches_prefix : string -> maybe ((mword ty12 * ii))*) + +(*val _s488_ : string -> maybe string*) + +val _ = Define ` + ((s488_:string ->(string)option) s489_0= + (let s490_0 = s489_0 in + if ((string_startswith s490_0 "tdata3")) then + (case ((string_drop s490_0 ((string_length "tdata3")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s484_ : string -> maybe string*) + +val _ = Define ` + ((s484_:string ->(string)option) s485_0= + (let s486_0 = s485_0 in + if ((string_startswith s486_0 "tdata2")) then + (case ((string_drop s486_0 ((string_length "tdata2")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s480_ : string -> maybe string*) + +val _ = Define ` + ((s480_:string ->(string)option) s481_0= + (let s482_0 = s481_0 in + if ((string_startswith s482_0 "tdata1")) then + (case ((string_drop s482_0 ((string_length "tdata1")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s476_ : string -> maybe string*) + +val _ = Define ` + ((s476_:string ->(string)option) s477_0= + (let s478_0 = s477_0 in + if ((string_startswith s478_0 "tselect")) then + (case ((string_drop s478_0 ((string_length "tselect")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s472_ : string -> maybe string*) + +val _ = Define ` + ((s472_:string ->(string)option) s473_0= + (let s474_0 = s473_0 in + if ((string_startswith s474_0 "minstreth")) then + (case ((string_drop s474_0 ((string_length "minstreth")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s468_ : string -> maybe string*) + +val _ = Define ` + ((s468_:string ->(string)option) s469_0= + (let s470_0 = s469_0 in + if ((string_startswith s470_0 "mcycleh")) then + (case ((string_drop s470_0 ((string_length "mcycleh")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s464_ : string -> maybe string*) + +val _ = Define ` + ((s464_:string ->(string)option) s465_0= + (let s466_0 = s465_0 in + if ((string_startswith s466_0 "minstret")) then + (case ((string_drop s466_0 ((string_length "minstret")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s460_ : string -> maybe string*) + +val _ = Define ` + ((s460_:string ->(string)option) s461_0= + (let s462_0 = s461_0 in + if ((string_startswith s462_0 "mcycle")) then + (case ((string_drop s462_0 ((string_length "mcycle")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s456_ : string -> maybe string*) + +val _ = Define ` + ((s456_:string ->(string)option) s457_0= + (let s458_0 = s457_0 in + if ((string_startswith s458_0 "pmpaddr15")) then + (case ((string_drop s458_0 ((string_length "pmpaddr15")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s452_ : string -> maybe string*) + +val _ = Define ` + ((s452_:string ->(string)option) s453_0= + (let s454_0 = s453_0 in + if ((string_startswith s454_0 "pmpaddr14")) then + (case ((string_drop s454_0 ((string_length "pmpaddr14")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s448_ : string -> maybe string*) + +val _ = Define ` + ((s448_:string ->(string)option) s449_0= + (let s450_0 = s449_0 in + if ((string_startswith s450_0 "pmpaddr13")) then + (case ((string_drop s450_0 ((string_length "pmpaddr13")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s444_ : string -> maybe string*) + +val _ = Define ` + ((s444_:string ->(string)option) s445_0= + (let s446_0 = s445_0 in + if ((string_startswith s446_0 "pmpaddr12")) then + (case ((string_drop s446_0 ((string_length "pmpaddr12")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s440_ : string -> maybe string*) + +val _ = Define ` + ((s440_:string ->(string)option) s441_0= + (let s442_0 = s441_0 in + if ((string_startswith s442_0 "pmpaddr11")) then + (case ((string_drop s442_0 ((string_length "pmpaddr11")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s436_ : string -> maybe string*) + +val _ = Define ` + ((s436_:string ->(string)option) s437_0= + (let s438_0 = s437_0 in + if ((string_startswith s438_0 "pmpaddr10")) then + (case ((string_drop s438_0 ((string_length "pmpaddr10")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s432_ : string -> maybe string*) + +val _ = Define ` + ((s432_:string ->(string)option) s433_0= + (let s434_0 = s433_0 in + if ((string_startswith s434_0 "pmpaddr9")) then + (case ((string_drop s434_0 ((string_length "pmpaddr9")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s428_ : string -> maybe string*) + +val _ = Define ` + ((s428_:string ->(string)option) s429_0= + (let s430_0 = s429_0 in + if ((string_startswith s430_0 "pmpaddr8")) then + (case ((string_drop s430_0 ((string_length "pmpaddr8")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s424_ : string -> maybe string*) + +val _ = Define ` + ((s424_:string ->(string)option) s425_0= + (let s426_0 = s425_0 in + if ((string_startswith s426_0 "pmpaddr7")) then + (case ((string_drop s426_0 ((string_length "pmpaddr7")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s420_ : string -> maybe string*) + +val _ = Define ` + ((s420_:string ->(string)option) s421_0= + (let s422_0 = s421_0 in + if ((string_startswith s422_0 "pmpaddr6")) then + (case ((string_drop s422_0 ((string_length "pmpaddr6")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s416_ : string -> maybe string*) + +val _ = Define ` + ((s416_:string ->(string)option) s417_0= + (let s418_0 = s417_0 in + if ((string_startswith s418_0 "pmpaddr5")) then + (case ((string_drop s418_0 ((string_length "pmpaddr5")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s412_ : string -> maybe string*) + +val _ = Define ` + ((s412_:string ->(string)option) s413_0= + (let s414_0 = s413_0 in + if ((string_startswith s414_0 "pmpaddr4")) then + (case ((string_drop s414_0 ((string_length "pmpaddr4")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s408_ : string -> maybe string*) + +val _ = Define ` + ((s408_:string ->(string)option) s409_0= + (let s410_0 = s409_0 in + if ((string_startswith s410_0 "pmpaddr3")) then + (case ((string_drop s410_0 ((string_length "pmpaddr3")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s404_ : string -> maybe string*) + +val _ = Define ` + ((s404_:string ->(string)option) s405_0= + (let s406_0 = s405_0 in + if ((string_startswith s406_0 "pmpaddr2")) then + (case ((string_drop s406_0 ((string_length "pmpaddr2")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s400_ : string -> maybe string*) + +val _ = Define ` + ((s400_:string ->(string)option) s401_0= + (let s402_0 = s401_0 in + if ((string_startswith s402_0 "pmpaddr1")) then + (case ((string_drop s402_0 ((string_length "pmpaddr1")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s396_ : string -> maybe string*) + +val _ = Define ` + ((s396_:string ->(string)option) s397_0= + (let s398_0 = s397_0 in + if ((string_startswith s398_0 "pmpaddr0")) then + (case ((string_drop s398_0 ((string_length "pmpaddr0")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s392_ : string -> maybe string*) + +val _ = Define ` + ((s392_:string ->(string)option) s393_0= + (let s394_0 = s393_0 in + if ((string_startswith s394_0 "pmpcfg3")) then + (case ((string_drop s394_0 ((string_length "pmpcfg3")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s388_ : string -> maybe string*) + +val _ = Define ` + ((s388_:string ->(string)option) s389_0= + (let s390_0 = s389_0 in + if ((string_startswith s390_0 "pmpcfg2")) then + (case ((string_drop s390_0 ((string_length "pmpcfg2")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s384_ : string -> maybe string*) + +val _ = Define ` + ((s384_:string ->(string)option) s385_0= + (let s386_0 = s385_0 in + if ((string_startswith s386_0 "pmpcfg1")) then + (case ((string_drop s386_0 ((string_length "pmpcfg1")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s380_ : string -> maybe string*) + +val _ = Define ` + ((s380_:string ->(string)option) s381_0= + (let s382_0 = s381_0 in + if ((string_startswith s382_0 "pmpcfg0")) then + (case ((string_drop s382_0 ((string_length "pmpcfg0")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s376_ : string -> maybe string*) + +val _ = Define ` + ((s376_:string ->(string)option) s377_0= + (let s378_0 = s377_0 in + if ((string_startswith s378_0 "mip")) then + (case ((string_drop s378_0 ((string_length "mip")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s372_ : string -> maybe string*) + +val _ = Define ` + ((s372_:string ->(string)option) s373_0= + (let s374_0 = s373_0 in + if ((string_startswith s374_0 "mtval")) then + (case ((string_drop s374_0 ((string_length "mtval")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s368_ : string -> maybe string*) + +val _ = Define ` + ((s368_:string ->(string)option) s369_0= + (let s370_0 = s369_0 in + if ((string_startswith s370_0 "mcause")) then + (case ((string_drop s370_0 ((string_length "mcause")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s364_ : string -> maybe string*) + +val _ = Define ` + ((s364_:string ->(string)option) s365_0= + (let s366_0 = s365_0 in + if ((string_startswith s366_0 "mepc")) then + (case ((string_drop s366_0 ((string_length "mepc")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s360_ : string -> maybe string*) + +val _ = Define ` + ((s360_:string ->(string)option) s361_0= + (let s362_0 = s361_0 in + if ((string_startswith s362_0 "mscratch")) then + (case ((string_drop s362_0 ((string_length "mscratch")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s356_ : string -> maybe string*) + +val _ = Define ` + ((s356_:string ->(string)option) s357_0= + (let s358_0 = s357_0 in + if ((string_startswith s358_0 "mcounteren")) then + (case ((string_drop s358_0 ((string_length "mcounteren")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s352_ : string -> maybe string*) + +val _ = Define ` + ((s352_:string ->(string)option) s353_0= + (let s354_0 = s353_0 in + if ((string_startswith s354_0 "mtvec")) then + (case ((string_drop s354_0 ((string_length "mtvec")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s348_ : string -> maybe string*) + +val _ = Define ` + ((s348_:string ->(string)option) s349_0= + (let s350_0 = s349_0 in + if ((string_startswith s350_0 "mie")) then + (case ((string_drop s350_0 ((string_length "mie")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s344_ : string -> maybe string*) + +val _ = Define ` + ((s344_:string ->(string)option) s345_0= + (let s346_0 = s345_0 in + if ((string_startswith s346_0 "mideleg")) then + (case ((string_drop s346_0 ((string_length "mideleg")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s340_ : string -> maybe string*) + +val _ = Define ` + ((s340_:string ->(string)option) s341_0= + (let s342_0 = s341_0 in + if ((string_startswith s342_0 "medeleg")) then + (case ((string_drop s342_0 ((string_length "medeleg")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s336_ : string -> maybe string*) + +val _ = Define ` + ((s336_:string ->(string)option) s337_0= + (let s338_0 = s337_0 in + if ((string_startswith s338_0 "misa")) then + (case ((string_drop s338_0 ((string_length "misa")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s332_ : string -> maybe string*) + +val _ = Define ` + ((s332_:string ->(string)option) s333_0= + (let s334_0 = s333_0 in + if ((string_startswith s334_0 "mstatus")) then + (case ((string_drop s334_0 ((string_length "mstatus")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s328_ : string -> maybe string*) + +val _ = Define ` + ((s328_:string ->(string)option) s329_0= + (let s330_0 = s329_0 in + if ((string_startswith s330_0 "mhartid")) then + (case ((string_drop s330_0 ((string_length "mhartid")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s324_ : string -> maybe string*) + +val _ = Define ` + ((s324_:string ->(string)option) s325_0= + (let s326_0 = s325_0 in + if ((string_startswith s326_0 "mimpid")) then + (case ((string_drop s326_0 ((string_length "mimpid")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s320_ : string -> maybe string*) + +val _ = Define ` + ((s320_:string ->(string)option) s321_0= + (let s322_0 = s321_0 in + if ((string_startswith s322_0 "marchid")) then + (case ((string_drop s322_0 ((string_length "marchid")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s316_ : string -> maybe string*) + +val _ = Define ` + ((s316_:string ->(string)option) s317_0= + (let s318_0 = s317_0 in + if ((string_startswith s318_0 "mvendorid")) then + (case ((string_drop s318_0 ((string_length "mvendorid")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s312_ : string -> maybe string*) + +val _ = Define ` + ((s312_:string ->(string)option) s313_0= + (let s314_0 = s313_0 in + if ((string_startswith s314_0 "satp")) then + (case ((string_drop s314_0 ((string_length "satp")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s308_ : string -> maybe string*) + +val _ = Define ` + ((s308_:string ->(string)option) s309_0= + (let s310_0 = s309_0 in + if ((string_startswith s310_0 "sip")) then + (case ((string_drop s310_0 ((string_length "sip")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s304_ : string -> maybe string*) + +val _ = Define ` + ((s304_:string ->(string)option) s305_0= + (let s306_0 = s305_0 in + if ((string_startswith s306_0 "stval")) then + (case ((string_drop s306_0 ((string_length "stval")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s300_ : string -> maybe string*) + +val _ = Define ` + ((s300_:string ->(string)option) s301_0= + (let s302_0 = s301_0 in + if ((string_startswith s302_0 "scause")) then + (case ((string_drop s302_0 ((string_length "scause")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s296_ : string -> maybe string*) + +val _ = Define ` + ((s296_:string ->(string)option) s297_0= + (let s298_0 = s297_0 in + if ((string_startswith s298_0 "sepc")) then + (case ((string_drop s298_0 ((string_length "sepc")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s292_ : string -> maybe string*) + +val _ = Define ` + ((s292_:string ->(string)option) s293_0= + (let s294_0 = s293_0 in + if ((string_startswith s294_0 "sscratch")) then + (case ((string_drop s294_0 ((string_length "sscratch")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s288_ : string -> maybe string*) + +val _ = Define ` + ((s288_:string ->(string)option) s289_0= + (let s290_0 = s289_0 in + if ((string_startswith s290_0 "scounteren")) then + (case ((string_drop s290_0 ((string_length "scounteren")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s284_ : string -> maybe string*) + +val _ = Define ` + ((s284_:string ->(string)option) s285_0= + (let s286_0 = s285_0 in + if ((string_startswith s286_0 "stvec")) then + (case ((string_drop s286_0 ((string_length "stvec")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s280_ : string -> maybe string*) + +val _ = Define ` + ((s280_:string ->(string)option) s281_0= + (let s282_0 = s281_0 in + if ((string_startswith s282_0 "sie")) then + (case ((string_drop s282_0 ((string_length "sie")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s276_ : string -> maybe string*) + +val _ = Define ` + ((s276_:string ->(string)option) s277_0= + (let s278_0 = s277_0 in + if ((string_startswith s278_0 "sideleg")) then + (case ((string_drop s278_0 ((string_length "sideleg")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s272_ : string -> maybe string*) + +val _ = Define ` + ((s272_:string ->(string)option) s273_0= + (let s274_0 = s273_0 in + if ((string_startswith s274_0 "sedeleg")) then + (case ((string_drop s274_0 ((string_length "sedeleg")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s268_ : string -> maybe string*) + +val _ = Define ` + ((s268_:string ->(string)option) s269_0= + (let s270_0 = s269_0 in + if ((string_startswith s270_0 "sstatus")) then + (case ((string_drop s270_0 ((string_length "sstatus")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s264_ : string -> maybe string*) + +val _ = Define ` + ((s264_:string ->(string)option) s265_0= + (let s266_0 = s265_0 in + if ((string_startswith s266_0 "instreth")) then + (case ((string_drop s266_0 ((string_length "instreth")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s260_ : string -> maybe string*) + +val _ = Define ` + ((s260_:string ->(string)option) s261_0= + (let s262_0 = s261_0 in + if ((string_startswith s262_0 "timeh")) then + (case ((string_drop s262_0 ((string_length "timeh")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s256_ : string -> maybe string*) + +val _ = Define ` + ((s256_:string ->(string)option) s257_0= + (let s258_0 = s257_0 in + if ((string_startswith s258_0 "cycleh")) then + (case ((string_drop s258_0 ((string_length "cycleh")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s252_ : string -> maybe string*) + +val _ = Define ` + ((s252_:string ->(string)option) s253_0= + (let s254_0 = s253_0 in + if ((string_startswith s254_0 "instret")) then + (case ((string_drop s254_0 ((string_length "instret")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s248_ : string -> maybe string*) + +val _ = Define ` + ((s248_:string ->(string)option) s249_0= + (let s250_0 = s249_0 in + if ((string_startswith s250_0 "time")) then + (case ((string_drop s250_0 ((string_length "time")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s244_ : string -> maybe string*) + +val _ = Define ` + ((s244_:string ->(string)option) s245_0= + (let s246_0 = s245_0 in + if ((string_startswith s246_0 "cycle")) then + (case ((string_drop s246_0 ((string_length "cycle")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s240_ : string -> maybe string*) + +val _ = Define ` + ((s240_:string ->(string)option) s241_0= + (let s242_0 = s241_0 in + if ((string_startswith s242_0 "fcsr")) then + (case ((string_drop s242_0 ((string_length "fcsr")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s236_ : string -> maybe string*) + +val _ = Define ` + ((s236_:string ->(string)option) s237_0= + (let s238_0 = s237_0 in + if ((string_startswith s238_0 "frm")) then + (case ((string_drop s238_0 ((string_length "frm")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s232_ : string -> maybe string*) + +val _ = Define ` + ((s232_:string ->(string)option) s233_0= + (let s234_0 = s233_0 in + if ((string_startswith s234_0 "fflags")) then + (case ((string_drop s234_0 ((string_length "fflags")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s228_ : string -> maybe string*) + +val _ = Define ` + ((s228_:string ->(string)option) s229_0= + (let s230_0 = s229_0 in + if ((string_startswith s230_0 "uip")) then + (case ((string_drop s230_0 ((string_length "uip")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s224_ : string -> maybe string*) + +val _ = Define ` + ((s224_:string ->(string)option) s225_0= + (let s226_0 = s225_0 in + if ((string_startswith s226_0 "utval")) then + (case ((string_drop s226_0 ((string_length "utval")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s220_ : string -> maybe string*) + +val _ = Define ` + ((s220_:string ->(string)option) s221_0= + (let s222_0 = s221_0 in + if ((string_startswith s222_0 "ucause")) then + (case ((string_drop s222_0 ((string_length "ucause")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s216_ : string -> maybe string*) + +val _ = Define ` + ((s216_:string ->(string)option) s217_0= + (let s218_0 = s217_0 in + if ((string_startswith s218_0 "uepc")) then + (case ((string_drop s218_0 ((string_length "uepc")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s212_ : string -> maybe string*) + +val _ = Define ` + ((s212_:string ->(string)option) s213_0= + (let s214_0 = s213_0 in + if ((string_startswith s214_0 "uscratch")) then + (case ((string_drop s214_0 ((string_length "uscratch")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s208_ : string -> maybe string*) + +val _ = Define ` + ((s208_:string ->(string)option) s209_0= + (let s210_0 = s209_0 in + if ((string_startswith s210_0 "utvec")) then + (case ((string_drop s210_0 ((string_length "utvec")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s204_ : string -> maybe string*) + +val _ = Define ` + ((s204_:string ->(string)option) s205_0= + (let s206_0 = s205_0 in + if ((string_startswith s206_0 "uie")) then + (case ((string_drop s206_0 ((string_length "uie")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s200_ : string -> maybe string*) + +val _ = Define ` + ((s200_:string ->(string)option) s201_0= + (let s202_0 = s201_0 in + if ((string_startswith s202_0 "ustatus")) then + (case ((string_drop s202_0 ((string_length "ustatus")))) of + s_ => SOME s_ + ) + else NONE))`; + + +val _ = Define ` + ((csr_name_map_matches_prefix:string ->((12)words$word#int)option) arg_= + (let s203_0 = arg_ in + if ((case ((s200_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s200_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s204_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s204_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s208_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s208_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s212_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s212_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s216_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s216_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s220_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s220_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s224_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s224_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s228_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s228_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s232_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s232_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s236_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s236_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s240_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s240_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s244_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s244_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s248_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s248_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s252_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s252_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s256_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s256_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s260_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s260_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s264_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s264_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s268_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s268_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s272_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s272_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s276_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s276_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s280_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s280_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s284_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s284_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s288_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s288_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s292_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s292_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s296_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s296_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s300_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s300_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s304_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s304_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s308_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s308_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s312_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s312_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s316_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s316_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s320_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s320_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s324_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s324_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s328_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s328_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s332_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s332_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s336_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s336_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s340_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s340_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s344_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s344_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s348_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s348_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s352_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s352_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s356_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s356_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s360_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s360_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s364_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s364_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s368_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s368_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s372_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s372_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s376_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s376_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s380_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s380_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s384_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s384_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s388_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s388_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s392_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s392_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s396_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s396_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s400_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s400_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s404_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s404_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s408_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s408_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s412_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s412_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s416_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s416_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s420_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s420_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s424_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s424_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s428_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s428_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s432_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s432_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s436_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s436_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s440_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s440_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s444_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s444_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s448_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s448_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s452_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s452_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s456_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s456_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s460_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s460_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s464_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s464_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s468_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s468_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s472_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s472_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s476_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s476_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s480_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s480_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s484_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s484_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s488_ s203_0)) of SOME (s_) => T | _ => F )) then + (case s488_ s203_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val Mk_Ustatus : mword ty32 -> Ustatus*) + +val _ = Define ` + ((Mk_Ustatus:(32)words$word -> Ustatus) v= + (<| Ustatus_Ustatus_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Ustatus_bits : Ustatus -> mword ty32*) + +val _ = Define ` + ((get_Ustatus_bits:Ustatus ->(32)words$word) v= ((subrange_vec_dec v.Ustatus_Ustatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Ustatus_bits : register_ref regstate register_value Ustatus -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Ustatus_bits:((regstate),(register_value),(Ustatus))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Ustatus_Ustatus_chunk_0 := + ((update_subrange_vec_dec r.Ustatus_Ustatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Ustatus_bits : Ustatus -> mword ty32 -> Ustatus*) + +val _ = Define ` + ((update_Ustatus_bits:Ustatus ->(32)words$word -> Ustatus) v x= + ((v with<| + Ustatus_Ustatus_chunk_0 := + ((update_subrange_vec_dec v.Ustatus_Ustatus_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Ustatus_UPIE:Ustatus ->(1)words$word) v= ((subrange_vec_dec v.Ustatus_Ustatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Ustatus_UPIE:((regstate),(register_value),(Ustatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Ustatus_Ustatus_chunk_0 := + ((update_subrange_vec_dec r.Ustatus_Ustatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Ustatus_UPIE:Ustatus ->(1)words$word -> Ustatus) v x= + ((v with<| + Ustatus_Ustatus_chunk_0 := + ((update_subrange_vec_dec v.Ustatus_Ustatus_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Ustatus_UIE:Ustatus ->(1)words$word) v= ((subrange_vec_dec v.Ustatus_Ustatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Ustatus_UIE:((regstate),(register_value),(Ustatus))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Ustatus_Ustatus_chunk_0 := + ((update_subrange_vec_dec r.Ustatus_Ustatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Ustatus_UIE:Ustatus ->(1)words$word -> Ustatus) v x= + ((v with<| + Ustatus_Ustatus_chunk_0 := + ((update_subrange_vec_dec v.Ustatus_Ustatus_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val lower_sstatus : Sstatus -> Ustatus*) + +val _ = Define ` + ((lower_sstatus:Sstatus -> Ustatus) s= + (let u = (Mk_Ustatus ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))) in + let u = (update_Ustatus_UPIE u ((get_Sstatus_UPIE s : 1 words$word))) in + update_Ustatus_UIE u ((get_Sstatus_UIE s : 1 words$word))))`; + + +(*val lift_ustatus : Sstatus -> Ustatus -> Sstatus*) + +val _ = Define ` + ((lift_ustatus:Sstatus -> Ustatus -> Sstatus) (s : Sstatus) (u : Ustatus)= + (let s = (update_Sstatus_UPIE s ((get_Ustatus_UPIE u : 1 words$word))) in + update_Sstatus_UIE s ((get_Ustatus_UIE u : 1 words$word))))`; + + +(*val legalize_ustatus : Mstatus -> mword ty32 -> M Mstatus*) + +val _ = Define ` + ((legalize_ustatus:Mstatus ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Mstatus),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (m : Mstatus) (v : xlenbits)= + (let u = (Mk_Ustatus v) in + let s = (lower_mstatus m) in + let s = (lift_ustatus s u) in + lift_sstatus m s))`; + + +(*val Mk_Uinterrupts : mword ty32 -> Uinterrupts*) + +val _ = Define ` + ((Mk_Uinterrupts:(32)words$word -> Uinterrupts) v= + (<| Uinterrupts_Uinterrupts_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_Uinterrupts_bits : Uinterrupts -> mword ty32*) + +val _ = Define ` + ((get_Uinterrupts_bits:Uinterrupts ->(32)words$word) v= + ((subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_Uinterrupts_bits : register_ref regstate register_value Uinterrupts -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_Uinterrupts_bits:((regstate),(register_value),(Uinterrupts))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Uinterrupts_Uinterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_Uinterrupts_bits : Uinterrupts -> mword ty32 -> Uinterrupts*) + +val _ = Define ` + ((update_Uinterrupts_bits:Uinterrupts ->(32)words$word -> Uinterrupts) v x= + ((v with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Uinterrupts_UEI:Uinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Uinterrupts_UEI:((regstate),(register_value),(Uinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Uinterrupts_Uinterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Uinterrupts_UEI:Uinterrupts ->(1)words$word -> Uinterrupts) v x= + ((v with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 8 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Uinterrupts_UTI:Uinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Uinterrupts_UTI:((regstate),(register_value),(Uinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Uinterrupts_Uinterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Uinterrupts_UTI:Uinterrupts ->(1)words$word -> Uinterrupts) v x= + ((v with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +val _ = Define ` + ((get_Uinterrupts_USI:Uinterrupts ->(1)words$word) v= + ((subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_Uinterrupts_USI:((regstate),(register_value),(Uinterrupts))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec r.Uinterrupts_Uinterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_Uinterrupts_USI:Uinterrupts ->(1)words$word -> Uinterrupts) v x= + ((v with<| + Uinterrupts_Uinterrupts_chunk_0 := + ((update_subrange_vec_dec v.Uinterrupts_Uinterrupts_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 32 words$word))|>)))`; + + +(*val lower_sip : Sinterrupts -> Sinterrupts -> Uinterrupts*) + +val _ = Define ` + ((lower_sip:Sinterrupts -> Sinterrupts -> Uinterrupts) (s : Sinterrupts) (d : Sinterrupts)= + (let (u : Uinterrupts) = + (Mk_Uinterrupts ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))) in + let u = + (update_Uinterrupts_UEI u + ((and_vec ((get_Sinterrupts_UEI s : 1 words$word)) ((get_Sinterrupts_UEI d : 1 words$word)) + : 1 words$word))) in + let u = + (update_Uinterrupts_UTI u + ((and_vec ((get_Sinterrupts_UTI s : 1 words$word)) ((get_Sinterrupts_UTI d : 1 words$word)) + : 1 words$word))) in + update_Uinterrupts_USI u + ((and_vec ((get_Sinterrupts_USI s : 1 words$word)) ((get_Sinterrupts_USI d : 1 words$word)) + : 1 words$word))))`; + + +(*val lower_sie : Sinterrupts -> Sinterrupts -> Uinterrupts*) + +val _ = Define ` + ((lower_sie:Sinterrupts -> Sinterrupts -> Uinterrupts) (s : Sinterrupts) (d : Sinterrupts)= + (let (u : Uinterrupts) = + (Mk_Uinterrupts ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))) in + let u = + (update_Uinterrupts_UEI u + ((and_vec ((get_Sinterrupts_UEI s : 1 words$word)) ((get_Sinterrupts_UEI d : 1 words$word)) + : 1 words$word))) in + let u = + (update_Uinterrupts_UTI u + ((and_vec ((get_Sinterrupts_UTI s : 1 words$word)) ((get_Sinterrupts_UTI d : 1 words$word)) + : 1 words$word))) in + update_Uinterrupts_USI u + ((and_vec ((get_Sinterrupts_USI s : 1 words$word)) ((get_Sinterrupts_USI d : 1 words$word)) + : 1 words$word))))`; + + +(*val lift_uip : Sinterrupts -> Sinterrupts -> Uinterrupts -> Sinterrupts*) + +val _ = Define ` + ((lift_uip:Sinterrupts -> Sinterrupts -> Uinterrupts -> Sinterrupts) (o1 : Sinterrupts) (d : Sinterrupts) (u : Uinterrupts)= + (let (s : Sinterrupts) = o1 in + if (((((get_Sinterrupts_USI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Sinterrupts_USI s ((get_Uinterrupts_USI u : 1 words$word)) + else s))`; + + +(*val legalize_uip : Sinterrupts -> Sinterrupts -> mword ty32 -> Sinterrupts*) + +val _ = Define ` + ((legalize_uip:Sinterrupts -> Sinterrupts ->(32)words$word -> Sinterrupts) (s : Sinterrupts) (d : Sinterrupts) (v : xlenbits)= + (lift_uip s d ((Mk_Uinterrupts v))))`; + + +(*val lift_uie : Sinterrupts -> Sinterrupts -> Uinterrupts -> Sinterrupts*) + +val _ = Define ` + ((lift_uie:Sinterrupts -> Sinterrupts -> Uinterrupts -> Sinterrupts) (o1 : Sinterrupts) (d : Sinterrupts) (u : Uinterrupts)= + (let (s : Sinterrupts) = o1 in + let s = + (if (((((get_Sinterrupts_UEI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Sinterrupts_UEI s ((get_Uinterrupts_UEI u : 1 words$word)) + else s) in + let s = + (if (((((get_Sinterrupts_UTI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Sinterrupts_UTI s ((get_Uinterrupts_UTI u : 1 words$word)) + else s) in + if (((((get_Sinterrupts_USI d : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + update_Sinterrupts_USI s ((get_Uinterrupts_USI u : 1 words$word)) + else s))`; + + +(*val legalize_uie : Sinterrupts -> Sinterrupts -> mword ty32 -> Sinterrupts*) + +val _ = Define ` + ((legalize_uie:Sinterrupts -> Sinterrupts ->(32)words$word -> Sinterrupts) (s : Sinterrupts) (d : Sinterrupts) (v : xlenbits)= + (lift_uie s d ((Mk_Uinterrupts v))))`; + + +(*val handle_trap_extension : Privilege -> mword ty32 -> maybe unit -> unit*) + +val _ = Define ` + ((handle_trap_extension:Privilege ->(32)words$word ->(unit)option -> unit) (p : Privilege) (pc : xlenbits) (u : unit option)= () )`; + + +(*val prepare_trap_vector : Privilege -> Mcause -> M (mword ty32)*) + +val _ = Define ` + ((prepare_trap_vector:Privilege -> Mcause ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (p : Privilege) (cause : Mcause)= (sail2_state_monad$bindS + (case p of + Machine => sail2_state_monad$read_regS mtvec_ref + | Supervisor => sail2_state_monad$read_regS stvec_ref + | User => sail2_state_monad$read_regS utvec_ref + ) (\ (tvec : Mtvec) . + (case ((tvec_addr tvec cause : ( 32 words$word)option)) of + SOME (epc) => sail2_state_monad$returnS epc + | NONE => (internal_error "Invalid tvec mode" : ( 32 words$word) M) + ))))`; + + +(*val get_xret_target : Privilege -> M (mword ty32)*) + +val _ = Define ` + ((get_xret_target:Privilege ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) p= + ((case p of + Machine => (sail2_state_monad$read_regS mepc_ref : ( 32 words$word) M) + | Supervisor => (sail2_state_monad$read_regS sepc_ref : ( 32 words$word) M) + | User => (sail2_state_monad$read_regS uepc_ref : ( 32 words$word) M) + )))`; + + +(*val set_xret_target : Privilege -> mword ty32 -> M (mword ty32)*) + +val _ = Define ` + ((set_xret_target:Privilege ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) p value= (sail2_state_monad$bindS + (legalize_xepc value : ( 32 words$word) M) (\ target . sail2_state_monad$seqS + (case p of + Machine => sail2_state_monad$write_regS mepc_ref target + | Supervisor => sail2_state_monad$write_regS sepc_ref target + | User => sail2_state_monad$write_regS uepc_ref target + ) + (sail2_state_monad$returnS target))))`; + + +(*val prepare_xret_target : Privilege -> M (mword ty32)*) + +val _ = Define ` + ((prepare_xret_target:Privilege ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) p= ((get_xret_target p : ( 32 words$word) M)))`; + + +(*val get_mtvec : unit -> M (mword ty32)*) + +val _ = Define ` + ((get_mtvec:unit ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS mtvec_ref) (\ (w__0 : Mtvec) . sail2_state_monad$returnS ((get_Mtvec_bits w__0 : 32 words$word)))))`; + + +(*val get_stvec : unit -> M (mword ty32)*) + +val _ = Define ` + ((get_stvec:unit ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS stvec_ref) (\ (w__0 : Mtvec) . sail2_state_monad$returnS ((get_Mtvec_bits w__0 : 32 words$word)))))`; + + +(*val get_utvec : unit -> M (mword ty32)*) + +val _ = Define ` + ((get_utvec:unit ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS utvec_ref) (\ (w__0 : Mtvec) . sail2_state_monad$returnS ((get_Mtvec_bits w__0 : 32 words$word)))))`; + + +(*val set_mtvec : mword ty32 -> M (mword ty32)*) + +val _ = Define ` + ((set_mtvec:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) value= (sail2_state_monad$bindS + (sail2_state_monad$read_regS mtvec_ref) (\ (w__0 : Mtvec) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mtvec_ref ((legalize_tvec w__0 value))) + (sail2_state_monad$read_regS mtvec_ref)) (\ (w__1 : Mtvec) . sail2_state_monad$returnS ((get_Mtvec_bits w__1 : 32 words$word))))))`; + + +(*val set_stvec : mword ty32 -> M (mword ty32)*) + +val _ = Define ` + ((set_stvec:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) value= (sail2_state_monad$bindS + (sail2_state_monad$read_regS stvec_ref) (\ (w__0 : Mtvec) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS stvec_ref ((legalize_tvec w__0 value))) + (sail2_state_monad$read_regS stvec_ref)) (\ (w__1 : Mtvec) . sail2_state_monad$returnS ((get_Mtvec_bits w__1 : 32 words$word))))))`; + + +(*val set_utvec : mword ty32 -> M (mword ty32)*) + +val _ = Define ` + ((set_utvec:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) value= (sail2_state_monad$bindS + (sail2_state_monad$read_regS utvec_ref) (\ (w__0 : Mtvec) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS utvec_ref ((legalize_tvec w__0 value))) + (sail2_state_monad$read_regS utvec_ref)) (\ (w__1 : Mtvec) . sail2_state_monad$returnS ((get_Mtvec_bits w__1 : 32 words$word))))))`; + + +(*val is_NExt_CSR_defined : mword ty12 -> Privilege -> M bool*) + +val _ = Define ` + ((is_NExt_CSR_defined:(12)words$word -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : 12 bits) (p : Privilege)= + (let b__0 = csr in + if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + haveUsrMode () + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + haveUsrMode () + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + haveUsrMode () + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + haveUsrMode () + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + haveUsrMode () + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + haveUsrMode () + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + haveUsrMode () + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + haveUsrMode () + else sail2_state_monad$returnS F))`; + + +(*val read_NExt_CSR : mword ty12 -> M (maybe (mword ty32))*) + +val _ = Define ` + ((read_NExt_CSR:(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((((32)words$word)option),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) csr= + (let b__0 = csr in + if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__0 : Mstatus) . + sail2_state_monad$returnS (SOME ((get_Ustatus_bits ((lower_sstatus ((lower_mstatus w__0)))) : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__1 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__2 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS sideleg_ref) (\ (w__3 : Sinterrupts) . + sail2_state_monad$returnS (SOME ((get_Uinterrupts_bits ((lower_sie ((lower_mie w__1 w__2)) w__3)) : 32 words$word)))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (get_utvec () : ( 32 words$word) M) (\ (w__4 : 32 words$word) . sail2_state_monad$returnS (SOME w__4)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS uscratch_ref : ( 32 words$word) M) (\ (w__5 : 32 words$word) . sail2_state_monad$returnS (SOME w__5)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (get_xret_target User : ( 32 words$word) M) (\ (w__6 : 32 words$word) . sail2_state_monad$bindS + (pc_alignment_mask () : ( 32 words$word) M) (\ (w__7 : 32 words$word) . + sail2_state_monad$returnS (SOME ((and_vec w__6 w__7 : 32 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS ucause_ref) (\ (w__8 : Mcause) . + sail2_state_monad$returnS (SOME ((get_Mcause_bits w__8 : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS utval_ref : ( 32 words$word) M) (\ (w__9 : 32 words$word) . sail2_state_monad$returnS (SOME w__9)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__10 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__11 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS sideleg_ref) (\ (w__12 : Sinterrupts) . + sail2_state_monad$returnS (SOME ((get_Uinterrupts_bits ((lower_sip ((lower_mip w__10 w__11)) w__12)) + : 32 words$word)))))) + else sail2_state_monad$returnS NONE))`; + + +(*val write_NExt_CSR : mword ty12 -> mword ty32 -> M bool*) + +val _ = Define ` + ((write_NExt_CSR:(12)words$word ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (value : xlenbits)= + (let b__0 = csr in sail2_state_monad$bindS + (if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__0 : Mstatus) . sail2_state_monad$bindS + (legalize_ustatus w__0 value) (\ (w__1 : Mstatus) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mstatus_ref w__1) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__2 : Mstatus) . + sail2_state_monad$returnS (SOME ((get_Mstatus_bits w__2 : 32 words$word)))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__3 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__4 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS sideleg_ref) (\ (w__5 : Sinterrupts) . + let sie = (legalize_uie ((lower_mie w__3 w__4)) w__5 value) in sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__6 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__7 : Minterrupts) . sail2_state_monad$bindS + (lift_sie w__6 w__7 sie) (\ (w__8 : Minterrupts) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mie_ref w__8) + (sail2_state_monad$read_regS mie_ref)) (\ (w__9 : Minterrupts) . + sail2_state_monad$returnS (SOME ((get_Minterrupts_bits w__9 : 32 words$word)))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (set_utvec value : ( 32 words$word) M) (\ (w__10 : 32 words$word) . sail2_state_monad$returnS (SOME w__10)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS uscratch_ref value) + (sail2_state_monad$read_regS uscratch_ref : ( 32 words$word) M)) (\ (w__11 : 32 words$word) . sail2_state_monad$returnS (SOME w__11)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (set_xret_target User value : ( 32 words$word) M) (\ (w__12 : 32 words$word) . + sail2_state_monad$returnS (SOME w__12)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (set_Mcause_bits ucause_ref value) + (sail2_state_monad$read_regS ucause_ref)) (\ (w__13 : Mcause) . + sail2_state_monad$returnS (SOME ((get_Mcause_bits w__13 : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS utval_ref value) + (sail2_state_monad$read_regS utval_ref : ( 32 words$word) M)) (\ (w__14 : 32 words$word) . sail2_state_monad$returnS (SOME w__14)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__15 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__16 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS sideleg_ref) (\ (w__17 : Sinterrupts) . + let sip = (legalize_uip ((lower_mip w__15 w__16)) w__17 value) in sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__18 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__19 : Minterrupts) . sail2_state_monad$bindS + (lift_sip w__18 w__19 sip) (\ (w__20 : Minterrupts) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mip_ref w__20) + (sail2_state_monad$read_regS mip_ref)) (\ (w__21 : Minterrupts) . + sail2_state_monad$returnS (SOME ((get_Minterrupts_bits w__21 : 32 words$word)))))))))) + else sail2_state_monad$returnS NONE) (\ (res : xlenbits option) . + sail2_state_monad$returnS ((case res of + SOME (v) => + let (_ : unit) = + (if ((get_config_print_reg () )) then + print_dbg + ((STRCAT "CSR " + ((STRCAT ((csr_name csr)) + ((STRCAT " <- " + ((STRCAT ((string_of_bits v)) + ((STRCAT " (input: " ((STRCAT ((string_of_bits value)) ")")))))))))))) + else () ) in + T + | NONE => F + )))))`; + + +(*val ext_is_CSR_defined : mword ty12 -> Privilege -> M bool*) + +val _ = Define ` + ((ext_is_CSR_defined:(12)words$word -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (p : Privilege)= (is_NExt_CSR_defined csr p))`; + + +(*val ext_read_CSR : mword ty12 -> M (maybe (mword ty32))*) + +val _ = Define ` + ((ext_read_CSR:(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((((32)words$word)option),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) csr= ((read_NExt_CSR csr : ( ( 32 words$word)option) M)))`; + + +(*val ext_write_CSR : mword ty12 -> mword ty32 -> M bool*) + +val _ = Define ` + ((ext_write_CSR:(12)words$word ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (value : xlenbits)= (write_NExt_CSR csr value))`; + + +(*val csrAccess : mword ty12 -> mword ty2*) + +val _ = Define ` + ((csrAccess:(12)words$word ->(2)words$word) csr= ((subrange_vec_dec csr (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)))`; + + +(*val csrPriv : mword ty12 -> mword ty2*) + +val _ = Define ` + ((csrPriv:(12)words$word ->(2)words$word) csr= ((subrange_vec_dec csr (( 9 : int):ii) (( 8 : int):ii) : 2 words$word)))`; + + +(*val is_CSR_defined : mword ty12 -> Privilege -> M bool*) + +val _ = Define ` + ((is_CSR_defined:(12)words$word -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (p : Privilege)= + (let b__0 = csr in + if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) /\ ((((( 32 : int):ii) = (( 32 : int):ii))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) /\ ((((( 32 : int):ii) = (( 32 : int):ii))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) /\ ((((( 32 : int):ii) = (( 32 : int):ii))))))) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) /\ ((((( 32 : int):ii) = (( 32 : int):ii))))))) + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state$and_boolS ((haveSupMode () )) + (sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) \/ (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word))))))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits User : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits User : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits User : 2 words$word))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits User : 2 words$word))))) /\ ((((( 32 : int):ii) = (( 32 : int):ii))))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits User : 2 words$word))))) /\ ((((( 32 : int):ii) = (( 32 : int):ii))))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state_monad$returnS ((((((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits User : 2 words$word))))) /\ ((((( 32 : int):ii) = (( 32 : int):ii))))))) + else ext_is_CSR_defined csr p))`; + + +(*val check_CSR_access : mword ty2 -> mword ty2 -> Privilege -> bool -> bool*) + +val _ = Define ` + ((check_CSR_access:(2)words$word ->(2)words$word -> Privilege -> bool -> bool) csrrw csrpr p isWrite= + (((~ ((((((isWrite = T))) /\ (((csrrw = (vec_of_bits [B1;B1] : 2 words$word))))))))) /\ ((zopz0zKzJ_u ((privLevel_to_bits p : 2 words$word)) csrpr))))`; + + +(*val check_TVM_SATP : mword ty12 -> Privilege -> M bool*) + +val _ = Define ` + ((check_TVM_SATP:(12)words$word -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (p : Privilege)= (sail2_state_monad$bindS + (sail2_state$and_boolS + (sail2_state_monad$returnS (((csr = (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word))))) + (sail2_state$and_boolS + (sail2_state_monad$returnS (((((privLevel_to_bits p : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word)))))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mstatus_ref) (\ (w__0 : Mstatus) . + sail2_state_monad$returnS (((((get_Mstatus_TVM w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))) (\ (w__2 : + bool) . + sail2_state_monad$returnS ((~ w__2)))))`; + + +(*val check_Counteren : mword ty12 -> Privilege -> M bool*) + +val _ = Define ` + ((check_Counteren:(12)words$word -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (p : Privilege)= + ((case (csr, p) of + (b__0, Supervisor) => + if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcounteren_ref) (\ (w__0 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_CY w__0 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcounteren_ref) (\ (w__1 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_TM w__1 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcounteren_ref) (\ (w__2 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_IR w__2 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))) + else + sail2_state_monad$returnS ((case (b__0, Supervisor) of + (_, _) => + if (((((zopz0zIzJ_u (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word) + csr)) /\ ((zopz0zIzJ_u csr + (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B1;B1;B1;B1;B1] : 12 words$word)))))) then + F + else T + )) + | (b__3, User) => + if (((b__3 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + sail2_state$and_boolS + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mcounteren_ref) (\ (w__6 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_CY w__6 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))) + (sail2_state$or_boolS ( sail2_state_monad$bindS(haveSupMode () ) (\ (w__7 : bool) . sail2_state_monad$returnS ((~ w__7)))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS scounteren_ref) (\ (w__8 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_CY w__8 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) + else if (((b__3 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then + sail2_state$and_boolS + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mcounteren_ref) (\ (w__11 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_TM w__11 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))) + (sail2_state$or_boolS ( sail2_state_monad$bindS(haveSupMode () ) (\ (w__12 : bool) . sail2_state_monad$returnS ((~ w__12)))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS scounteren_ref) (\ (w__13 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_TM w__13 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) + else if (((b__3 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then + sail2_state$and_boolS + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mcounteren_ref) (\ (w__16 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_IR w__16 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))) + (sail2_state$or_boolS ( sail2_state_monad$bindS(haveSupMode () ) (\ (w__17 : bool) . sail2_state_monad$returnS ((~ w__17)))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS scounteren_ref) (\ (w__18 : Counteren) . + sail2_state_monad$returnS (((((get_Counteren_IR w__18 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) + else + sail2_state_monad$returnS ((case (b__3, User) of + (_, _) => + if (((((zopz0zIzJ_u (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word) + csr)) /\ ((zopz0zIzJ_u csr + (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B1;B1;B1;B1;B1] : 12 words$word)))))) then + F + else T + )) + | (_, _) => + sail2_state_monad$returnS (if (((((zopz0zIzJ_u (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word) + csr)) /\ ((zopz0zIzJ_u csr + (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B1;B1;B1;B1;B1] : 12 words$word)))))) then + F + else T) + )))`; + + +(*val check_CSR : mword ty12 -> Privilege -> bool -> M bool*) + +val _ = Define ` + ((check_CSR:(12)words$word -> Privilege -> bool ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (p : Privilege) (isWrite : bool)= + (sail2_state$and_boolS ((is_CSR_defined csr p)) + (sail2_state$and_boolS + (sail2_state_monad$returnS ((check_CSR_access ((csrAccess csr : 2 words$word)) ((csrPriv csr : 2 words$word)) p + isWrite))) (sail2_state$and_boolS ((check_TVM_SATP csr p)) ((check_Counteren csr p))))))`; + + +(*val exception_delegatee : ExceptionType -> Privilege -> M Privilege*) + +val _ = Define ` + ((exception_delegatee:ExceptionType -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((Privilege),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (e : ExceptionType) (p : Privilege)= + (let idx = (num_of_ExceptionType e) in sail2_state_monad$bindS + (sail2_state_monad$read_regS medeleg_ref) (\ (w__0 : Medeleg) . + let super = (access_vec_dec ((get_Medeleg_bits w__0 : 32 words$word)) idx) in sail2_state_monad$bindS + (haveSupMode () ) (\ (w__1 : bool) . sail2_state_monad$bindS + (if w__1 then + sail2_state$and_boolS (sail2_state_monad$returnS ((bit_to_bool super))) + (sail2_state$and_boolS ((haveNExt () )) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS sedeleg_ref) (\ (w__3 : Sedeleg) . + sail2_state_monad$returnS ((bit_to_bool ((access_vec_dec ((get_Sedeleg_bits w__3 : 32 words$word)) idx))))))) + else sail2_state$and_boolS (sail2_state_monad$returnS ((bit_to_bool super))) ((haveNExt () ))) (\ user . sail2_state_monad$bindS + (sail2_state$and_boolS ((haveUsrMode () )) (sail2_state_monad$returnS user)) (\ w__9 . sail2_state_monad$bindS + (if w__9 then sail2_state_monad$returnS User + else sail2_state_monad$bindS + (sail2_state$and_boolS ((haveSupMode () )) (sail2_state_monad$returnS ((bit_to_bool super)))) (\ (w__11 : bool) . + sail2_state_monad$returnS (if w__11 then Supervisor + else Machine))) (\ deleg . + sail2_state_monad$returnS (if ((zopz0zI_u ((privLevel_to_bits deleg : 2 words$word)) + ((privLevel_to_bits p : 2 words$word)))) then + p + else deleg))))))))`; + + +(*val findPendingInterrupt : mword ty32 -> maybe InterruptType*) + +val _ = Define ` + ((findPendingInterrupt:(32)words$word ->(InterruptType)option) ip= + (let ip = (Mk_Minterrupts ip) in + if (((((get_Minterrupts_MEI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then + SOME I_M_External + else if (((((get_Minterrupts_MSI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_M_Software + else if (((((get_Minterrupts_MTI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_M_Timer + else if (((((get_Minterrupts_SEI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_S_External + else if (((((get_Minterrupts_SSI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_S_Software + else if (((((get_Minterrupts_STI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_S_Timer + else if (((((get_Minterrupts_UEI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_U_External + else if (((((get_Minterrupts_USI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_U_Software + else if (((((get_Minterrupts_UTI ip : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + SOME I_U_Timer + else NONE))`; + + +(*val processPending : Minterrupts -> Minterrupts -> mword ty32 -> bool -> interrupt_set*) + +val _ = Define ` + ((processPending:Minterrupts -> Minterrupts ->(32)words$word -> bool -> interrupt_set) (xip : Minterrupts) (xie : Minterrupts) (xideleg : xlenbits) (priv_enabled : bool)= + (let effective_pend = + ((and_vec ((get_Minterrupts_bits xip : 32 words$word)) + ((and_vec ((get_Minterrupts_bits xie : 32 words$word)) ((not_vec xideleg : 32 words$word)) + : 32 words$word)) + : 32 words$word)) in + let effective_delg = ((and_vec ((get_Minterrupts_bits xip : 32 words$word)) xideleg : 32 words$word)) in + if (((priv_enabled /\ (((effective_pend <> ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))))))) + then + Ints_Pending effective_pend + else if (((effective_delg <> ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))))) + then + Ints_Delegated effective_delg + else Ints_Empty () ))`; + + +(*val getPendingSet : Privilege -> M (maybe ((mword ty32 * Privilege)))*) + +val _ = Define ` + ((getPendingSet:Privilege ->(regstate)sail2_state_monad$sequential_state ->(((((32)words$word#Privilege)option),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) priv= (sail2_state_monad$bindS + (haveUsrMode () ) (\ (w__0 : bool) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$assert_expS w__0 "no user mode: M/U or M/S/U system required") + (sail2_state_monad$read_regS mip_ref)) (\ (w__1 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__2 : Minterrupts) . + let effective_pending = + ((and_vec ((get_Minterrupts_bits w__1 : 32 words$word)) + ((get_Minterrupts_bits w__2 : 32 words$word)) + : 32 words$word)) in + if (((effective_pending = ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))))) + then + sail2_state_monad$returnS NONE + else sail2_state_monad$bindS + (sail2_state$or_boolS + (sail2_state_monad$returnS (((((privLevel_to_bits priv : 2 words$word)) <> ((privLevel_to_bits Machine : 2 words$word)))))) + (sail2_state$and_boolS + (sail2_state_monad$returnS (((((privLevel_to_bits priv : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word)))))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mstatus_ref) (\ (w__3 : Mstatus) . + sail2_state_monad$returnS (((((get_Mstatus_MIE w__3 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))) (\ mIE . sail2_state_monad$bindS + (sail2_state$and_boolS ((haveSupMode () )) + (sail2_state$or_boolS + (sail2_state_monad$returnS (((((privLevel_to_bits priv : 2 words$word)) = ((privLevel_to_bits User : 2 words$word)))))) + (sail2_state$and_boolS + (sail2_state_monad$returnS (((((privLevel_to_bits priv : 2 words$word)) = ((privLevel_to_bits Supervisor : 2 words$word)))))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mstatus_ref) (\ (w__6 : Mstatus) . + sail2_state_monad$returnS (((((get_Mstatus_SIE w__6 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))))) (\ sIE . sail2_state_monad$bindS + (sail2_state$and_boolS ((haveNExt () )) + (sail2_state$and_boolS + (sail2_state_monad$returnS (((((privLevel_to_bits priv : 2 words$word)) = ((privLevel_to_bits User : 2 words$word)))))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mstatus_ref) (\ (w__10 : Mstatus) . + sail2_state_monad$returnS (((((get_Mstatus_UIE w__10 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))))))) (\ uIE . sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__12 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__13 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__14 : Minterrupts) . + (case ((processPending w__12 w__13 ((get_Minterrupts_bits w__14 : 32 words$word)) mIE)) of + Ints_Empty (() ) => sail2_state_monad$returnS NONE + | Ints_Pending (p) => + let r = (p, Machine) in + sail2_state_monad$returnS (SOME r) + | Ints_Delegated (d) => sail2_state_monad$bindS + (haveSupMode () ) (\ (w__15 : bool) . + if ((~ w__15)) then + sail2_state_monad$returnS (if uIE then + let r = (d, User) in + SOME r + else NONE) + else sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__16 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS sideleg_ref) (\ (w__17 : Sinterrupts) . + sail2_state_monad$returnS ((case ((processPending ((Mk_Minterrupts d)) w__16 + ((get_Sinterrupts_bits w__17 : 32 words$word)) sIE)) of + Ints_Empty (() ) => NONE + | Ints_Pending (p) => + let r = (p, Supervisor) in + SOME r + | Ints_Delegated (d) => + if uIE then + let r = (d, User) in + SOME r + else NONE + ))))) + ))))))))))))`; + + +(*val dispatchInterrupt : Privilege -> M (maybe ((InterruptType * Privilege)))*) + +val _ = Define ` + ((dispatchInterrupt:Privilege ->(regstate)sail2_state_monad$sequential_state ->((((InterruptType#Privilege)option),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) priv= (sail2_state_monad$bindS + (sail2_state$or_boolS ( sail2_state_monad$bindS(haveUsrMode () ) (\ (w__0 : bool) . sail2_state_monad$returnS ((~ w__0)))) + (sail2_state$and_boolS ( sail2_state_monad$bindS(haveSupMode () ) (\ (w__1 : bool) . sail2_state_monad$returnS ((~ w__1)))) + ( sail2_state_monad$bindS(haveNExt () ) (\ (w__2 : bool) . sail2_state_monad$returnS ((~ w__2)))))) (\ (w__4 : bool) . + if w__4 then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$assert_expS (((((privLevel_to_bits priv : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) "invalid current privilege") + (sail2_state_monad$read_regS mip_ref)) (\ (w__5 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__6 : Minterrupts) . + let enabled_pending = + ((and_vec ((get_Minterrupts_bits w__5 : 32 words$word)) + ((get_Minterrupts_bits w__6 : 32 words$word)) + : 32 words$word)) in + sail2_state_monad$returnS ((case ((findPendingInterrupt enabled_pending)) of + SOME (i) => + let r = (i, Machine) in + SOME r + | NONE => NONE + )))) + else sail2_state_monad$bindS + (getPendingSet priv : ( (( 32 words$word # Privilege))option) M) (\ (w__7 : + (( 32 words$word # Privilege))option) . + sail2_state_monad$returnS ((case w__7 of + NONE => NONE + | SOME ((ip, p)) => + (case ((findPendingInterrupt ip)) of + NONE => NONE + | SOME (i) => + let r = (i, p) in + SOME r + ) + ))))))`; + + +(*val tval : maybe (mword ty32) -> mword ty32*) + +val _ = Define ` + ((tval:((32)words$word)option ->(32)words$word) excinfo= + ((case excinfo of + SOME (e) => e + | NONE => (EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word) + )))`; + + +(*val rvfi_trap : unit -> unit*) + +val _ = Define ` + ((rvfi_trap:unit -> unit) () = () )`; + + +(*val trap_handler : Privilege -> bool -> mword ty8 -> mword ty32 -> maybe (mword ty32) -> maybe unit -> M (mword ty32)*) + +val _ = Define ` + ((trap_handler:Privilege -> bool ->(8)words$word ->(32)words$word ->(xlenbits)option ->(ext_exception)option ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (del_priv : Privilege) (intr : bool) (c : exc_code) (pc : xlenbits) (info : + xlenbits option) (ext : ext_exception option)= + (let (_ : unit) = (rvfi_trap () ) in + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "handling " + ((STRCAT (if intr then "int#" else "exc#") + ((STRCAT ((string_of_bits c)) + ((STRCAT " at priv " + ((STRCAT ((privLevel_to_str del_priv)) + ((STRCAT " with tval " + ((string_of_bits ((tval info : 32 words$word)))))))))))))))) + else () ) in + let (_ : unit) = (cancel_reservation () ) in + (case del_priv of + Machine => sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mcause_IsInterrupt mcause_ref ((bool_to_bits intr : 1 words$word))) + (set_Mcause_Cause mcause_ref ((EXTZ (( 31 : int):ii) c : 31 words$word)))) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__0 : Mstatus) . sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_MPIE mstatus_ref ((get_Mstatus_MIE w__0 : 1 words$word))) + (set_Mstatus_MIE mstatus_ref ((bool_to_bits F : 1 words$word)))) + (sail2_state_monad$read_regS cur_privilege_ref)) (\ (w__1 : Privilege) . sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_MPP mstatus_ref ((privLevel_to_bits w__1 : 2 words$word))) + (sail2_state_monad$write_regS mtval_ref ((tval info : 32 words$word)))) + (sail2_state_monad$write_regS mepc_ref pc)) + (sail2_state_monad$write_regS cur_privilege_ref del_priv)) + (let (_ : unit) = (handle_trap_extension del_priv pc ext) in sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_reg () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__2 : Mstatus) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "CSR mstatus <- " + ((string_of_bits ((get_Mstatus_bits w__2 : 32 words$word))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mcause_ref)) (\ (w__3 : Mcause) . + (prepare_trap_vector del_priv w__3 : ( 32 words$word) M))))) + | Supervisor => sail2_state_monad$bindS + (haveSupMode () ) (\ (w__5 : bool) . sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$assert_expS w__5 "no supervisor mode present for delegation") + (set_Mcause_IsInterrupt scause_ref ((bool_to_bits intr : 1 words$word)))) + (set_Mcause_Cause scause_ref ((EXTZ (( 31 : int):ii) c : 31 words$word)))) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__6 : Mstatus) . sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_SPIE mstatus_ref ((get_Mstatus_SIE w__6 : 1 words$word))) + (set_Mstatus_SIE mstatus_ref ((bool_to_bits F : 1 words$word)))) + (sail2_state_monad$read_regS cur_privilege_ref)) (\ (w__7 : Privilege) . sail2_state_monad$bindS + (case w__7 of + User => sail2_state_monad$returnS ((bool_to_bits F : 1 words$word)) + | Supervisor => sail2_state_monad$returnS ((bool_to_bits T : 1 words$word)) + | Machine => (internal_error "invalid privilege for s-mode trap" : ( 1 words$word) M) + ) (\ (w__9 : 1 words$word) . sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_SPP mstatus_ref w__9) + (sail2_state_monad$write_regS stval_ref ((tval info : 32 words$word)))) + (sail2_state_monad$write_regS sepc_ref pc)) + (sail2_state_monad$write_regS cur_privilege_ref del_priv)) + (let (_ : unit) = (handle_trap_extension del_priv pc ext) in sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_reg () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__10 : Mstatus) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "CSR mstatus <- " + ((string_of_bits ((get_Mstatus_bits w__10 : 32 words$word))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS scause_ref)) (\ (w__11 : Mcause) . + (prepare_trap_vector del_priv w__11 : ( 32 words$word) M))))))) + | User => sail2_state_monad$bindS + (haveUsrMode () ) (\ (w__13 : bool) . sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$assert_expS w__13 "no user mode present for delegation") + (set_Mcause_IsInterrupt ucause_ref ((bool_to_bits intr : 1 words$word)))) + (set_Mcause_Cause ucause_ref ((EXTZ (( 31 : int):ii) c : 31 words$word)))) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__14 : Mstatus) . sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_UPIE mstatus_ref ((get_Mstatus_UIE w__14 : 1 words$word))) + (set_Mstatus_UIE mstatus_ref ((bool_to_bits F : 1 words$word)))) + (sail2_state_monad$write_regS utval_ref ((tval info : 32 words$word)))) + (sail2_state_monad$write_regS uepc_ref pc)) + (sail2_state_monad$write_regS cur_privilege_ref del_priv)) + (let (_ : unit) = (handle_trap_extension del_priv pc ext) in sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_reg () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__15 : Mstatus) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "CSR mstatus <- " + ((string_of_bits ((get_Mstatus_bits w__15 : 32 words$word))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS ucause_ref)) (\ (w__16 : Mcause) . + (prepare_trap_vector del_priv w__16 : ( 32 words$word) M))))) + )))`; + + +(*val exception_handler : Privilege -> ctl_result -> mword ty32 -> M (mword ty32)*) + +val _ = Define ` + ((exception_handler:Privilege -> ctl_result ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (cur_priv : Privilege) (ctl : ctl_result) (pc : xlenbits)= + ((case (cur_priv, ctl) of + (_, CTL_TRAP (e)) => sail2_state_monad$bindS + (exception_delegatee e.sync_exception_trap cur_priv) (\ del_priv . + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "trapping from " + ((STRCAT ((privLevel_to_str cur_priv)) + ((STRCAT " to " + ((STRCAT ((privLevel_to_str del_priv)) + ((STRCAT " to handle " + ((exceptionType_to_str e.sync_exception_trap)))))))))))) + else () ) in + (trap_handler del_priv F ((exceptionType_to_bits e.sync_exception_trap : 8 words$word)) pc + e.sync_exception_excinfo e.sync_exception_ext + : ( 32 words$word) M)) + | (_, CTL_MRET (() )) => sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ prev_priv . sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__1 : Mstatus) . sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_MIE mstatus_ref ((get_Mstatus_MPIE w__1 : 1 words$word))) + (set_Mstatus_MPIE mstatus_ref ((bool_to_bits T : 1 words$word)))) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__2 : Mstatus) . sail2_state_monad$bindS + (privLevel_of_bits ((get_Mstatus_MPP w__2 : 2 words$word))) (\ (w__3 : Privilege) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS cur_privilege_ref w__3) + (haveUsrMode () )) (\ (w__4 : bool) . sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_MPP mstatus_ref + ((privLevel_to_bits (if w__4 then User else Machine) : 2 words$word))) + (if ((get_config_print_reg () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__5 : Mstatus) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "CSR mstatus <- " + ((string_of_bits ((get_Mstatus_bits w__5 : 32 words$word))))))))) + else sail2_state_monad$returnS () )) + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__6 : Privilege) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "ret-ing from " + ((STRCAT ((privLevel_to_str prev_priv)) + ((STRCAT " to " ((privLevel_to_str w__6))))))))))) + else sail2_state_monad$returnS () )) + (let (_ : unit) = (cancel_reservation () ) in sail2_state_monad$bindS + (prepare_xret_target Machine : ( 32 words$word) M) (\ (w__7 : 32 words$word) . sail2_state_monad$bindS + (pc_alignment_mask () : ( 32 words$word) M) (\ (w__8 : 32 words$word) . + sail2_state_monad$returnS ((and_vec w__7 w__8 : 32 words$word)))))))))) + | (_, CTL_SRET (() )) => sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ prev_priv . sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__9 : Mstatus) . sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_SIE mstatus_ref ((get_Mstatus_SPIE w__9 : 1 words$word))) + (set_Mstatus_SPIE mstatus_ref ((bool_to_bits T : 1 words$word)))) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__10 : Mstatus) . sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + cur_privilege_ref + (if (((((get_Mstatus_SPP w__10 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) + then + Supervisor + else User)) + (set_Mstatus_SPP mstatus_ref ((bool_to_bits F : 1 words$word)))) + (if ((get_config_print_reg () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__11 : Mstatus) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "CSR mstatus <- " + ((string_of_bits ((get_Mstatus_bits w__11 : 32 words$word))))))))) + else sail2_state_monad$returnS () )) + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__12 : Privilege) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "ret-ing from " + ((STRCAT ((privLevel_to_str prev_priv)) + ((STRCAT " to " ((privLevel_to_str w__12))))))))))) + else sail2_state_monad$returnS () )) + (let (_ : unit) = (cancel_reservation () ) in sail2_state_monad$bindS + (prepare_xret_target Supervisor : ( 32 words$word) M) (\ (w__13 : 32 words$word) . sail2_state_monad$bindS + (pc_alignment_mask () : ( 32 words$word) M) (\ (w__14 : 32 words$word) . + sail2_state_monad$returnS ((and_vec w__13 w__14 : 32 words$word)))))))) + | (_, CTL_URET (() )) => sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ prev_priv . sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__15 : Mstatus) . sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Mstatus_UIE mstatus_ref ((get_Mstatus_UPIE w__15 : 1 words$word))) + (set_Mstatus_UPIE mstatus_ref ((bool_to_bits T : 1 words$word)))) + (sail2_state_monad$write_regS cur_privilege_ref User)) + (if ((get_config_print_reg () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__16 : Mstatus) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "CSR mstatus <- " + ((string_of_bits ((get_Mstatus_bits w__16 : 32 words$word))))))))) + else sail2_state_monad$returnS () )) + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__17 : Privilege) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "ret-ing from " + ((STRCAT ((privLevel_to_str prev_priv)) + ((STRCAT " to " ((privLevel_to_str w__17))))))))))) + else sail2_state_monad$returnS () )) + (let (_ : unit) = (cancel_reservation () ) in sail2_state_monad$bindS + (prepare_xret_target User : ( 32 words$word) M) (\ (w__18 : 32 words$word) . sail2_state_monad$bindS + (pc_alignment_mask () : ( 32 words$word) M) (\ (w__19 : 32 words$word) . + sail2_state_monad$returnS ((and_vec w__18 w__19 : 32 words$word))))))) + )))`; + + +(*val handle_mem_exception : mword ty32 -> ExceptionType -> M unit*) + +val _ = Define ` + ((handle_mem_exception:(32)words$word -> ExceptionType ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (addr : xlenbits) (e : ExceptionType)= + (let (t : sync_exception) = + (<| sync_exception_trap := e; + sync_exception_excinfo := (SOME addr); + sync_exception_ext := NONE |>) in sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__0 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__1 : 32 words$word) . sail2_state_monad$bindS + (exception_handler w__0 (CTL_TRAP t) w__1 : ( 32 words$word) M) (\ (w__2 : 32 words$word) . + set_next_pc w__2)))))`; + + +(*val handle_interrupt : InterruptType -> Privilege -> M unit*) + +val _ = Define ` + ((handle_interrupt:InterruptType -> Privilege ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (i : InterruptType) (del_priv : Privilege)= (sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . sail2_state_monad$bindS + (trap_handler del_priv T ((interruptType_to_bits i : 8 words$word)) w__0 NONE NONE + : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + set_next_pc w__1))))`; + + +(*val init_sys : unit -> M unit*) + +val _ = Define ` + ((init_sys:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS cur_privilege_ref Machine) + (sail2_state_monad$write_regS mhartid_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (set_Misa_MXL misa_ref ((arch_to_bits RV32 : 2 words$word)))) + (set_Misa_A misa_ref ((bool_to_bits T : 1 words$word)))) + (set_Misa_C misa_ref ((bool_to_bits ((sys_enable_rvc () )) : 1 words$word)))) + (set_Misa_I misa_ref ((bool_to_bits T : 1 words$word)))) + (set_Misa_M misa_ref ((bool_to_bits T : 1 words$word)))) + (set_Misa_U misa_ref ((bool_to_bits T : 1 words$word)))) + (set_Misa_S misa_ref ((bool_to_bits T : 1 words$word)))) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__0 : Mstatus) . sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__1 : Misa) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mstatus_ref ((set_mstatus_SXL w__0 ((get_Misa_MXL w__1 : 2 words$word))))) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__2 : Mstatus) . sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__3 : Misa) . sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mstatus_ref ((set_mstatus_UXL w__2 ((get_Misa_MXL w__3 : 2 words$word))))) + (set_Mstatus_SD mstatus_ref ((bool_to_bits F : 1 words$word)))) + (set_Minterrupts_bits mip_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (set_Minterrupts_bits mie_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (set_Minterrupts_bits mideleg_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (set_Medeleg_bits medeleg_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (set_Mtvec_bits mtvec_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (set_Mcause_bits mcause_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (sail2_state_monad$write_regS mepc_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (sail2_state_monad$write_regS mtval_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (sail2_state_monad$write_regS mscratch_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (sail2_state_monad$write_regS mcycle_ref ((EXTZ (( 64 : int):ii) (vec_of_bits [B0] : 1 words$word) : 64 words$word)))) + (sail2_state_monad$write_regS mtime_ref ((EXTZ (( 64 : int):ii) (vec_of_bits [B0] : 1 words$word) : 64 words$word)))) + (set_Counteren_bits mcounteren_ref ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + (sail2_state_monad$write_regS minstret_ref ((EXTZ (( 64 : int):ii) (vec_of_bits [B0] : 1 words$word) : 64 words$word)))) + (sail2_state_monad$write_regS minstret_written_ref F)) + (init_pmp () )) + (if ((get_config_print_reg () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__4 : Mstatus) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "CSR mstatus <- " + ((STRCAT ((string_of_bits ((get_Mstatus_bits w__4 : 32 words$word)))) + ((STRCAT " (input: " + ((STRCAT + ((string_of_bits + ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word)))) + ")"))))))))))) + else sail2_state_monad$returnS () )))))))`; + + +(*val elf_tohost : unit -> ii*) + +(*val elf_entry : unit -> ii*) + + + +(*val phys_mem_segments : unit -> list ((mword ty32 * mword ty32))*) + +val _ = Define ` + ((phys_mem_segments:unit ->((32)words$word#(32)words$word)list) () = + (((plat_rom_base () : 32 words$word), (plat_rom_size () : 32 words$word)) :: + (((plat_ram_base () : 32 words$word), (plat_ram_size () : 32 words$word)) :: [])))`; + + +(*val within_phys_mem : mword ty32 -> integer -> bool*) + +val _ = Define ` + ((within_phys_mem:(32)words$word -> int -> bool) (addr : xlenbits) (width : int)= + (let addr_int = (lem$w2ui addr) in + let ram_base_int = (lem$w2ui ((plat_ram_base () : 32 words$word))) in + let rom_base_int = (lem$w2ui ((plat_rom_base () : 32 words$word))) in + let ram_size_int = (lem$w2ui ((plat_ram_size () : 32 words$word))) in + let rom_size_int = (lem$w2ui ((plat_rom_size () : 32 words$word))) in + if (((((ram_base_int <= addr_int)) /\ ((((addr_int + ((id width)))) <= ((ram_base_int + ram_size_int))))))) + then + T + else if (((((rom_base_int <= addr_int)) /\ ((((addr_int + ((id width)))) <= + ((rom_base_int + rom_size_int))))))) then + T + else + let (_ : unit) = + (print_dbg + ((STRCAT "within_phys_mem: " + ((STRCAT ((string_of_bits addr)) " not within phys-mem:"))))) in + let (_ : unit) = + (print_dbg + ((STRCAT " plat_rom_base: " ((string_of_bits ((plat_rom_base () : 32 words$word))))))) in + let (_ : unit) = + (print_dbg + ((STRCAT " plat_rom_size: " ((string_of_bits ((plat_rom_size () : 32 words$word))))))) in + let (_ : unit) = + (print_dbg + ((STRCAT " plat_ram_base: " ((string_of_bits ((plat_ram_base () : 32 words$word))))))) in + let (_ : unit) = + (print_dbg + ((STRCAT " plat_ram_size: " ((string_of_bits ((plat_ram_size () : 32 words$word))))))) in + F))`; + + +(*val within_clint : mword ty32 -> integer -> bool*) + +val _ = Define ` + ((within_clint:(32)words$word -> int -> bool) (addr : xlenbits) (width : int)= + (let addr_int = (lem$w2ui addr) in + let clint_base_int = (lem$w2ui ((plat_clint_base () : 32 words$word))) in + let clint_size_int = (lem$w2ui ((plat_clint_size () : 32 words$word))) in + (((clint_base_int <= addr_int)) /\ ((((addr_int + ((id width)))) <= ((clint_base_int + clint_size_int)))))))`; + + +(*val within_htif_writable : mword ty32 -> integer -> bool*) + +val _ = Define ` + ((within_htif_writable:(32)words$word -> int -> bool) (addr : xlenbits) (width : int)= + ((((((plat_htif_tohost () : 32 words$word)) = addr))) \/ ((((((((add_vec_int ((plat_htif_tohost () : 32 words$word)) (( 4 : int):ii) : 32 words$word)) = addr))) /\ (((width = (( 4 : int):ii)))))))))`; + + +(*val within_htif_readable : mword ty32 -> integer -> bool*) + +val _ = Define ` + ((within_htif_readable:(32)words$word -> int -> bool) (addr : xlenbits) (width : int)= + ((((((plat_htif_tohost () : 32 words$word)) = addr))) \/ ((((((((add_vec_int ((plat_htif_tohost () : 32 words$word)) (( 4 : int):ii) : 32 words$word)) = addr))) /\ (((width = (( 4 : int):ii)))))))))`; + + +val _ = Define ` +((MSIP_BASE:(32)words$word)= + ((EXTZ (( 32 : int):ii) + (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 20 words$word) + : 32 words$word)))`; + + +val _ = Define ` +((MTIMECMP_BASE:(32)words$word)= + ((EXTZ (( 32 : int):ii) + (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 20 words$word) + : 32 words$word)))`; + + +val _ = Define ` +((MTIMECMP_BASE_HI:(32)words$word)= + ((EXTZ (( 32 : int):ii) + (vec_of_bits [B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0] : 20 words$word) + : 32 words$word)))`; + + +val _ = Define ` +((MTIME_BASE:(32)words$word)= + ((EXTZ (( 32 : int):ii) + (vec_of_bits [B0;B0;B0;B0;B1;B0;B1;B1;B1;B1;B1;B1;B1;B1;B1;B1;B1;B0;B0;B0] : 20 words$word) + : 32 words$word)))`; + + +val _ = Define ` +((MTIME_BASE_HI:(32)words$word)= + ((EXTZ (( 32 : int):ii) + (vec_of_bits [B0;B0;B0;B0;B1;B0;B1;B1;B1;B1;B1;B1;B1;B1;B1;B1;B1;B1;B0;B0] : 20 words$word) + : 32 words$word)))`; + + +(*val clint_load : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> M (MemoryOpResult (mword 'int8_times_n))*) + +val _ = Define ` + ((clint_load:(32)words$word -> int ->(regstate)sail2_state_monad$sequential_state ->(((('int8_times_n words$word)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width= + (let addr = ((sub_vec addr ((plat_clint_base () : 32 words$word)) : 32 words$word)) in + if ((((((addr = MSIP_BASE))) /\ ((((((((id width)) = (( 8 : int):ii)))) \/ (((((id width)) = (( 4 : int):ii)))))))))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__0 : Minterrupts) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "clint[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " + ((string_of_bits ((get_Minterrupts_MSI w__0 : 1 words$word))))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mip_ref)) (\ (w__1 : Minterrupts) . + sail2_state_monad$returnS (MemValue ((zero_extend ((get_Minterrupts_MSI w__1 : 1 words$word)) + (((( 8 : int):ii) * ((id width)))) + : 'int8_times_n words$word)))) + else if ((((((addr = MTIMECMP_BASE))) /\ (((((id width)) = (( 4 : int):ii))))))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M) (\ (w__2 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "clint<4>[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " + ((string_of_bits + ((subrange_vec_dec w__2 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word))))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M)) (\ (w__3 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w + ((zero_extend ((subrange_vec_dec w__3 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + (( 32 : int):ii) + : 32 words$word)) + : 'int8_times_n words$word)))) + else if ((((((addr = MTIMECMP_BASE))) /\ (((((id width)) = (( 8 : int):ii))))))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M) (\ (w__4 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "clint<8>[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " ((string_of_bits w__4))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M)) (\ (w__5 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w ((zero_extend w__5 (( 64 : int):ii) : 64 words$word)) : 'int8_times_n words$word)))) + else if ((((((addr = MTIMECMP_BASE_HI))) /\ (((((id width)) = (( 4 : int):ii))))))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M) (\ (w__6 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "clint-hi<4>[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " + ((string_of_bits + ((subrange_vec_dec w__6 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word))))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M)) (\ (w__7 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w + ((zero_extend ((subrange_vec_dec w__7 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word)) + (( 32 : int):ii) + : 32 words$word)) + : 'int8_times_n words$word)))) + else if ((((((addr = MTIME_BASE))) /\ (((((id width)) = (( 4 : int):ii))))))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__8 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "clint[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " ((string_of_bits w__8))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M)) (\ (w__9 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w + ((zero_extend ((subrange_vec_dec w__9 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + (( 32 : int):ii) + : 32 words$word)) + : 'int8_times_n words$word)))) + else if ((((((addr = MTIME_BASE))) /\ (((((id width)) = (( 8 : int):ii))))))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__10 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "clint[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " ((string_of_bits w__10))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M)) (\ (w__11 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w ((zero_extend w__11 (( 64 : int):ii) : 64 words$word)) + : 'int8_times_n words$word)))) + else if ((((((addr = MTIME_BASE_HI))) /\ (((((id width)) = (( 4 : int):ii))))))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__12 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "clint[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " ((string_of_bits w__12))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M)) (\ (w__13 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w + ((zero_extend ((subrange_vec_dec w__13 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word)) + (( 32 : int):ii) + : 32 words$word)) + : 'int8_times_n words$word)))) + else + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "clint[" ((STRCAT ((string_of_bits addr)) "] -> <not-mapped>")))) + else () ) in + sail2_state_monad$returnS (MemException E_Load_Access_Fault)))`; + + +(*val clint_dispatch : unit -> M unit*) + +val _ = Define ` + ((clint_dispatch:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS (sail2_state_monad$seqS (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg ((STRCAT "clint::tick mtime <- " ((string_of_bits w__0))))))) + else sail2_state_monad$returnS () ) + (set_Minterrupts_MTI mip_ref ((bool_to_bits F : 1 words$word)))) + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M)) (\ (w__1 : 64 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__2 : 64 words$word) . + if ((zopz0zIzJ_u w__1 w__2)) then sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__3 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg ((STRCAT " clint timer pending at mtime " ((string_of_bits w__3))))))) + else sail2_state_monad$returnS () ) + (set_Minterrupts_MTI mip_ref ((bool_to_bits T : 1 words$word))) + else sail2_state_monad$returnS () ))))`; + + +(*val clint_store : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> mword 'int8_times_n -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((clint_store:(32)words$word -> int -> 'int8_times_n words$word ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width data= + (let addr = ((sub_vec addr ((plat_clint_base () : 32 words$word)) : 32 words$word)) in + if ((((((addr = MSIP_BASE))) /\ ((((((((id width)) = (( 8 : int):ii)))) \/ (((((id width)) = (( 4 : int):ii)))))))))) then + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "clint[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] <- " + ((STRCAT ((string_of_bits data)) + ((STRCAT " (mip.MSI <- " + ((STRCAT + ((string_of_bits + ((cast_unit_vec0 ((access_vec_dec data (( 0 : int):ii))) : 1 words$word)))) + ")")))))))))))) + else () ) in sail2_state_monad$seqS (sail2_state_monad$seqS + (set_Minterrupts_MSI mip_ref + ((bool_to_bits + (((((cast_unit_vec0 ((access_vec_dec data (( 0 : int):ii))) : 1 words$word)) = (vec_of_bits [B1] : 1 words$word)))) + : 1 words$word))) + (clint_dispatch () )) (sail2_state_monad$returnS (MemValue T)) + else if ((((((addr = MTIMECMP_BASE))) /\ (((((id width)) = (( 8 : int):ii))))))) then + let (data : 64 words$word) = ((words$w2w data : 64 words$word)) in + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "clint<8>[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] <- " ((STRCAT ((string_of_bits data)) " (mtimecmp)")))))))) + else () ) in sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mtimecmp_ref ((zero_extend data (( 64 : int):ii) : 64 words$word))) + (clint_dispatch () )) (sail2_state_monad$returnS (MemValue T)) + else if ((((((addr = MTIMECMP_BASE))) /\ (((((id width)) = (( 4 : int):ii))))))) then + let (data : 32 words$word) = ((words$w2w data : 32 words$word)) in + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "clint<4>[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] <- " ((STRCAT ((string_of_bits data)) " (mtimecmp)")))))))) + else () ) in sail2_state_monad$bindS + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + mtimecmp_ref + ((update_subrange_vec_dec w__0 (( 31 : int):ii) (( 0 : int):ii) ((zero_extend data (( 32 : int):ii) : 32 words$word)) + : 64 words$word))) + (clint_dispatch () )) (sail2_state_monad$returnS (MemValue T))) + else if ((((((addr = MTIMECMP_BASE_HI))) /\ (((((id width)) = (( 4 : int):ii))))))) then + let (data : 32 words$word) = ((words$w2w data : 32 words$word)) in + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "clint<4>[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] <- " ((STRCAT ((string_of_bits data)) " (mtimecmp)")))))))) + else () ) in sail2_state_monad$bindS + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M) (\ (w__1 : 64 words$word) . sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + mtimecmp_ref + ((update_subrange_vec_dec w__1 (( 63 : int):ii) (( 32 : int):ii) ((zero_extend data (( 32 : int):ii) : 32 words$word)) + : 64 words$word))) + (clint_dispatch () )) (sail2_state_monad$returnS (MemValue T))) + else + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "clint[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] <- " ((STRCAT ((string_of_bits data)) " (<unmapped>)")))))))) + else () ) in + sail2_state_monad$returnS (MemException E_SAMO_Access_Fault)))`; + + +(*val tick_clock : unit -> M unit*) + +val _ = Define ` + ((tick_clock:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mcycle_ref ((add_vec_int w__0 (( 1 : int):ii) : 64 words$word))) + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M)) (\ (w__1 : 64 words$word) . sail2_state_monad$seqS + (sail2_state_monad$write_regS mtime_ref ((add_vec_int w__1 (( 1 : int):ii) : 64 words$word))) (clint_dispatch () )))))`; + + +(*val Mk_htif_cmd : mword ty64 -> htif_cmd*) + +val _ = Define ` + ((Mk_htif_cmd:(64)words$word -> htif_cmd) v= + (<| htif_cmd_htif_cmd_chunk_0 := ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) |>))`; + + +(*val _get_htif_cmd_bits : htif_cmd -> mword ty64*) + +val _ = Define ` + ((get_htif_cmd_bits:htif_cmd ->(64)words$word) v= + ((subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)))`; + + +(*val _set_htif_cmd_bits : register_ref regstate register_value htif_cmd -> mword ty64 -> M unit*) + +val _ = Define ` + ((set_htif_cmd_bits:((regstate),(register_value),(htif_cmd))register_ref ->(64)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec r.htif_cmd_htif_cmd_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_htif_cmd_bits : htif_cmd -> mword ty64 -> htif_cmd*) + +val _ = Define ` + ((update_htif_cmd_bits:htif_cmd ->(64)words$word -> htif_cmd) v x= + ((v with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_htif_cmd_device : htif_cmd -> mword ty8*) + +val _ = Define ` + ((get_htif_cmd_device:htif_cmd ->(8)words$word) v= + ((subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 63 : int):ii) (( 56 : int):ii) : 8 words$word)))`; + + +(*val _set_htif_cmd_device : register_ref regstate register_value htif_cmd -> mword ty8 -> M unit*) + +val _ = Define ` + ((set_htif_cmd_device:((regstate),(register_value),(htif_cmd))register_ref ->(8)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec r.htif_cmd_htif_cmd_chunk_0 (( 63 : int):ii) (( 56 : int):ii) + ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_htif_cmd_device : htif_cmd -> mword ty8 -> htif_cmd*) + +val _ = Define ` + ((update_htif_cmd_device:htif_cmd ->(8)words$word -> htif_cmd) v x= + ((v with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 63 : int):ii) (( 56 : int):ii) + ((subrange_vec_dec x (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_htif_cmd_cmd : htif_cmd -> mword ty8*) + +val _ = Define ` + ((get_htif_cmd_cmd:htif_cmd ->(8)words$word) v= + ((subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 55 : int):ii) (( 48 : int):ii) : 8 words$word)))`; + + +(*val _set_htif_cmd_cmd : register_ref regstate register_value htif_cmd -> mword ty8 -> M unit*) + +val _ = Define ` + ((set_htif_cmd_cmd:((regstate),(register_value),(htif_cmd))register_ref ->(8)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec r.htif_cmd_htif_cmd_chunk_0 (( 55 : int):ii) (( 48 : int):ii) + ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_htif_cmd_cmd : htif_cmd -> mword ty8 -> htif_cmd*) + +val _ = Define ` + ((update_htif_cmd_cmd:htif_cmd ->(8)words$word -> htif_cmd) v x= + ((v with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 55 : int):ii) (( 48 : int):ii) + ((subrange_vec_dec x (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_htif_cmd_payload : htif_cmd -> mword ty48*) + +val _ = Define ` + ((get_htif_cmd_payload:htif_cmd ->(48)words$word) v= + ((subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 47 : int):ii) (( 0 : int):ii) : 48 words$word)))`; + + +(*val _set_htif_cmd_payload : register_ref regstate register_value htif_cmd -> mword ty48 -> M unit*) + +val _ = Define ` + ((set_htif_cmd_payload:((regstate),(register_value),(htif_cmd))register_ref ->(48)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec r.htif_cmd_htif_cmd_chunk_0 (( 47 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 47 : int):ii) (( 0 : int):ii) : 48 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_htif_cmd_payload : htif_cmd -> mword ty48 -> htif_cmd*) + +val _ = Define ` + ((update_htif_cmd_payload:htif_cmd ->(48)words$word -> htif_cmd) v x= + ((v with<| + htif_cmd_htif_cmd_chunk_0 := + ((update_subrange_vec_dec v.htif_cmd_htif_cmd_chunk_0 (( 47 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 47 : int):ii) (( 0 : int):ii) : 48 words$word)) + : 64 words$word))|>)))`; + + +(*val htif_load : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> M (MemoryOpResult (mword 'int8_times_n))*) + +val _ = Define ` + ((htif_load:(32)words$word -> int ->(regstate)sail2_state_monad$sequential_state ->(((('int8_times_n words$word)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width= (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "htif[" + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " ((string_of_bits w__0))))))))))) + else sail2_state_monad$returnS () ) + (if ((((((width = (( 8 : int):ii)))) /\ (((addr = ((plat_htif_tohost () : 32 words$word)))))))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M) (\ (w__1 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w ((zero_extend w__1 (( 64 : int):ii) : 64 words$word)) : 'int8_times_n words$word)))) + else if ((((((width = (( 4 : int):ii)))) /\ (((addr = ((plat_htif_tohost () : 32 words$word)))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M) (\ (w__2 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w + ((zero_extend ((subrange_vec_dec w__2 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + (( 32 : int):ii) + : 32 words$word)) + : 'int8_times_n words$word)))) + else if ((((((width = (( 4 : int):ii)))) /\ (((addr = ((add_vec_int ((plat_htif_tohost () : 32 words$word)) (( 4 : int):ii) : 32 words$word)))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M) (\ (w__3 : 64 words$word) . + sail2_state_monad$returnS (MemValue ((words$w2w + ((zero_extend ((subrange_vec_dec w__3 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word)) + (( 32 : int):ii) + : 32 words$word)) + : 'int8_times_n words$word)))) + else sail2_state_monad$returnS (MemException E_Load_Access_Fault))))`; + + +(*val htif_store : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> mword 'int8_times_n -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((htif_store:(32)words$word -> int -> 'int8_times_n words$word ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width data= + (let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "htif[" + ((STRCAT ((string_of_bits addr)) ((STRCAT "] <- " ((string_of_bits data)))))))) + else () ) in sail2_state_monad$bindS (sail2_state_monad$seqS + (if (((width = (( 8 : int):ii)))) then + let (data : 64 words$word) = ((words$w2w data : 64 words$word)) in + sail2_state_monad$write_regS htif_tohost_ref ((EXTZ (( 64 : int):ii) data : 64 words$word)) + else if ((((((width = (( 4 : int):ii)))) /\ (((addr = ((plat_htif_tohost () : 32 words$word)))))))) + then + let (data : 32 words$word) = ((words$w2w data : 32 words$word)) in sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . + sail2_state_monad$write_regS htif_tohost_ref ((update_subrange_vec_dec w__0 (( 31 : int):ii) (( 0 : int):ii) data : 64 words$word))) + else if ((((((width = (( 4 : int):ii)))) /\ (((addr = ((add_vec_int ((plat_htif_tohost () : 32 words$word)) (( 4 : int):ii) : 32 words$word)))))))) + then + let (data : 32 words$word) = ((words$w2w data : 32 words$word)) in sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M) (\ (w__1 : 64 words$word) . + sail2_state_monad$write_regS htif_tohost_ref ((update_subrange_vec_dec w__1 (( 63 : int):ii) (( 32 : int):ii) data : 64 words$word))) + else sail2_state_monad$write_regS htif_tohost_ref ((EXTZ (( 64 : int):ii) data : 64 words$word))) + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M)) (\ (w__2 : 64 words$word) . + let cmd = (Mk_htif_cmd w__2) in + let b__0 = ((get_htif_cmd_device cmd : 8 words$word)) in sail2_state_monad$seqS + (if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word)))) then + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "htif-syscall-proxy cmd: " + ((string_of_bits ((get_htif_cmd_payload cmd : 48 words$word)))))) + else () ) in + if (((((cast_unit_vec0 ((access_vec_dec ((get_htif_cmd_payload cmd : 48 words$word)) (( 0 : int):ii))) + : 1 words$word)) = (vec_of_bits [B1] : 1 words$word)))) then sail2_state_monad$seqS + (sail2_state_monad$write_regS htif_done_ref T) + (sail2_state_monad$write_regS + htif_exit_code_ref + ((shiftr ((zero_extend ((get_htif_cmd_payload cmd : 48 words$word)) (( 64 : int):ii) : 64 words$word)) + (( 1 : int):ii) + : 64 words$word))) + else sail2_state_monad$returnS () + else + sail2_state_monad$returnS (if (((b__0 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B1] : 8 words$word)))) then + let (_ : unit) = + (if ((get_config_print_platform () )) then + print_dbg + ((STRCAT "htif-term cmd: " + ((string_of_bits ((get_htif_cmd_payload cmd : 48 words$word)))))) + else () ) in + let b__2 = ((get_htif_cmd_cmd cmd : 8 words$word)) in + if (((b__2 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word)))) then () + else if (((b__2 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B1] : 8 words$word)))) then + plat_term_write + ((subrange_vec_dec ((get_htif_cmd_payload cmd : 48 words$word)) (( 7 : int):ii) (( 0 : int):ii) + : 8 words$word)) + else print_endline ((STRCAT "Unknown term cmd: " ((string_of_bits b__2)))) + else print_endline ((STRCAT "htif-???? cmd: " ((string_of_bits data)))))) + (sail2_state_monad$returnS (MemValue T)))))`; + + +(*val htif_tick : unit -> M unit*) + +val _ = Define ` + ((htif_tick:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$seqS + (if ((get_config_print_platform () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_tohost_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . + sail2_state_monad$returnS ((print_dbg ((STRCAT "htif::tick " ((string_of_bits w__0))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$write_regS htif_tohost_ref ((EXTZ (( 64 : int):ii) (vec_of_bits [B0] : 1 words$word) : 64 words$word)))))`; + + +(*val within_mmio_readable : mword ty32 -> integer -> bool*) + +val _ = Define ` + ((within_mmio_readable:(32)words$word -> int -> bool) (addr : xlenbits) (width : int)= + (((within_clint addr width)) \/ (((((within_htif_readable addr width)) /\ (((( 1 : int):ii) <= ((id width)))))))))`; + + +(*val within_mmio_writable : mword ty32 -> integer -> bool*) + +val _ = Define ` + ((within_mmio_writable:(32)words$word -> int -> bool) (addr : xlenbits) (width : int)= + (((within_clint addr width)) \/ (((((within_htif_writable addr width)) /\ ((((id width)) <= (( 8 : int):ii))))))))`; + + +(*val mmio_read : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> M (MemoryOpResult (mword 'int8_times_n))*) + +val _ = Define ` + ((mmio_read:(32)words$word -> int ->(regstate)sail2_state_monad$sequential_state ->(((('int8_times_n words$word)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (addr : xlenbits) (width : int)= + (if ((within_clint addr width)) then (clint_load addr width ) + else if (((((within_htif_readable addr width)) /\ (((( 1 : int):ii) <= ((id width))))))) then + (htif_load addr width ) + else sail2_state_monad$returnS (MemException E_Load_Access_Fault)))`; + + +(*val mmio_write : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> mword 'int8_times_n -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((mmio_write:(32)words$word -> int -> 'int8_times_n words$word ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (addr : xlenbits) (width : int) data= + (if ((within_clint addr width)) then clint_store addr width data + else if (((((within_htif_writable addr width)) /\ ((((id width)) <= (( 8 : int):ii)))))) then + htif_store addr width data + else sail2_state_monad$returnS (MemException E_SAMO_Access_Fault)))`; + + +(*val init_platform : unit -> M unit*) + +val _ = Define ` + ((init_platform:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS htif_tohost_ref ((EXTZ (( 64 : int):ii) (vec_of_bits [B0] : 1 words$word) : 64 words$word))) + (sail2_state_monad$write_regS htif_done_ref F)) + (sail2_state_monad$write_regS htif_exit_code_ref ((EXTZ (( 64 : int):ii) (vec_of_bits [B0] : 1 words$word) : 64 words$word)))))`; + + +(*val tick_platform : unit -> M unit*) + +val _ = Define ` + ((tick_platform:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (htif_tick () ))`; + + +(*val handle_illegal : unit -> M unit*) + +val _ = Define ` + ((handle_illegal:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (if ((plat_mtval_has_illegal_inst_bits () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS instbits_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . sail2_state_monad$returnS (SOME w__0)) + else sail2_state_monad$returnS NONE) (\ info . + let (t : sync_exception) = + (<| sync_exception_trap := E_Illegal_Instr; + sync_exception_excinfo := info; + sync_exception_ext := NONE |>) in sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__1 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__2 : 32 words$word) . sail2_state_monad$bindS + (exception_handler w__1 (CTL_TRAP t) w__2 : ( 32 words$word) M) (\ (w__3 : 32 words$word) . + set_next_pc w__3))))))`; + + +(*val platform_wfi : unit -> M unit*) + +val _ = Define ` + ((platform_wfi:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = + (let (_ : unit) = (cancel_reservation () ) in sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M) (\ (w__1 : 64 words$word) . + if ((zopz0zI_u w__0 w__1)) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M) (\ (w__2 : 64 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mtime_ref w__2) + (sail2_state_monad$read_regS mtimecmp_ref : ( 64 words$word) M)) (\ (w__3 : 64 words$word) . + sail2_state_monad$write_regS mcycle_ref w__3)) + else sail2_state_monad$returnS () ))))`; + + +(*val is_aligned_addr : mword ty32 -> integer -> bool*) + +val _ = Define ` + ((is_aligned_addr:(32)words$word -> int -> bool) (addr : xlenbits) (width : int)= + (((((lem$w2ui addr)) % width)) = (( 0 : int):ii)))`; + + +(*val phys_mem_read : forall 'int8_times_n. Size 'int8_times_n => AccessType -> mword ty32 -> integer -> bool -> bool -> bool -> M (MemoryOpResult (mword 'int8_times_n))*) + +val _ = Define ` + ((phys_mem_read:AccessType ->(32)words$word -> int -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->(((('int8_times_n words$word)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (t : AccessType) (addr : xlenbits) (width : int) (aq : bool) (rl : bool) (res : + bool)= (sail2_state_monad$bindS + (case (aq, rl, res) of + (F, F, F) => sail2_state_monad$bindS + (read_ram Read_plain addr width : ( 'int8_times_n words$word) M) (\ (w__0 : + 'int8_times_n words$word) . + sail2_state_monad$returnS (SOME w__0)) + | (T, F, F) => sail2_state_monad$bindS + (read_ram Read_RISCV_acquire addr width : ( 'int8_times_n words$word) M) (\ (w__1 : + 'int8_times_n words$word) . + sail2_state_monad$returnS (SOME w__1)) + | (T, T, F) => sail2_state_monad$bindS + (read_ram Read_RISCV_strong_acquire addr width : ( 'int8_times_n words$word) M) (\ (w__2 : + 'int8_times_n words$word) . + sail2_state_monad$returnS (SOME w__2)) + | (F, F, T) => sail2_state_monad$bindS + (read_ram Read_RISCV_reserved addr width : ( 'int8_times_n words$word) M) (\ (w__3 : + 'int8_times_n words$word) . + sail2_state_monad$returnS (SOME w__3)) + | (T, F, T) => sail2_state_monad$bindS + (read_ram Read_RISCV_reserved_acquire addr width : ( 'int8_times_n words$word) M) (\ (w__4 : + 'int8_times_n words$word) . + sail2_state_monad$returnS (SOME w__4)) + | (T, T, T) => sail2_state_monad$bindS + (read_ram Read_RISCV_reserved_strong_acquire addr width : ( 'int8_times_n words$word) M) (\ (w__5 : + 'int8_times_n words$word) . + sail2_state_monad$returnS (SOME w__5)) + | (F, T, F) => sail2_state_monad$returnS NONE + | (F, T, T) => sail2_state_monad$returnS NONE + ) (\ w__6 . + let result = w__6 in + sail2_state_monad$returnS ((case (t, result) of + (Execute, NONE) => MemException E_Fetch_Access_Fault + | (Read, NONE) => MemException E_Load_Access_Fault + | (_, NONE) => MemException E_SAMO_Access_Fault + | (_, SOME (v)) => + let (_ : unit) = + (if ((get_config_print_mem () )) then + print_dbg + ((STRCAT "mem[" + ((STRCAT ((accessType_to_str t)) + ((STRCAT "," + ((STRCAT ((string_of_bits addr)) + ((STRCAT "] -> " ((string_of_bits v)))))))))))) + else () ) in + MemValue v + )))))`; + + +(*val checked_mem_read : forall 'int8_times_n. Size 'int8_times_n => AccessType -> mword ty32 -> integer -> bool -> bool -> bool -> M (MemoryOpResult (mword 'int8_times_n))*) + +val _ = Define ` + ((checked_mem_read:AccessType ->(32)words$word -> int -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->(((('int8_times_n words$word)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (t : AccessType) (addr : xlenbits) (width : int) (aq : bool) (rl : bool) (res : + bool)= + (if ((within_mmio_readable addr width)) then (mmio_read addr width ) + else if ((within_phys_mem addr width)) then (phys_mem_read t addr width aq rl res ) + else sail2_state_monad$returnS (MemException E_Load_Access_Fault)))`; + + +(*val pmp_mem_read : forall 'int8_times_n. Size 'int8_times_n => AccessType -> mword ty32 -> integer -> bool -> bool -> bool -> M (MemoryOpResult (mword 'int8_times_n))*) + +val _ = Define ` + ((pmp_mem_read:AccessType ->(32)words$word -> int -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->(((('int8_times_n words$word)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (t : AccessType) (addr : xlenbits) (width : int) (aq : bool) (rl : bool) (res : + bool)= + (if ((~ ((plat_enable_pmp () )))) then (checked_mem_read t addr width aq rl res ) + else sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__1 : Mstatus) . sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__2 : Privilege) . sail2_state_monad$bindS + (effectivePrivilege w__1 w__2) (\ (w__3 : Privilege) . sail2_state_monad$bindS + (pmpCheck addr width t w__3) (\ (w__4 : ExceptionType option) . + (case w__4 of + NONE => (checked_mem_read t addr width aq rl res ) + | SOME (e) => sail2_state_monad$returnS (MemException e) + )))))))`; + + +(*val rvfi_read : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> MemoryOpResult (mword 'int8_times_n) -> unit*) + +val _ = Define ` + ((rvfi_read:(32)words$word -> int ->('int8_times_n words$word)MemoryOpResult -> unit) addr width value= () )`; + + +(*val mem_read : forall 'int8_times_n. Size 'int8_times_n => AccessType -> mword ty32 -> integer -> bool -> bool -> bool -> M (MemoryOpResult (mword 'int8_times_n))*) + +val _ = Define ` + ((mem_read:AccessType ->(32)words$word -> int -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->(((('int8_times_n words$word)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) typ addr width aq rl res= (sail2_state_monad$bindS + (if ((((((aq \/ res))) /\ ((~ ((is_aligned_addr addr width))))))) then + sail2_state_monad$returnS (MemException E_Load_Addr_Align) + else + (case (aq, rl, res) of + (F, T, F) => sail2_state_monad$throwS (Error_not_implemented "load.rl") + | (F, T, T) => sail2_state_monad$throwS (Error_not_implemented "lr.rl") + | (_, _, _) => (pmp_mem_read typ addr width aq rl res ) + )) (\ result . + let (_ : unit) = (rvfi_read addr width result) in + sail2_state_monad$returnS result)))`; + + +(*val mem_write_ea : mword ty32 -> integer -> bool -> bool -> bool -> M (MemoryOpResult unit)*) + +val _ = Define ` + ((mem_write_ea:(32)words$word -> int -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->((((unit)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width aq rl con= + (if ((((((rl \/ con))) /\ ((~ ((is_aligned_addr addr width))))))) then + sail2_state_monad$returnS (MemException E_SAMO_Addr_Align) + else + (case (aq, rl, con) of + (F, F, F) => sail2_state_monad$seqS (write_ram_ea Write_plain addr width) (sail2_state_monad$returnS (MemValue () )) + | (F, T, F) => sail2_state_monad$seqS (write_ram_ea Write_RISCV_release addr width) (sail2_state_monad$returnS (MemValue () )) + | (F, F, T) => sail2_state_monad$seqS + (write_ram_ea Write_RISCV_conditional addr width) (sail2_state_monad$returnS (MemValue () )) + | (F, T, T) => sail2_state_monad$seqS + (write_ram_ea Write_RISCV_conditional_release addr width) (sail2_state_monad$returnS (MemValue () )) + | (T, F, F) => sail2_state_monad$throwS (Error_not_implemented "store.aq") + | (T, T, F) => sail2_state_monad$seqS + (write_ram_ea Write_RISCV_strong_release addr width) (sail2_state_monad$returnS (MemValue () )) + | (T, F, T) => sail2_state_monad$throwS (Error_not_implemented "sc.aq") + | (T, T, T) => sail2_state_monad$seqS + (write_ram_ea Write_RISCV_conditional_strong_release addr width) (sail2_state_monad$returnS (MemValue () )) + )))`; + + +(*val rvfi_write : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> mword 'int8_times_n -> unit*) + +val _ = Define ` + ((rvfi_write:(32)words$word -> int -> 'int8_times_n words$word -> unit) addr width value= () )`; + + +(*val phys_mem_write : forall 'int8_times_n. Size 'int8_times_n => write_kind -> mword ty32 -> integer -> mword 'int8_times_n -> unit -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((phys_mem_write:write_kind ->(32)words$word -> int -> 'int8_times_n words$word -> unit ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (wk : write_kind) (addr : xlenbits) (width : int) data (meta : mem_meta)= + (let (_ : unit) = (rvfi_write addr width data) in sail2_state_monad$bindS + (write_ram wk addr width data meta) (\ (w__0 : bool) . + let result = (MemValue w__0) in + let (_ : unit) = + (if ((get_config_print_mem () )) then + print_dbg + ((STRCAT "mem[" + ((STRCAT ((string_of_bits addr)) ((STRCAT "] <- " ((string_of_bits data)))))))) + else () ) in + sail2_state_monad$returnS result)))`; + + +(*val checked_mem_write : forall 'int8_times_n. Size 'int8_times_n => write_kind -> mword ty32 -> integer -> mword 'int8_times_n -> unit -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((checked_mem_write:write_kind ->(32)words$word -> int -> 'int8_times_n words$word -> unit ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (wk : write_kind) (addr : xlenbits) (width : int) data (meta : mem_meta)= + (if ((within_mmio_writable addr width)) then mmio_write addr width data + else if ((within_phys_mem addr width)) then phys_mem_write wk addr width data meta + else sail2_state_monad$returnS (MemException E_SAMO_Access_Fault)))`; + + +(*val pmp_mem_write : forall 'int8_times_n. Size 'int8_times_n => write_kind -> mword ty32 -> integer -> mword 'int8_times_n -> unit -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((pmp_mem_write:write_kind ->(32)words$word -> int -> 'int8_times_n words$word -> unit ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (wk : write_kind) (addr : xlenbits) (width : int) data (meta : mem_meta)= + (if ((~ ((plat_enable_pmp () )))) then checked_mem_write wk addr width data meta + else sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__1 : Mstatus) . sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__2 : Privilege) . sail2_state_monad$bindS + (effectivePrivilege w__1 w__2) (\ (w__3 : Privilege) . sail2_state_monad$bindS + (pmpCheck addr width Write w__3) (\ (w__4 : ExceptionType option) . + (case w__4 of + NONE => checked_mem_write wk addr width data meta + | SOME (e) => sail2_state_monad$returnS (MemException e) + )))))))`; + + +(*val mem_write_value_meta : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> mword 'int8_times_n -> unit -> bool -> bool -> bool -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((mem_write_value_meta:(32)words$word -> int -> 'int8_times_n words$word -> unit -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width value meta aq rl con= + (let (_ : unit) = (rvfi_write addr width value) in + if ((((((rl \/ con))) /\ ((~ ((is_aligned_addr addr width))))))) then + sail2_state_monad$returnS (MemException E_SAMO_Addr_Align) + else + (case (aq, rl, con) of + (F, F, F) => pmp_mem_write Write_plain addr width value meta + | (F, T, F) => pmp_mem_write Write_RISCV_release addr width value meta + | (F, F, T) => pmp_mem_write Write_RISCV_conditional addr width value meta + | (F, T, T) => pmp_mem_write Write_RISCV_conditional_release addr width value meta + | (T, T, F) => pmp_mem_write Write_RISCV_strong_release addr width value meta + | (T, T, T) => + pmp_mem_write Write_RISCV_conditional_strong_release addr width value meta + | (T, F, F) => sail2_state_monad$throwS (Error_not_implemented "store.aq") + | (T, F, T) => sail2_state_monad$throwS (Error_not_implemented "sc.aq") + )))`; + + +(*val mem_write_value : forall 'int8_times_n. Size 'int8_times_n => mword ty32 -> integer -> mword 'int8_times_n -> bool -> bool -> bool -> M (MemoryOpResult bool)*) + +val _ = Define ` + ((mem_write_value:(32)words$word -> int -> 'int8_times_n words$word -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->((((bool)MemoryOpResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) addr width value aq rl con= + (mem_write_value_meta addr width value default_meta aq rl con))`; + + +val _ = Define ` + ((PAGESIZE_BITS:int)= ((( 12 : int):ii)))`; + + +(*val Mk_PTE_Bits : mword ty8 -> PTE_Bits*) + +val _ = Define ` + ((Mk_PTE_Bits:(8)words$word -> PTE_Bits) v= + (<| PTE_Bits_PTE_Bits_chunk_0 := ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) |>))`; + + +(*val _get_PTE_Bits_bits : PTE_Bits -> mword ty8*) + +val _ = Define ` + ((get_PTE_Bits_bits:PTE_Bits ->(8)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)))`; + + +(*val _set_PTE_Bits_bits : register_ref regstate register_value PTE_Bits -> mword ty8 -> M unit*) + +val _ = Define ` + ((set_PTE_Bits_bits:((regstate),(register_value),(PTE_Bits))register_ref ->(8)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_PTE_Bits_bits : PTE_Bits -> mword ty8 -> PTE_Bits*) + +val _ = Define ` + ((update_PTE_Bits_bits:PTE_Bits ->(8)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_D:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_D:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_D:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 7 : int):ii) (( 7 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_A:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_A:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_A:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 6 : int):ii) (( 6 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_G:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_G:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_G:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 5 : int):ii) (( 5 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_U:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_U:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_U:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 4 : int):ii) (( 4 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_X:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_X:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_X:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 3 : int):ii) (( 3 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_W:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_W:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_W:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 2 : int):ii) (( 2 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_R:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_R:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_R:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 1 : int):ii) (( 1 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +val _ = Define ` + ((get_PTE_Bits_V:PTE_Bits ->(1)words$word) v= ((subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)))`; + + +val _ = Define ` + ((set_PTE_Bits_V:((regstate),(register_value),(PTE_Bits))register_ref ->(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec r.PTE_Bits_PTE_Bits_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_PTE_Bits_V:PTE_Bits ->(1)words$word -> PTE_Bits) v x= + ((v with<| + PTE_Bits_PTE_Bits_chunk_0 := + ((update_subrange_vec_dec v.PTE_Bits_PTE_Bits_chunk_0 (( 0 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) + : 8 words$word))|>)))`; + + +(*val isPTEPtr : mword ty8 -> bool*) + +val _ = Define ` + ((isPTEPtr:(8)words$word -> bool) p= + (let a = (Mk_PTE_Bits p) in + ((((((get_PTE_Bits_R a : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) /\ ((((((((get_PTE_Bits_W a : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) /\ (((((get_PTE_Bits_X a : 1 words$word)) = ((bool_to_bits F : 1 words$word)))))))))))`; + + +(*val isInvalidPTE : mword ty8 -> bool*) + +val _ = Define ` + ((isInvalidPTE:(8)words$word -> bool) p= + (let a = (Mk_PTE_Bits p) in + ((((((get_PTE_Bits_V a : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) \/ ((((((((get_PTE_Bits_W a : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ (((((get_PTE_Bits_R a : 1 words$word)) = ((bool_to_bits F : 1 words$word)))))))))))`; + + +(*val checkPTEPermission : AccessType -> Privilege -> bool -> bool -> PTE_Bits -> M bool*) + +val _ = Define ` + ((checkPTEPermission:AccessType -> Privilege -> bool -> bool -> PTE_Bits ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (ac : AccessType) (priv : Privilege) (mxr : bool) (do_sum : bool) (p : + PTE_Bits)= + ((case (ac, priv) of + (Read, User) => + sail2_state_monad$returnS ((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ ((((((((get_PTE_Bits_R p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) \/ ((((((((get_PTE_Bits_X p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ mxr))))))))) + | (Write, User) => + sail2_state_monad$returnS ((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ (((((get_PTE_Bits_W p : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) + | (ReadWrite, User) => + sail2_state_monad$returnS ((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ ((((((((get_PTE_Bits_W p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ ((((((((get_PTE_Bits_R p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) \/ ((((((((get_PTE_Bits_X p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ mxr)))))))))))) + | (Execute, User) => + sail2_state_monad$returnS ((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ (((((get_PTE_Bits_X p : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) + | (Read, Supervisor) => + sail2_state_monad$returnS (((((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) \/ do_sum))) /\ ((((((((get_PTE_Bits_R p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) \/ ((((((((get_PTE_Bits_X p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ mxr))))))))) + | (Write, Supervisor) => + sail2_state_monad$returnS (((((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) \/ do_sum))) /\ (((((get_PTE_Bits_W p : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) + | (ReadWrite, Supervisor) => + sail2_state_monad$returnS (((((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) \/ do_sum))) /\ ((((((((get_PTE_Bits_W p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ ((((((((get_PTE_Bits_R p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) \/ ((((((((get_PTE_Bits_X p : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) /\ mxr)))))))))))) + | (Execute, Supervisor) => + sail2_state_monad$returnS ((((((((get_PTE_Bits_U p : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) /\ (((((get_PTE_Bits_X p : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) + | (_, Machine) => internal_error "m-mode mem perm check" + )))`; + + +(*val update_PTE_Bits : PTE_Bits -> AccessType -> maybe PTE_Bits*) + +val _ = Define ` + ((update_PTE_Bits:PTE_Bits -> AccessType ->(PTE_Bits)option) (p : PTE_Bits) (a : AccessType)= + (let update_d = + (((((((a = Write))) \/ (((a = ReadWrite)))))) /\ (((((get_PTE_Bits_D p : 1 words$word)) = ((bool_to_bits F : 1 words$word)))))) in + let update_a = (((get_PTE_Bits_A p : 1 words$word)) = ((bool_to_bits F : 1 words$word))) in + if (((update_d \/ update_a))) then + let np = (update_PTE_Bits_A p ((bool_to_bits T : 1 words$word))) in + let np = (if update_d then update_PTE_Bits_D np ((bool_to_bits T : 1 words$word)) else np) in + SOME np + else NONE))`; + + +(*val PTW_Error_of_num : integer -> PTW_Error*) + +val _ = Define ` + ((PTW_Error_of_num:int -> PTW_Error) arg_= + (let p0_ = arg_ in + if (((p0_ = (( 0 : int):ii)))) then PTW_Access + else if (((p0_ = (( 1 : int):ii)))) then PTW_Invalid_PTE + else if (((p0_ = (( 2 : int):ii)))) then PTW_No_Permission + else if (((p0_ = (( 3 : int):ii)))) then PTW_Misaligned + else PTW_PTE_Update))`; + + +(*val num_of_PTW_Error : PTW_Error -> integer*) + +val _ = Define ` + ((num_of_PTW_Error:PTW_Error -> int) arg_= + ((case arg_ of + PTW_Access => (( 0 : int):ii) + | PTW_Invalid_PTE => (( 1 : int):ii) + | PTW_No_Permission => (( 2 : int):ii) + | PTW_Misaligned => (( 3 : int):ii) + | PTW_PTE_Update => (( 4 : int):ii) + )))`; + + +(*val ptw_error_to_str : PTW_Error -> string*) + +val _ = Define ` + ((ptw_error_to_str:PTW_Error -> string) e= + ((case e of + PTW_Access => "mem-access-error" + | PTW_Invalid_PTE => "invalid-pte" + | PTW_No_Permission => "no-permission" + | PTW_Misaligned => "misaligned-superpage" + | PTW_PTE_Update => "pte-update-needed" + )))`; + + +(*val translationException : AccessType -> PTW_Error -> ExceptionType*) + +val _ = Define ` + ((translationException:AccessType -> PTW_Error -> ExceptionType) (a : AccessType) (f : PTW_Error)= + ((case (a, f) of + (ReadWrite, PTW_Access) => E_SAMO_Access_Fault + | (ReadWrite, _) => E_SAMO_Page_Fault + | (Read, PTW_Access) => E_Load_Access_Fault + | (Read, _) => E_Load_Page_Fault + | (Write, PTW_Access) => E_SAMO_Access_Fault + | (Write, _) => E_SAMO_Page_Fault + | (Fetch, PTW_Access) => E_Fetch_Access_Fault + | (Fetch, _) => E_Fetch_Page_Fault + )))`; + + +(*val curAsid32 : mword ty32 -> mword ty9*) + +val _ = Define ` + ((curAsid32:(32)words$word ->(9)words$word) satp1= + (let s = (Mk_Satp32 satp1) in + (get_Satp32_Asid s : 9 words$word)))`; + + +(*val curPTB32 : mword ty32 -> mword ty34*) + +val _ = Define ` + ((curPTB32:(32)words$word ->(34)words$word) satp1= + (let (s : Satp32) = (Mk_Satp32 satp1) in + (shiftl ((EXTZ (( 34 : int):ii) ((get_Satp32_PPN s : 22 words$word)) : 34 words$word)) PAGESIZE_BITS + : 34 words$word)))`; + + +val _ = Define ` + ((SV32_LEVEL_BITS:int)= ((( 10 : int):ii)))`; + + +val _ = Define ` + ((SV32_LEVELS:int)= ((( 2 : int):ii)))`; + + +val _ = Define ` + ((PTE32_LOG_SIZE:int)= ((( 2 : int):ii)))`; + + +val _ = Define ` + ((PTE32_SIZE:int)= ((( 4 : int):ii)))`; + + +(*val Mk_SV32_Vaddr : mword ty32 -> SV32_Vaddr*) + +val _ = Define ` + ((Mk_SV32_Vaddr:(32)words$word -> SV32_Vaddr) v= + (<| SV32_Vaddr_SV32_Vaddr_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_SV32_Vaddr_bits : SV32_Vaddr -> mword ty32*) + +val _ = Define ` + ((get_SV32_Vaddr_bits:SV32_Vaddr ->(32)words$word) v= + ((subrange_vec_dec v.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_SV32_Vaddr_bits : register_ref regstate register_value SV32_Vaddr -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_SV32_Vaddr_bits:((regstate),(register_value),(SV32_Vaddr))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_Vaddr_SV32_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_Vaddr_bits : SV32_Vaddr -> mword ty32 -> SV32_Vaddr*) + +val _ = Define ` + ((update_SV32_Vaddr_bits:SV32_Vaddr ->(32)words$word -> SV32_Vaddr) v x= + ((v with<| + SV32_Vaddr_SV32_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_SV32_Vaddr_VPNi : SV32_Vaddr -> mword ty20*) + +val _ = Define ` + ((get_SV32_Vaddr_VPNi:SV32_Vaddr ->(20)words$word) v= + ((subrange_vec_dec v.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 31 : int):ii) (( 12 : int):ii) : 20 words$word)))`; + + +(*val _set_SV32_Vaddr_VPNi : register_ref regstate register_value SV32_Vaddr -> mword ty20 -> M unit*) + +val _ = Define ` + ((set_SV32_Vaddr_VPNi:((regstate),(register_value),(SV32_Vaddr))register_ref ->(20)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_Vaddr_SV32_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 31 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 19 : int):ii) (( 0 : int):ii) : 20 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_Vaddr_VPNi : SV32_Vaddr -> mword ty20 -> SV32_Vaddr*) + +val _ = Define ` + ((update_SV32_Vaddr_VPNi:SV32_Vaddr ->(20)words$word -> SV32_Vaddr) v x= + ((v with<| + SV32_Vaddr_SV32_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 31 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 19 : int):ii) (( 0 : int):ii) : 20 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_SV48_Vaddr_VPNi : SV48_Vaddr -> mword ty27 -> SV48_Vaddr*) + +(*val _get_SV48_Vaddr_VPNi : SV48_Vaddr -> mword ty27*) + +(*val _set_SV48_Vaddr_VPNi : register_ref regstate register_value SV48_Vaddr -> mword ty27 -> M unit*) + +(*val _get_SV32_Vaddr_PgOfs : SV32_Vaddr -> mword ty12*) + +val _ = Define ` + ((get_SV32_Vaddr_PgOfs:SV32_Vaddr ->(12)words$word) v= + ((subrange_vec_dec v.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)))`; + + +(*val _set_SV32_Vaddr_PgOfs : register_ref regstate register_value SV32_Vaddr -> mword ty12 -> M unit*) + +val _ = Define ` + ((set_SV32_Vaddr_PgOfs:((regstate),(register_value),(SV32_Vaddr))register_ref ->(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_Vaddr_SV32_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_Vaddr_PgOfs : SV32_Vaddr -> mword ty12 -> SV32_Vaddr*) + +val _ = Define ` + ((update_SV32_Vaddr_PgOfs:SV32_Vaddr ->(12)words$word -> SV32_Vaddr) v x= + ((v with<| + SV32_Vaddr_SV32_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV32_Vaddr_SV32_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_SV48_Paddr_PgOfs : SV48_Paddr -> mword ty12 -> SV48_Paddr*) + +(*val _get_SV48_Paddr_PgOfs : SV48_Paddr -> mword ty12*) + +(*val _set_SV48_Paddr_PgOfs : register_ref regstate register_value SV48_Paddr -> mword ty12 -> M unit*) + +(*val Mk_SV32_Paddr : mword ty34 -> SV32_Paddr*) + +val _ = Define ` + ((Mk_SV32_Paddr:(34)words$word -> SV32_Paddr) v= + (<| SV32_Paddr_SV32_Paddr_chunk_0 := ((subrange_vec_dec v (( 33 : int):ii) (( 0 : int):ii) : 34 words$word)) |>))`; + + +(*val _get_SV32_Paddr_bits : SV32_Paddr -> mword ty34*) + +val _ = Define ` + ((get_SV32_Paddr_bits:SV32_Paddr ->(34)words$word) v= + ((subrange_vec_dec v.SV32_Paddr_SV32_Paddr_chunk_0 (( 33 : int):ii) (( 0 : int):ii) : 34 words$word)))`; + + +(*val _set_SV32_Paddr_bits : register_ref regstate register_value SV32_Paddr -> mword ty34 -> M unit*) + +val _ = Define ` + ((set_SV32_Paddr_bits:((regstate),(register_value),(SV32_Paddr))register_ref ->(34)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_Paddr_SV32_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV32_Paddr_SV32_Paddr_chunk_0 (( 33 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 33 : int):ii) (( 0 : int):ii) : 34 words$word)) + : 34 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_Paddr_bits : SV32_Paddr -> mword ty34 -> SV32_Paddr*) + +val _ = Define ` + ((update_SV32_Paddr_bits:SV32_Paddr ->(34)words$word -> SV32_Paddr) v x= + ((v with<| + SV32_Paddr_SV32_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV32_Paddr_SV32_Paddr_chunk_0 (( 33 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 33 : int):ii) (( 0 : int):ii) : 34 words$word)) + : 34 words$word))|>)))`; + + +(*val _get_SV32_Paddr_PPNi : SV32_Paddr -> mword ty22*) + +val _ = Define ` + ((get_SV32_Paddr_PPNi:SV32_Paddr ->(22)words$word) v= + ((subrange_vec_dec v.SV32_Paddr_SV32_Paddr_chunk_0 (( 33 : int):ii) (( 12 : int):ii) : 22 words$word)))`; + + +(*val _set_SV32_Paddr_PPNi : register_ref regstate register_value SV32_Paddr -> mword ty22 -> M unit*) + +val _ = Define ` + ((set_SV32_Paddr_PPNi:((regstate),(register_value),(SV32_Paddr))register_ref ->(22)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_Paddr_SV32_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV32_Paddr_SV32_Paddr_chunk_0 (( 33 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 21 : int):ii) (( 0 : int):ii) : 22 words$word)) + : 34 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_Paddr_PPNi : SV32_Paddr -> mword ty22 -> SV32_Paddr*) + +val _ = Define ` + ((update_SV32_Paddr_PPNi:SV32_Paddr ->(22)words$word -> SV32_Paddr) v x= + ((v with<| + SV32_Paddr_SV32_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV32_Paddr_SV32_Paddr_chunk_0 (( 33 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 21 : int):ii) (( 0 : int):ii) : 22 words$word)) + : 34 words$word))|>)))`; + + +(*val _update_SV48_PTE_PPNi : SV48_PTE -> mword ty44 -> SV48_PTE*) + +(*val _get_SV48_PTE_PPNi : SV48_PTE -> mword ty44*) + +(*val _set_SV48_PTE_PPNi : register_ref regstate register_value SV48_PTE -> mword ty44 -> M unit*) + +(*val _get_SV32_Paddr_PgOfs : SV32_Paddr -> mword ty12*) + +val _ = Define ` + ((get_SV32_Paddr_PgOfs:SV32_Paddr ->(12)words$word) v= + ((subrange_vec_dec v.SV32_Paddr_SV32_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)))`; + + +(*val _set_SV32_Paddr_PgOfs : register_ref regstate register_value SV32_Paddr -> mword ty12 -> M unit*) + +val _ = Define ` + ((set_SV32_Paddr_PgOfs:((regstate),(register_value),(SV32_Paddr))register_ref ->(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_Paddr_SV32_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV32_Paddr_SV32_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 34 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_Paddr_PgOfs : SV32_Paddr -> mword ty12 -> SV32_Paddr*) + +val _ = Define ` + ((update_SV32_Paddr_PgOfs:SV32_Paddr ->(12)words$word -> SV32_Paddr) v x= + ((v with<| + SV32_Paddr_SV32_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV32_Paddr_SV32_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 34 words$word))|>)))`; + + +(*val Mk_SV32_PTE : mword ty32 -> SV32_PTE*) + +val _ = Define ` + ((Mk_SV32_PTE:(32)words$word -> SV32_PTE) v= + (<| SV32_PTE_SV32_PTE_chunk_0 := ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) |>))`; + + +(*val _get_SV32_PTE_bits : SV32_PTE -> mword ty32*) + +val _ = Define ` + ((get_SV32_PTE_bits:SV32_PTE ->(32)words$word) v= + ((subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val _set_SV32_PTE_bits : register_ref regstate register_value SV32_PTE -> mword ty32 -> M unit*) + +val _ = Define ` + ((set_SV32_PTE_bits:((regstate),(register_value),(SV32_PTE))register_ref ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV32_PTE_SV32_PTE_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_PTE_bits : SV32_PTE -> mword ty32 -> SV32_PTE*) + +val _ = Define ` + ((update_SV32_PTE_bits:SV32_PTE ->(32)words$word -> SV32_PTE) v x= + ((v with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 31 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_SV32_PTE_PPNi : SV32_PTE -> mword ty22*) + +val _ = Define ` + ((get_SV32_PTE_PPNi:SV32_PTE ->(22)words$word) v= + ((subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 31 : int):ii) (( 10 : int):ii) : 22 words$word)))`; + + +(*val _set_SV32_PTE_PPNi : register_ref regstate register_value SV32_PTE -> mword ty22 -> M unit*) + +val _ = Define ` + ((set_SV32_PTE_PPNi:((regstate),(register_value),(SV32_PTE))register_ref ->(22)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV32_PTE_SV32_PTE_chunk_0 (( 31 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec v (( 21 : int):ii) (( 0 : int):ii) : 22 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_PTE_PPNi : SV32_PTE -> mword ty22 -> SV32_PTE*) + +val _ = Define ` + ((update_SV32_PTE_PPNi:SV32_PTE ->(22)words$word -> SV32_PTE) v x= + ((v with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 31 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec x (( 21 : int):ii) (( 0 : int):ii) : 22 words$word)) + : 32 words$word))|>)))`; + + +(*val _get_SV32_PTE_RSW : SV32_PTE -> mword ty2*) + +val _ = Define ` + ((get_SV32_PTE_RSW:SV32_PTE ->(2)words$word) v= ((subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) : 2 words$word)))`; + + +(*val _set_SV32_PTE_RSW : register_ref regstate register_value SV32_PTE -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_SV32_PTE_RSW:((regstate),(register_value),(SV32_PTE))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV32_PTE_SV32_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_PTE_RSW : SV32_PTE -> mword ty2 -> SV32_PTE*) + +val _ = Define ` + ((update_SV32_PTE_RSW:SV32_PTE ->(2)words$word -> SV32_PTE) v x= + ((v with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_SV48_PTE_RSW : SV48_PTE -> mword ty2 -> SV48_PTE*) + +(*val _get_SV48_PTE_RSW : SV48_PTE -> mword ty2*) + +(*val _set_SV48_PTE_RSW : register_ref regstate register_value SV48_PTE -> mword ty2 -> M unit*) + +(*val _get_SV32_PTE_BITS : SV32_PTE -> mword ty8*) + +val _ = Define ` + ((get_SV32_PTE_BITS:SV32_PTE ->(8)words$word) v= ((subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)))`; + + +(*val _set_SV32_PTE_BITS : register_ref regstate register_value SV32_PTE -> mword ty8 -> M unit*) + +val _ = Define ` + ((set_SV32_PTE_BITS:((regstate),(register_value),(SV32_PTE))register_ref ->(8)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV32_PTE_SV32_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 32 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV32_PTE_BITS : SV32_PTE -> mword ty8 -> SV32_PTE*) + +val _ = Define ` + ((update_SV32_PTE_BITS:SV32_PTE ->(8)words$word -> SV32_PTE) v x= + ((v with<| + SV32_PTE_SV32_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV32_PTE_SV32_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 32 words$word))|>)))`; + + +(*val _update_SV48_PTE_BITS : SV48_PTE -> mword ty8 -> SV48_PTE*) + +(*val _get_SV48_PTE_BITS : SV48_PTE -> mword ty8*) + +(*val _set_SV48_PTE_BITS : register_ref regstate register_value SV48_PTE -> mword ty8 -> M unit*) + +(*val curAsid64 : mword ty64 -> mword ty16*) + +val _ = Define ` + ((curAsid64:(64)words$word ->(16)words$word) satp1= + (let s = (Mk_Satp64 satp1) in + (get_Satp64_Asid s : 16 words$word)))`; + + +(*val curPTB64 : mword ty64 -> mword ty56*) + +val _ = Define ` + ((curPTB64:(64)words$word ->(56)words$word) satp1= + (let s = (Mk_Satp64 satp1) in + (shiftl ((EXTZ (( 56 : int):ii) ((get_Satp64_PPN s : 44 words$word)) : 56 words$word)) PAGESIZE_BITS + : 56 words$word)))`; + + +val _ = Define ` + ((SV39_LEVEL_BITS:int)= ((( 9 : int):ii)))`; + + +val _ = Define ` + ((SV39_LEVELS:int)= ((( 3 : int):ii)))`; + + +val _ = Define ` + ((PTE39_LOG_SIZE:int)= ((( 3 : int):ii)))`; + + +val _ = Define ` + ((PTE39_SIZE:int)= ((( 8 : int):ii)))`; + + +(*val Mk_SV39_Vaddr : mword ty39 -> SV39_Vaddr*) + +val _ = Define ` + ((Mk_SV39_Vaddr:(39)words$word -> SV39_Vaddr) v= + (<| SV39_Vaddr_SV39_Vaddr_chunk_0 := ((subrange_vec_dec v (( 38 : int):ii) (( 0 : int):ii) : 39 words$word)) |>))`; + + +(*val _get_SV39_Vaddr_bits : SV39_Vaddr -> mword ty39*) + +val _ = Define ` + ((get_SV39_Vaddr_bits:SV39_Vaddr ->(39)words$word) v= + ((subrange_vec_dec v.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 38 : int):ii) (( 0 : int):ii) : 39 words$word)))`; + + +(*val _set_SV39_Vaddr_bits : register_ref regstate register_value SV39_Vaddr -> mword ty39 -> M unit*) + +val _ = Define ` + ((set_SV39_Vaddr_bits:((regstate),(register_value),(SV39_Vaddr))register_ref ->(39)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_Vaddr_SV39_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 38 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 38 : int):ii) (( 0 : int):ii) : 39 words$word)) + : 39 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_Vaddr_bits : SV39_Vaddr -> mword ty39 -> SV39_Vaddr*) + +val _ = Define ` + ((update_SV39_Vaddr_bits:SV39_Vaddr ->(39)words$word -> SV39_Vaddr) v x= + ((v with<| + SV39_Vaddr_SV39_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 38 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 38 : int):ii) (( 0 : int):ii) : 39 words$word)) + : 39 words$word))|>)))`; + + +(*val _get_SV39_Vaddr_VPNi : SV39_Vaddr -> mword ty27*) + +val _ = Define ` + ((get_SV39_Vaddr_VPNi:SV39_Vaddr ->(27)words$word) v= + ((subrange_vec_dec v.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 38 : int):ii) (( 12 : int):ii) : 27 words$word)))`; + + +(*val _set_SV39_Vaddr_VPNi : register_ref regstate register_value SV39_Vaddr -> mword ty27 -> M unit*) + +val _ = Define ` + ((set_SV39_Vaddr_VPNi:((regstate),(register_value),(SV39_Vaddr))register_ref ->(27)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_Vaddr_SV39_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 38 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 26 : int):ii) (( 0 : int):ii) : 27 words$word)) + : 39 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_Vaddr_VPNi : SV39_Vaddr -> mword ty27 -> SV39_Vaddr*) + +val _ = Define ` + ((update_SV39_Vaddr_VPNi:SV39_Vaddr ->(27)words$word -> SV39_Vaddr) v x= + ((v with<| + SV39_Vaddr_SV39_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 38 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 26 : int):ii) (( 0 : int):ii) : 27 words$word)) + : 39 words$word))|>)))`; + + +(*val _get_SV39_Vaddr_PgOfs : SV39_Vaddr -> mword ty12*) + +val _ = Define ` + ((get_SV39_Vaddr_PgOfs:SV39_Vaddr ->(12)words$word) v= + ((subrange_vec_dec v.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)))`; + + +(*val _set_SV39_Vaddr_PgOfs : register_ref regstate register_value SV39_Vaddr -> mword ty12 -> M unit*) + +val _ = Define ` + ((set_SV39_Vaddr_PgOfs:((regstate),(register_value),(SV39_Vaddr))register_ref ->(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_Vaddr_SV39_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 39 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_Vaddr_PgOfs : SV39_Vaddr -> mword ty12 -> SV39_Vaddr*) + +val _ = Define ` + ((update_SV39_Vaddr_PgOfs:SV39_Vaddr ->(12)words$word -> SV39_Vaddr) v x= + ((v with<| + SV39_Vaddr_SV39_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV39_Vaddr_SV39_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 39 words$word))|>)))`; + + +(*val Mk_SV39_Paddr : mword ty56 -> SV39_Paddr*) + +val _ = Define ` + ((Mk_SV39_Paddr:(56)words$word -> SV39_Paddr) v= + (<| SV39_Paddr_SV39_Paddr_chunk_0 := ((subrange_vec_dec v (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)) |>))`; + + +(*val _get_SV39_Paddr_bits : SV39_Paddr -> mword ty56*) + +val _ = Define ` + ((get_SV39_Paddr_bits:SV39_Paddr ->(56)words$word) v= + ((subrange_vec_dec v.SV39_Paddr_SV39_Paddr_chunk_0 (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)))`; + + +(*val _set_SV39_Paddr_bits : register_ref regstate register_value SV39_Paddr -> mword ty56 -> M unit*) + +val _ = Define ` + ((set_SV39_Paddr_bits:((regstate),(register_value),(SV39_Paddr))register_ref ->(56)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_Paddr_SV39_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV39_Paddr_SV39_Paddr_chunk_0 (( 55 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)) + : 56 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_Paddr_bits : SV39_Paddr -> mword ty56 -> SV39_Paddr*) + +val _ = Define ` + ((update_SV39_Paddr_bits:SV39_Paddr ->(56)words$word -> SV39_Paddr) v x= + ((v with<| + SV39_Paddr_SV39_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV39_Paddr_SV39_Paddr_chunk_0 (( 55 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)) + : 56 words$word))|>)))`; + + +(*val _get_SV39_Paddr_PPNi : SV39_Paddr -> mword ty44*) + +val _ = Define ` + ((get_SV39_Paddr_PPNi:SV39_Paddr ->(44)words$word) v= + ((subrange_vec_dec v.SV39_Paddr_SV39_Paddr_chunk_0 (( 55 : int):ii) (( 12 : int):ii) : 44 words$word)))`; + + +(*val _set_SV39_Paddr_PPNi : register_ref regstate register_value SV39_Paddr -> mword ty44 -> M unit*) + +val _ = Define ` + ((set_SV39_Paddr_PPNi:((regstate),(register_value),(SV39_Paddr))register_ref ->(44)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_Paddr_SV39_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV39_Paddr_SV39_Paddr_chunk_0 (( 55 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 56 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_Paddr_PPNi : SV39_Paddr -> mword ty44 -> SV39_Paddr*) + +val _ = Define ` + ((update_SV39_Paddr_PPNi:SV39_Paddr ->(44)words$word -> SV39_Paddr) v x= + ((v with<| + SV39_Paddr_SV39_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV39_Paddr_SV39_Paddr_chunk_0 (( 55 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 56 words$word))|>)))`; + + +(*val _get_SV39_Paddr_PgOfs : SV39_Paddr -> mword ty12*) + +val _ = Define ` + ((get_SV39_Paddr_PgOfs:SV39_Paddr ->(12)words$word) v= + ((subrange_vec_dec v.SV39_Paddr_SV39_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)))`; + + +(*val _set_SV39_Paddr_PgOfs : register_ref regstate register_value SV39_Paddr -> mword ty12 -> M unit*) + +val _ = Define ` + ((set_SV39_Paddr_PgOfs:((regstate),(register_value),(SV39_Paddr))register_ref ->(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_Paddr_SV39_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV39_Paddr_SV39_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 56 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_Paddr_PgOfs : SV39_Paddr -> mword ty12 -> SV39_Paddr*) + +val _ = Define ` + ((update_SV39_Paddr_PgOfs:SV39_Paddr ->(12)words$word -> SV39_Paddr) v x= + ((v with<| + SV39_Paddr_SV39_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV39_Paddr_SV39_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 56 words$word))|>)))`; + + +(*val Mk_SV39_PTE : mword ty64 -> SV39_PTE*) + +val _ = Define ` + ((Mk_SV39_PTE:(64)words$word -> SV39_PTE) v= + (<| SV39_PTE_SV39_PTE_chunk_0 := ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) |>))`; + + +(*val _get_SV39_PTE_bits : SV39_PTE -> mword ty64*) + +val _ = Define ` + ((get_SV39_PTE_bits:SV39_PTE ->(64)words$word) v= + ((subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)))`; + + +(*val _set_SV39_PTE_bits : register_ref regstate register_value SV39_PTE -> mword ty64 -> M unit*) + +val _ = Define ` + ((set_SV39_PTE_bits:((regstate),(register_value),(SV39_PTE))register_ref ->(64)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV39_PTE_SV39_PTE_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_PTE_bits : SV39_PTE -> mword ty64 -> SV39_PTE*) + +val _ = Define ` + ((update_SV39_PTE_bits:SV39_PTE ->(64)words$word -> SV39_PTE) v x= + ((v with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_SV39_PTE_PPNi : SV39_PTE -> mword ty44*) + +val _ = Define ` + ((get_SV39_PTE_PPNi:SV39_PTE ->(44)words$word) v= + ((subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 53 : int):ii) (( 10 : int):ii) : 44 words$word)))`; + + +(*val _set_SV39_PTE_PPNi : register_ref regstate register_value SV39_PTE -> mword ty44 -> M unit*) + +val _ = Define ` + ((set_SV39_PTE_PPNi:((regstate),(register_value),(SV39_PTE))register_ref ->(44)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV39_PTE_SV39_PTE_chunk_0 (( 53 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec v (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_PTE_PPNi : SV39_PTE -> mword ty44 -> SV39_PTE*) + +val _ = Define ` + ((update_SV39_PTE_PPNi:SV39_PTE ->(44)words$word -> SV39_PTE) v x= + ((v with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 53 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec x (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_SV39_PTE_RSW : SV39_PTE -> mword ty2*) + +val _ = Define ` + ((get_SV39_PTE_RSW:SV39_PTE ->(2)words$word) v= ((subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) : 2 words$word)))`; + + +(*val _set_SV39_PTE_RSW : register_ref regstate register_value SV39_PTE -> mword ty2 -> M unit*) + +val _ = Define ` + ((set_SV39_PTE_RSW:((regstate),(register_value),(SV39_PTE))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV39_PTE_SV39_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_PTE_RSW : SV39_PTE -> mword ty2 -> SV39_PTE*) + +val _ = Define ` + ((update_SV39_PTE_RSW:SV39_PTE ->(2)words$word -> SV39_PTE) v x= + ((v with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 64 words$word))|>)))`; + + +(*val _get_SV39_PTE_BITS : SV39_PTE -> mword ty8*) + +val _ = Define ` + ((get_SV39_PTE_BITS:SV39_PTE ->(8)words$word) v= ((subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)))`; + + +(*val _set_SV39_PTE_BITS : register_ref regstate register_value SV39_PTE -> mword ty8 -> M unit*) + +val _ = Define ` + ((set_SV39_PTE_BITS:((regstate),(register_value),(SV39_PTE))register_ref ->(8)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV39_PTE_SV39_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV39_PTE_BITS : SV39_PTE -> mword ty8 -> SV39_PTE*) + +val _ = Define ` + ((update_SV39_PTE_BITS:SV39_PTE ->(8)words$word -> SV39_PTE) v x= + ((v with<| + SV39_PTE_SV39_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV39_PTE_SV39_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)))`; + + +val _ = Define ` + ((SV48_LEVEL_BITS:int)= ((( 9 : int):ii)))`; + + +val _ = Define ` + ((SV48_LEVELS:int)= ((( 4 : int):ii)))`; + + +val _ = Define ` + ((PTE48_LOG_SIZE:int)= ((( 3 : int):ii)))`; + + +val _ = Define ` + ((PTE48_SIZE:int)= ((( 8 : int):ii)))`; + + +(*val Mk_SV48_Vaddr : mword ty48 -> SV48_Vaddr*) + +val _ = Define ` + ((Mk_SV48_Vaddr:(48)words$word -> SV48_Vaddr) v= + (<| SV48_Vaddr_SV48_Vaddr_chunk_0 := ((subrange_vec_dec v (( 47 : int):ii) (( 0 : int):ii) : 48 words$word)) |>))`; + + +(*val _get_SV48_Vaddr_bits : SV48_Vaddr -> mword ty48*) + +val _ = Define ` + ((get_SV48_Vaddr_bits:SV48_Vaddr ->(48)words$word) v= + ((subrange_vec_dec v.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 47 : int):ii) (( 0 : int):ii) : 48 words$word)))`; + + +(*val _set_SV48_Vaddr_bits : register_ref regstate register_value SV48_Vaddr -> mword ty48 -> M unit*) + +val _ = Define ` + ((set_SV48_Vaddr_bits:((regstate),(register_value),(SV48_Vaddr))register_ref ->(48)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_Vaddr_SV48_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 47 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 47 : int):ii) (( 0 : int):ii) : 48 words$word)) + : 48 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV48_Vaddr_bits : SV48_Vaddr -> mword ty48 -> SV48_Vaddr*) + +val _ = Define ` + ((update_SV48_Vaddr_bits:SV48_Vaddr ->(48)words$word -> SV48_Vaddr) v x= + ((v with<| + SV48_Vaddr_SV48_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 47 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 47 : int):ii) (( 0 : int):ii) : 48 words$word)) + : 48 words$word))|>)))`; + + +val _ = Define ` + ((get_SV48_Vaddr_VPNi:SV48_Vaddr ->(27)words$word) v= + ((subrange_vec_dec v.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 38 : int):ii) (( 12 : int):ii) : 27 words$word)))`; + + +val _ = Define ` + ((set_SV48_Vaddr_VPNi:((regstate),(register_value),(SV48_Vaddr))register_ref ->(27)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_Vaddr_SV48_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 38 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 26 : int):ii) (( 0 : int):ii) : 27 words$word)) + : 48 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_SV48_Vaddr_VPNi:SV48_Vaddr ->(27)words$word -> SV48_Vaddr) v x= + ((v with<| + SV48_Vaddr_SV48_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 38 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 26 : int):ii) (( 0 : int):ii) : 27 words$word)) + : 48 words$word))|>)))`; + + +(*val _get_SV48_Vaddr_PgOfs : SV48_Vaddr -> mword ty12*) + +val _ = Define ` + ((get_SV48_Vaddr_PgOfs:SV48_Vaddr ->(12)words$word) v= + ((subrange_vec_dec v.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)))`; + + +(*val _set_SV48_Vaddr_PgOfs : register_ref regstate register_value SV48_Vaddr -> mword ty12 -> M unit*) + +val _ = Define ` + ((set_SV48_Vaddr_PgOfs:((regstate),(register_value),(SV48_Vaddr))register_ref ->(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_Vaddr_SV48_Vaddr_chunk_0 := + ((update_subrange_vec_dec r.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 48 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV48_Vaddr_PgOfs : SV48_Vaddr -> mword ty12 -> SV48_Vaddr*) + +val _ = Define ` + ((update_SV48_Vaddr_PgOfs:SV48_Vaddr ->(12)words$word -> SV48_Vaddr) v x= + ((v with<| + SV48_Vaddr_SV48_Vaddr_chunk_0 := + ((update_subrange_vec_dec v.SV48_Vaddr_SV48_Vaddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 48 words$word))|>)))`; + + +(*val Mk_SV48_Paddr : mword ty56 -> SV48_Paddr*) + +val _ = Define ` + ((Mk_SV48_Paddr:(56)words$word -> SV48_Paddr) v= + (<| SV48_Paddr_SV48_Paddr_chunk_0 := ((subrange_vec_dec v (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)) |>))`; + + +(*val _get_SV48_Paddr_bits : SV48_Paddr -> mword ty56*) + +val _ = Define ` + ((get_SV48_Paddr_bits:SV48_Paddr ->(56)words$word) v= + ((subrange_vec_dec v.SV48_Paddr_SV48_Paddr_chunk_0 (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)))`; + + +(*val _set_SV48_Paddr_bits : register_ref regstate register_value SV48_Paddr -> mword ty56 -> M unit*) + +val _ = Define ` + ((set_SV48_Paddr_bits:((regstate),(register_value),(SV48_Paddr))register_ref ->(56)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_Paddr_SV48_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV48_Paddr_SV48_Paddr_chunk_0 (( 55 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)) + : 56 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV48_Paddr_bits : SV48_Paddr -> mword ty56 -> SV48_Paddr*) + +val _ = Define ` + ((update_SV48_Paddr_bits:SV48_Paddr ->(56)words$word -> SV48_Paddr) v x= + ((v with<| + SV48_Paddr_SV48_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV48_Paddr_SV48_Paddr_chunk_0 (( 55 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 55 : int):ii) (( 0 : int):ii) : 56 words$word)) + : 56 words$word))|>)))`; + + +(*val _get_SV48_Paddr_PPNi : SV48_Paddr -> mword ty44*) + +val _ = Define ` + ((get_SV48_Paddr_PPNi:SV48_Paddr ->(44)words$word) v= + ((subrange_vec_dec v.SV48_Paddr_SV48_Paddr_chunk_0 (( 55 : int):ii) (( 12 : int):ii) : 44 words$word)))`; + + +(*val _set_SV48_Paddr_PPNi : register_ref regstate register_value SV48_Paddr -> mword ty44 -> M unit*) + +val _ = Define ` + ((set_SV48_Paddr_PPNi:((regstate),(register_value),(SV48_Paddr))register_ref ->(44)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_Paddr_SV48_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV48_Paddr_SV48_Paddr_chunk_0 (( 55 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec v (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 56 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +(*val _update_SV48_Paddr_PPNi : SV48_Paddr -> mword ty44 -> SV48_Paddr*) + +val _ = Define ` + ((update_SV48_Paddr_PPNi:SV48_Paddr ->(44)words$word -> SV48_Paddr) v x= + ((v with<| + SV48_Paddr_SV48_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV48_Paddr_SV48_Paddr_chunk_0 (( 55 : int):ii) (( 12 : int):ii) + ((subrange_vec_dec x (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 56 words$word))|>)))`; + + +val _ = Define ` + ((get_SV48_Paddr_PgOfs:SV48_Paddr ->(12)words$word) v= + ((subrange_vec_dec v.SV48_Paddr_SV48_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)))`; + + +val _ = Define ` + ((set_SV48_Paddr_PgOfs:((regstate),(register_value),(SV48_Paddr))register_ref ->(12)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_Paddr_SV48_Paddr_chunk_0 := + ((update_subrange_vec_dec r.SV48_Paddr_SV48_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 56 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_SV48_Paddr_PgOfs:SV48_Paddr ->(12)words$word -> SV48_Paddr) v x= + ((v with<| + SV48_Paddr_SV48_Paddr_chunk_0 := + ((update_subrange_vec_dec v.SV48_Paddr_SV48_Paddr_chunk_0 (( 11 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 11 : int):ii) (( 0 : int):ii) : 12 words$word)) + : 56 words$word))|>)))`; + + +(*val Mk_SV48_PTE : mword ty64 -> SV48_PTE*) + +val _ = Define ` + ((Mk_SV48_PTE:(64)words$word -> SV48_PTE) v= + (<| SV48_PTE_SV48_PTE_chunk_0 := ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) |>))`; + + +val _ = Define ` + ((get_SV48_PTE_bits:SV48_PTE ->(64)words$word) v= + ((subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)))`; + + +val _ = Define ` + ((set_SV48_PTE_bits:((regstate),(register_value),(SV48_PTE))register_ref ->(64)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV48_PTE_SV48_PTE_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_SV48_PTE_bits:SV48_PTE ->(64)words$word -> SV48_PTE) v x= + ((v with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 63 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 63 : int):ii) (( 0 : int):ii) : 64 words$word)) + : 64 words$word))|>)))`; + + +val _ = Define ` + ((get_SV48_PTE_PPNi:SV48_PTE ->(44)words$word) v= + ((subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 53 : int):ii) (( 10 : int):ii) : 44 words$word)))`; + + +val _ = Define ` + ((set_SV48_PTE_PPNi:((regstate),(register_value),(SV48_PTE))register_ref ->(44)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV48_PTE_SV48_PTE_chunk_0 (( 53 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec v (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_SV48_PTE_PPNi:SV48_PTE ->(44)words$word -> SV48_PTE) v x= + ((v with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 53 : int):ii) (( 10 : int):ii) + ((subrange_vec_dec x (( 43 : int):ii) (( 0 : int):ii) : 44 words$word)) + : 64 words$word))|>)))`; + + +val _ = Define ` + ((get_SV48_PTE_RSW:SV48_PTE ->(2)words$word) v= ((subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) : 2 words$word)))`; + + +val _ = Define ` + ((set_SV48_PTE_RSW:((regstate),(register_value),(SV48_PTE))register_ref ->(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV48_PTE_SV48_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec v (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_SV48_PTE_RSW:SV48_PTE ->(2)words$word -> SV48_PTE) v x= + ((v with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 9 : int):ii) (( 8 : int):ii) + ((subrange_vec_dec x (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) + : 64 words$word))|>)))`; + + +val _ = Define ` + ((get_SV48_PTE_BITS:SV48_PTE ->(8)words$word) v= ((subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)))`; + + +val _ = Define ` + ((set_SV48_PTE_BITS:((regstate),(register_value),(SV48_PTE))register_ref ->(8)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) r_ref v= (sail2_state_monad$bindS + (sail2_state_monad$read_regS r_ref) (\ r . + let r = + ((r with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec r.SV48_PTE_SV48_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec v (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)) in + sail2_state_monad$write_regS r_ref r)))`; + + +val _ = Define ` + ((update_SV48_PTE_BITS:SV48_PTE ->(8)words$word -> SV48_PTE) v x= + ((v with<| + SV48_PTE_SV48_PTE_chunk_0 := + ((update_subrange_vec_dec v.SV48_PTE_SV48_PTE_chunk_0 (( 7 : int):ii) (( 0 : int):ii) + ((subrange_vec_dec x (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + : 64 words$word))|>)))`; + + +(*val make_TLB_Entry : forall 'asidlen 'palen 'ptelen 'valen. Size 'asidlen, Size 'palen, Size 'ptelen, Size 'valen => mword 'asidlen -> bool -> mword 'valen -> mword 'palen -> mword 'ptelen -> ii -> mword 'palen -> ii -> M (TLB_Entry 'asidlen 'valen 'palen 'ptelen)*) + +val _ = Define ` + ((make_TLB_Entry:'asidlen words$word -> bool -> 'valen words$word -> 'palen words$word -> 'ptelen words$word -> int -> 'palen words$word -> int ->(regstate)sail2_state_monad$sequential_state ->(((('asidlen,'valen,'palen,'ptelen)TLB_Entry),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) asid global vAddr pAddr pte level pteAddr levelBitSize= + (let (shift : ii) = (PAGESIZE_BITS + ((level * levelBitSize))) in + let vAddrMask = + ((sub_vec_int + ((shiftl + ((xor_vec vAddr + ((xor_vec vAddr + ((EXTZ ((int_of_num (words$word_len vAddr))) (vec_of_bits [B1] : 1 words$word) : 'valen words$word)) + : 'valen words$word)) + : 'valen words$word)) shift + : 'valen words$word)) (( 1 : int):ii) + : 'valen words$word)) in + let vMatchMask = ((not_vec vAddrMask : 'valen words$word)) in sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__0 : 64 words$word) . + sail2_state_monad$returnS (<| TLB_Entry_asid := asid; + TLB_Entry_global := global; + TLB_Entry_pte := pte; + TLB_Entry_pteAddr := pteAddr; + TLB_Entry_vAddrMask := vAddrMask; + TLB_Entry_vMatchMask := vMatchMask; + TLB_Entry_vAddr := ((and_vec vAddr vMatchMask : 'valen words$word)); + TLB_Entry_pAddr := + ((shiftl ((shiftr pAddr shift : 'palen words$word)) shift : 'palen words$word)); + TLB_Entry_age := w__0 |>))))`; + + +(*val match_TLB_Entry : forall 'asidlen 'palen 'ptelen 'valen. Size 'asidlen, Size 'valen => TLB_Entry 'asidlen 'valen 'palen 'ptelen -> mword 'asidlen -> mword 'valen -> bool*) + +val _ = Define ` + ((match_TLB_Entry:('asidlen,'valen,'palen,'ptelen)TLB_Entry -> 'asidlen words$word -> 'valen words$word -> bool) ent asid vaddr= + ((((ent.TLB_Entry_global \/ (((ent.TLB_Entry_asid = asid)))))) /\ (((ent.TLB_Entry_vAddr = ((and_vec ent.TLB_Entry_vMatchMask vaddr : 'valen words$word)))))))`; + + +(*val flush_TLB_Entry : forall 'asidlen 'palen 'ptelen 'valen. Size 'asidlen, Size 'valen => TLB_Entry 'asidlen 'valen 'palen 'ptelen -> maybe (mword 'asidlen) -> maybe (mword 'valen) -> bool*) + +val _ = Define ` + ((flush_TLB_Entry:('asidlen,'valen,'palen,'ptelen)TLB_Entry ->('asidlen words$word)option ->('valen words$word)option -> bool) e asid addr= + ((case (asid, addr) of + (NONE, NONE) => T + | (NONE, SOME (a)) => + (e.TLB_Entry_vAddr = ((and_vec e.TLB_Entry_vMatchMask a : 'valen words$word))) + | (SOME (i), NONE) => ((((e.TLB_Entry_asid = i))) /\ ((~ e.TLB_Entry_global))) + | (SOME (i), SOME (a)) => + ((((e.TLB_Entry_asid = i))) /\ ((((((e.TLB_Entry_vAddr = ((and_vec a e.TLB_Entry_vMatchMask : 'valen words$word))))) /\ ((~ e.TLB_Entry_global)))))) + )))`; + + +(*val to_phys_addr : mword ty34 -> mword ty32*) + +val _ = Define ` + ((to_phys_addr:(34)words$word ->(32)words$word) a= ((subrange_vec_dec a (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)))`; + + +(*val walk32 : mword ty32 -> AccessType -> Privilege -> bool -> bool -> mword ty34 -> ii -> bool -> M (PTW_Result (mword ty34) SV32_PTE)*) + + val walk32_defn = Hol_defn "walk32" ` + ((walk32:(32)words$word -> AccessType -> Privilege -> bool -> bool ->(34)words$word -> int -> bool ->(regstate)sail2_state_monad$sequential_state ->((((((34)words$word),(SV32_PTE))PTW_Result),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) vaddr ac priv mxr do_sum ptb level global= + (let va = (Mk_SV32_Vaddr vaddr) in + let (pt_ofs : paddr32) = + ((shiftl + ((EXTZ (( 34 : int):ii) + ((subrange_vec_dec + ((shiftr ((get_SV32_Vaddr_VPNi va : 20 words$word)) + ((level * SV32_LEVEL_BITS)) + : 20 words$word)) ((SV32_LEVEL_BITS - (( 1 : int):ii))) (( 0 : int):ii) + : 10 words$word)) + : 34 words$word)) PTE32_LOG_SIZE + : 34 words$word)) in + let pte_addr = ((add_vec ptb pt_ofs : 34 words$word)) in sail2_state_monad$bindS + (mem_read ac ((to_phys_addr pte_addr : 32 words$word)) (( 4 : int):ii) F F F + : ( ( 32 words$word)MemoryOpResult) M) (\ (w__0 : ( 32 words$word) MemoryOpResult) . + (case w__0 of + MemException (_) => sail2_state_monad$returnS (PTW_Failure PTW_Access) + | MemValue (v) => + let pte = (Mk_SV32_PTE v) in + let pbits = ((get_SV32_PTE_BITS pte : 8 words$word)) in + let pattr = (Mk_PTE_Bits pbits) in + let is_global = + (global \/ (((((get_PTE_Bits_G pattr : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))) in + if ((isInvalidPTE pbits)) then sail2_state_monad$returnS (PTW_Failure PTW_Invalid_PTE) + else if ((isPTEPtr pbits)) then + if (((level = (( 0 : int):ii)))) then sail2_state_monad$returnS (PTW_Failure PTW_Invalid_PTE) + else + (walk32 vaddr ac priv mxr do_sum + ((shiftl ((EXTZ (( 34 : int):ii) ((get_SV32_PTE_PPNi pte : 22 words$word)) : 34 words$word)) + PAGESIZE_BITS + : 34 words$word)) ((level - (( 1 : int):ii))) is_global + : ( (( 34 words$word), SV32_PTE)PTW_Result) M) + else sail2_state_monad$bindS + (checkPTEPermission ac priv mxr do_sum pattr) (\ (w__3 : bool) . + sail2_state_monad$returnS (if ((~ w__3)) then PTW_Failure PTW_No_Permission + else if ((level > (( 0 : int):ii))) then + let mask = + ((sub_vec_int + ((shiftl + ((xor_vec ((get_SV32_PTE_PPNi pte : 22 words$word)) + ((xor_vec ((get_SV32_PTE_PPNi pte : 22 words$word)) + ((EXTZ (( 22 : int):ii) (vec_of_bits [B1] : 1 words$word) : 22 words$word)) + : 22 words$word)) + : 22 words$word)) ((level * SV32_LEVEL_BITS)) + : 22 words$word)) (( 1 : int):ii) + : 22 words$word)) in + if (((((and_vec ((get_SV32_PTE_PPNi pte : 22 words$word)) mask : 22 words$word)) <> ((EXTZ (( 22 : int):ii) (vec_of_bits [B0] : 1 words$word) : 22 words$word))))) then + PTW_Failure PTW_Misaligned + else + let ppn = + ((or_vec ((get_SV32_PTE_PPNi pte : 22 words$word)) + ((and_vec + ((EXTZ (( 22 : int):ii) ((get_SV32_Vaddr_VPNi va : 20 words$word)) : 22 words$word)) + mask + : 22 words$word)) + : 22 words$word)) in + PTW_Success ((concat_vec ppn ((get_SV32_Vaddr_PgOfs va : 12 words$word)) + : 34 words$word), + pte, + pte_addr, + level, + is_global) + else + PTW_Success ((concat_vec ((get_SV32_PTE_PPNi pte : 22 words$word)) + ((get_SV32_Vaddr_PgOfs va : 12 words$word)) + : 34 words$word), + pte, + pte_addr, + level, + is_global))) + ))))`; + +val _ = Lib.with_flag (computeLib.auto_import_definitions, false) Defn.save_defn walk32_defn; + +(*val lookup_TLB32 : mword ty9 -> mword ty32 -> M (maybe ((ii * TLB_Entry ty9 ty32 ty34 ty32)))*) + +val _ = Define ` + ((lookup_TLB32:(9)words$word ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->((((int#((9),(32),(34),(32))TLB_Entry)option),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) asid vaddr= (sail2_state_monad$bindS + (sail2_state_monad$read_regS tlb32_ref) (\ (w__0 : ( (9, 32, 34, 32)TLB_Entry)option) . + sail2_state_monad$returnS ((case w__0 of + NONE => NONE + | SOME (e) => if ((match_TLB_Entry e asid vaddr)) then SOME ((( 0 : int):ii), e) else NONE + )))))`; + + +(*val add_to_TLB32 : mword ty9 -> mword ty32 -> mword ty34 -> SV32_PTE -> mword ty34 -> ii -> bool -> M unit*) + +val _ = Define ` + ((add_to_TLB32:(9)words$word ->(32)words$word ->(34)words$word -> SV32_PTE ->(34)words$word -> int -> bool ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) asid vAddr pAddr pte pteAddr level global= (sail2_state_monad$bindS + (make_TLB_Entry asid global vAddr pAddr ((get_SV32_PTE_bits pte : 32 words$word)) level pteAddr + SV32_LEVEL_BITS) (\ (ent : TLB32_Entry) . + sail2_state_monad$write_regS tlb32_ref (SOME ent))))`; + + +(*val write_TLB32 : ii -> TLB_Entry ty9 ty32 ty34 ty32 -> M unit*) + +val _ = Define ` + ((write_TLB32:int ->((9),(32),(34),(32))TLB_Entry ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (idx : ii) (ent : TLB32_Entry)= (sail2_state_monad$write_regS tlb32_ref (SOME ent)))`; + + +(*val flush_TLB32 : maybe (mword ty9) -> maybe (mword ty32) -> M unit*) + +val _ = Define ` + ((flush_TLB32:((9)words$word)option ->((32)words$word)option ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) asid addr= (sail2_state_monad$bindS + (sail2_state_monad$read_regS tlb32_ref) (\ (w__0 : ( (9, 32, 34, 32)TLB_Entry)option) . + (case w__0 of + NONE => sail2_state_monad$returnS () + | SOME (e) => if ((flush_TLB_Entry e asid addr)) then sail2_state_monad$write_regS tlb32_ref NONE else sail2_state_monad$returnS () + ))))`; + + +(*val translate32 : mword ty9 -> mword ty34 -> mword ty32 -> AccessType -> Privilege -> bool -> bool -> ii -> M (TR_Result (mword ty34) PTW_Error)*) + +val _ = Define ` + ((translate32:(9)words$word ->(34)words$word ->(32)words$word -> AccessType -> Privilege -> bool -> bool -> int ->(regstate)sail2_state_monad$sequential_state ->((((((34)words$word),(PTW_Error))TR_Result),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) asid ptb vAddr ac priv mxr do_sum level= (sail2_state_monad$bindS + (lookup_TLB32 asid vAddr) (\ (w__0 : ((ii # (9, 32, 34, 32) TLB_Entry))option) . + (case w__0 of + SOME ((idx, ent)) => + let pte = (Mk_SV32_PTE ent.TLB_Entry_pte) in + let pteBits = (Mk_PTE_Bits ((get_SV32_PTE_BITS pte : 8 words$word))) in sail2_state_monad$bindS + (checkPTEPermission ac priv mxr do_sum pteBits) (\ (w__1 : bool) . + if ((~ w__1)) then sail2_state_monad$returnS (TR_Failure PTW_No_Permission) + else + (case ((update_PTE_Bits pteBits ac)) of + NONE => + sail2_state_monad$returnS (TR_Address ((or_vec ent.TLB_Entry_pAddr + ((EXTZ (( 34 : int):ii) + ((and_vec vAddr ent.TLB_Entry_vAddrMask : 32 words$word)) + : 34 words$word)) + : 34 words$word))) + | SOME (pbits) => + if ((~ ((plat_enable_dirty_update () )))) then sail2_state_monad$returnS (TR_Failure PTW_PTE_Update) + else + let n_pte = (update_SV32_PTE_BITS pte ((get_PTE_Bits_bits pbits : 8 words$word))) in + let (n_ent : TLB32_Entry) = ent in + let n_ent = ((n_ent with<| TLB_Entry_pte := ((get_SV32_PTE_bits n_pte : 32 words$word))|>)) in sail2_state_monad$bindS (sail2_state_monad$seqS + (write_TLB32 idx n_ent) + (mem_write_value + ((to_phys_addr ((EXTZ (( 34 : int):ii) ent.TLB_Entry_pteAddr : 34 words$word)) : 32 words$word)) + (( 4 : int):ii) ((get_SV32_PTE_bits n_pte : 32 words$word)) F F F)) (\ (w__2 : bool + MemoryOpResult) . sail2_state_monad$seqS + (case w__2 of + MemValue (_) => sail2_state_monad$returnS () + | MemException (e) => internal_error "invalid physical address in TLB" + ) + (sail2_state_monad$returnS (TR_Address ((or_vec ent.TLB_Entry_pAddr + ((EXTZ (( 34 : int):ii) + ((and_vec vAddr ent.TLB_Entry_vAddrMask : 32 words$word)) + : 34 words$word)) + : 34 words$word))))) + )) + | NONE => sail2_state_monad$bindS + (walk32 vAddr ac priv mxr do_sum ptb level F : ( (( 34 words$word), SV32_PTE)PTW_Result) M) (\ (w__6 : (( 34 words$word), SV32_PTE) + PTW_Result) . + (case w__6 of + PTW_Failure (f) => sail2_state_monad$returnS (TR_Failure f) + | PTW_Success ((pAddr, pte, pteAddr, level, global)) => + (case ((update_PTE_Bits ((Mk_PTE_Bits ((get_SV32_PTE_BITS pte : 8 words$word)))) ac)) of + NONE => sail2_state_monad$seqS + (add_to_TLB32 asid vAddr pAddr pte pteAddr level global) (sail2_state_monad$returnS (TR_Address pAddr)) + | SOME (pbits) => + if ((~ ((plat_enable_dirty_update () )))) then sail2_state_monad$returnS (TR_Failure PTW_PTE_Update) + else + let (w_pte : SV32_PTE) = + (update_SV32_PTE_BITS pte ((get_PTE_Bits_bits pbits : 8 words$word))) in sail2_state_monad$bindS + (mem_write_value ((to_phys_addr pteAddr : 32 words$word)) (( 4 : int):ii) + ((get_SV32_PTE_bits w_pte : 32 words$word)) F F F) (\ (w__7 : bool + MemoryOpResult) . + (case w__7 of + MemValue (_) => sail2_state_monad$seqS + (add_to_TLB32 asid vAddr pAddr w_pte pteAddr level global) + (sail2_state_monad$returnS (TR_Address pAddr)) + | MemException (e) => sail2_state_monad$returnS (TR_Failure PTW_Access) + )) + ) + )) + ))))`; + + +(*val init_vmem_sv32 : unit -> M unit*) + +val _ = Define ` + ((init_vmem_sv32:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$write_regS tlb32_ref NONE))`; + + +(*val legalize_satp : Architecture -> mword ty32 -> mword ty32 -> mword ty32*) + +val _ = Define ` + ((legalize_satp:Architecture ->(32)words$word ->(32)words$word ->(32)words$word) (a : Architecture) (o1 : xlenbits) (v : xlenbits)= + ((legalize_satp32 a o1 v : 32 words$word)))`; + + +(*val translationMode : Privilege -> M SATPMode*) + +val _ = Define ` + ((translationMode:Privilege ->(regstate)sail2_state_monad$sequential_state ->(((SATPMode),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) priv= + (if (((((privLevel_to_bits priv : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + then + sail2_state_monad$returnS Sbare + else sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__0 : Mstatus) . + let arch = (architecture ((get_mstatus_SXL w__0 : 2 words$word))) in + (case arch of + SOME (RV32) => sail2_state_monad$bindS + (sail2_state_monad$read_regS satp_ref : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + let s = (Mk_Satp32 ((subrange_vec_dec w__1 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word))) in + sail2_state_monad$returnS (if (((((get_Satp32_Mode s : 1 words$word)) = ((bool_to_bits F : 1 words$word))))) + then + Sbare + else Sv32)) + | _ => internal_error "unsupported address translation arch" + ))))`; + + +(*val translateAddr : mword ty32 -> AccessType -> M (TR_Result (mword ty32) ExceptionType)*) + +val _ = Define ` + ((translateAddr:(32)words$word -> AccessType ->(regstate)sail2_state_monad$sequential_state ->((((((32)words$word),(ExceptionType))TR_Result),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) vAddr ac= (sail2_state_monad$bindS + (case ac of + Execute => sail2_state_monad$read_regS cur_privilege_ref + | _ => sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__1 : Mstatus) . sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__2 : Privilege) . effectivePrivilege w__1 w__2)) + ) (\ (effPriv : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__4 : Mstatus) . + let (mxr : bool) = + (((get_Mstatus_MXR w__4 : 1 words$word)) = ((bool_to_bits T : 1 words$word))) in sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__5 : Mstatus) . + let (do_sum : bool) = + (((get_Mstatus_SUM w__5 : 1 words$word)) = ((bool_to_bits T : 1 words$word))) in sail2_state_monad$bindS + (translationMode effPriv) (\ (mode : SATPMode) . sail2_state_monad$bindS + (sail2_state_monad$read_regS satp_ref : ( 32 words$word) M) (\ (w__6 : 32 words$word) . + let asid = ((curAsid32 w__6 : 9 words$word)) in sail2_state_monad$bindS + (sail2_state_monad$read_regS satp_ref : ( 32 words$word) M) (\ (w__7 : 32 words$word) . + let ptb = ((curPTB32 w__7 : 34 words$word)) in + (case mode of + Sbare => sail2_state_monad$returnS (TR_Address vAddr) + | Sv32 => sail2_state_monad$bindS + (translate32 asid ptb vAddr ac effPriv mxr do_sum ((SV32_LEVELS - (( 1 : int):ii))) + : ( (( 34 words$word), PTW_Error)TR_Result) M) (\ (w__8 : (( 34 words$word), PTW_Error) TR_Result) . + sail2_state_monad$returnS ((case w__8 of + TR_Address (pa) => TR_Address ((to_phys_addr pa : 32 words$word)) + | TR_Failure (f) => TR_Failure ((translationException ac f)) + ))) + | _ => + (internal_error "unsupported address translation scheme" + : ( (( 32 words$word), ExceptionType)TR_Result) M) + )))))))))`; + + +(*val flush_TLB : maybe (mword ty32) -> maybe (mword ty32) -> M unit*) + +val _ = Define ` + ((flush_TLB:((32)words$word)option ->((32)words$word)option ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) asid_xlen addr_xlen= + (let (asid : asid32 option) = + ((case asid_xlen of + NONE => NONE + | SOME (a) => SOME ((subrange_vec_dec a (( 8 : int):ii) (( 0 : int):ii) : 9 words$word)) + )) in + flush_TLB32 asid addr_xlen))`; + + +(*val init_vmem : unit -> M unit*) + +val _ = Define ` + ((init_vmem:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (init_vmem_sv32 () ))`; + + +(*val execute : ast -> M Retired*) + +(*val encdec_uop_forwards : uop -> mword ty7*) + +val _ = Define ` + ((encdec_uop_forwards:uop ->(7)words$word) arg_= + ((case arg_ of + RISCV_LUI => (vec_of_bits [B0;B1;B1;B0;B1;B1;B1] : 7 words$word) + | RISCV_AUIPC => (vec_of_bits [B0;B0;B1;B0;B1;B1;B1] : 7 words$word) + )))`; + + +(*val encdec_uop_backwards : mword ty7 -> M uop*) + +val _ = Define ` + ((encdec_uop_backwards:(7)words$word ->(regstate)sail2_state_monad$sequential_state ->(((uop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B1;B1;B0;B1;B1;B1] : 7 words$word)))) then sail2_state_monad$returnS RISCV_LUI + else if (((b__0 = (vec_of_bits [B0;B0;B1;B0;B1;B1;B1] : 7 words$word)))) then sail2_state_monad$returnS RISCV_AUIPC + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val encdec_uop_forwards_matches : uop -> bool*) + +val _ = Define ` + ((encdec_uop_forwards_matches:uop -> bool) arg_= + ((case arg_ of RISCV_LUI => T | RISCV_AUIPC => T )))`; + + +(*val encdec_uop_backwards_matches : mword ty7 -> bool*) + +val _ = Define ` + ((encdec_uop_backwards_matches:(7)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B1;B1;B0;B1;B1;B1] : 7 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B0;B1;B0;B1;B1;B1] : 7 words$word)))) then T + else F))`; + + +(*val utype_mnemonic_forwards : uop -> string*) + +val _ = Define ` + ((utype_mnemonic_forwards:uop -> string) arg_= ((case arg_ of RISCV_LUI => "lui" | RISCV_AUIPC => "auipc" )))`; + + +(*val utype_mnemonic_backwards : string -> M uop*) + +val _ = Define ` + ((utype_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((uop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "lui"))) then sail2_state_monad$returnS RISCV_LUI + else if (((p0_ = "auipc"))) then sail2_state_monad$returnS RISCV_AUIPC + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val utype_mnemonic_forwards_matches : uop -> bool*) + +val _ = Define ` + ((utype_mnemonic_forwards_matches:uop -> bool) arg_= + ((case arg_ of RISCV_LUI => T | RISCV_AUIPC => T )))`; + + +(*val utype_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((utype_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "lui"))) then T + else if (((p0_ = "auipc"))) then T + else F))`; + + +(*val utype_mnemonic_matches_prefix : string -> maybe ((uop * ii))*) + +(*val _s496_ : string -> maybe string*) + +val _ = Define ` + ((s496_:string ->(string)option) s497_0= + (let s498_0 = s497_0 in + if ((string_startswith s498_0 "auipc")) then + (case ((string_drop s498_0 ((string_length "auipc")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s492_ : string -> maybe string*) + +val _ = Define ` + ((s492_:string ->(string)option) s493_0= + (let s494_0 = s493_0 in + if ((string_startswith s494_0 "lui")) then + (case ((string_drop s494_0 ((string_length "lui")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((utype_mnemonic_matches_prefix:string ->(uop#int)option) arg_= + (let s495_0 = arg_ in + if ((case ((s492_ s495_0)) of SOME (s_) => T | _ => F )) then + (case s492_ s495_0 of + (SOME (s_)) => + SOME (RISCV_LUI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s496_ s495_0)) of SOME (s_) => T | _ => F )) then + (case s496_ s495_0 of + (SOME (s_)) => + SOME (RISCV_AUIPC, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val encdec_bop_forwards : bop -> mword ty3*) + +val _ = Define ` + ((encdec_bop_forwards:bop ->(3)words$word) arg_= + ((case arg_ of + RISCV_BEQ => (vec_of_bits [B0;B0;B0] : 3 words$word) + | RISCV_BNE => (vec_of_bits [B0;B0;B1] : 3 words$word) + | RISCV_BLT => (vec_of_bits [B1;B0;B0] : 3 words$word) + | RISCV_BGE => (vec_of_bits [B1;B0;B1] : 3 words$word) + | RISCV_BLTU => (vec_of_bits [B1;B1;B0] : 3 words$word) + | RISCV_BGEU => (vec_of_bits [B1;B1;B1] : 3 words$word) + )))`; + + +(*val encdec_bop_backwards : mword ty3 -> M bop*) + +val _ = Define ` + ((encdec_bop_backwards:(3)words$word ->(regstate)sail2_state_monad$sequential_state ->(((bop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then sail2_state_monad$returnS RISCV_BEQ + else if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_BNE + else if (((b__0 = (vec_of_bits [B1;B0;B0] : 3 words$word)))) then sail2_state_monad$returnS RISCV_BLT + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_BGE + else if (((b__0 = (vec_of_bits [B1;B1;B0] : 3 words$word)))) then sail2_state_monad$returnS RISCV_BLTU + else if (((b__0 = (vec_of_bits [B1;B1;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_BGEU + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val encdec_bop_forwards_matches : bop -> bool*) + +val _ = Define ` + ((encdec_bop_forwards_matches:bop -> bool) arg_= + ((case arg_ of + RISCV_BEQ => T + | RISCV_BNE => T + | RISCV_BLT => T + | RISCV_BGE => T + | RISCV_BLTU => T + | RISCV_BGEU => T + )))`; + + +(*val encdec_bop_backwards_matches : mword ty3 -> bool*) + +val _ = Define ` + ((encdec_bop_backwards_matches:(3)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1;B1] : 3 words$word)))) then T + else F))`; + + +(*val btype_mnemonic_forwards : bop -> string*) + +val _ = Define ` + ((btype_mnemonic_forwards:bop -> string) arg_= + ((case arg_ of + RISCV_BEQ => "beq" + | RISCV_BNE => "bne" + | RISCV_BLT => "blt" + | RISCV_BGE => "bge" + | RISCV_BLTU => "bltu" + | RISCV_BGEU => "bgeu" + )))`; + + +(*val btype_mnemonic_backwards : string -> M bop*) + +val _ = Define ` + ((btype_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((bop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "beq"))) then sail2_state_monad$returnS RISCV_BEQ + else if (((p0_ = "bne"))) then sail2_state_monad$returnS RISCV_BNE + else if (((p0_ = "blt"))) then sail2_state_monad$returnS RISCV_BLT + else if (((p0_ = "bge"))) then sail2_state_monad$returnS RISCV_BGE + else if (((p0_ = "bltu"))) then sail2_state_monad$returnS RISCV_BLTU + else if (((p0_ = "bgeu"))) then sail2_state_monad$returnS RISCV_BGEU + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val btype_mnemonic_forwards_matches : bop -> bool*) + +val _ = Define ` + ((btype_mnemonic_forwards_matches:bop -> bool) arg_= + ((case arg_ of + RISCV_BEQ => T + | RISCV_BNE => T + | RISCV_BLT => T + | RISCV_BGE => T + | RISCV_BLTU => T + | RISCV_BGEU => T + )))`; + + +(*val btype_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((btype_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "beq"))) then T + else if (((p0_ = "bne"))) then T + else if (((p0_ = "blt"))) then T + else if (((p0_ = "bge"))) then T + else if (((p0_ = "bltu"))) then T + else if (((p0_ = "bgeu"))) then T + else F))`; + + +(*val btype_mnemonic_matches_prefix : string -> maybe ((bop * ii))*) + +(*val _s520_ : string -> maybe string*) + +val _ = Define ` + ((s520_:string ->(string)option) s521_0= + (let s522_0 = s521_0 in + if ((string_startswith s522_0 "bgeu")) then + (case ((string_drop s522_0 ((string_length "bgeu")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s516_ : string -> maybe string*) + +val _ = Define ` + ((s516_:string ->(string)option) s517_0= + (let s518_0 = s517_0 in + if ((string_startswith s518_0 "bltu")) then + (case ((string_drop s518_0 ((string_length "bltu")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s512_ : string -> maybe string*) + +val _ = Define ` + ((s512_:string ->(string)option) s513_0= + (let s514_0 = s513_0 in + if ((string_startswith s514_0 "bge")) then + (case ((string_drop s514_0 ((string_length "bge")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s508_ : string -> maybe string*) + +val _ = Define ` + ((s508_:string ->(string)option) s509_0= + (let s510_0 = s509_0 in + if ((string_startswith s510_0 "blt")) then + (case ((string_drop s510_0 ((string_length "blt")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s504_ : string -> maybe string*) + +val _ = Define ` + ((s504_:string ->(string)option) s505_0= + (let s506_0 = s505_0 in + if ((string_startswith s506_0 "bne")) then + (case ((string_drop s506_0 ((string_length "bne")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s500_ : string -> maybe string*) + +val _ = Define ` + ((s500_:string ->(string)option) s501_0= + (let s502_0 = s501_0 in + if ((string_startswith s502_0 "beq")) then + (case ((string_drop s502_0 ((string_length "beq")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((btype_mnemonic_matches_prefix:string ->(bop#int)option) arg_= + (let s503_0 = arg_ in + if ((case ((s500_ s503_0)) of SOME (s_) => T | _ => F )) then + (case s500_ s503_0 of + (SOME (s_)) => + SOME (RISCV_BEQ, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s504_ s503_0)) of SOME (s_) => T | _ => F )) then + (case s504_ s503_0 of + (SOME (s_)) => + SOME (RISCV_BNE, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s508_ s503_0)) of SOME (s_) => T | _ => F )) then + (case s508_ s503_0 of + (SOME (s_)) => + SOME (RISCV_BLT, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s512_ s503_0)) of SOME (s_) => T | _ => F )) then + (case s512_ s503_0 of + (SOME (s_)) => + SOME (RISCV_BGE, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s516_ s503_0)) of SOME (s_) => T | _ => F )) then + (case s516_ s503_0 of + (SOME (s_)) => + SOME (RISCV_BLTU, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s520_ s503_0)) of SOME (s_) => T | _ => F )) then + (case s520_ s503_0 of + (SOME (s_)) => + SOME (RISCV_BGEU, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val encdec_iop_forwards : iop -> mword ty3*) + +val _ = Define ` + ((encdec_iop_forwards:iop ->(3)words$word) arg_= + ((case arg_ of + RISCV_ADDI => (vec_of_bits [B0;B0;B0] : 3 words$word) + | RISCV_SLTI => (vec_of_bits [B0;B1;B0] : 3 words$word) + | RISCV_SLTIU => (vec_of_bits [B0;B1;B1] : 3 words$word) + | RISCV_ANDI => (vec_of_bits [B1;B1;B1] : 3 words$word) + | RISCV_ORI => (vec_of_bits [B1;B1;B0] : 3 words$word) + | RISCV_XORI => (vec_of_bits [B1;B0;B0] : 3 words$word) + )))`; + + +(*val encdec_iop_backwards : mword ty3 -> M iop*) + +val _ = Define ` + ((encdec_iop_backwards:(3)words$word ->(regstate)sail2_state_monad$sequential_state ->(((iop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then sail2_state_monad$returnS RISCV_ADDI + else if (((b__0 = (vec_of_bits [B0;B1;B0] : 3 words$word)))) then sail2_state_monad$returnS RISCV_SLTI + else if (((b__0 = (vec_of_bits [B0;B1;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_SLTIU + else if (((b__0 = (vec_of_bits [B1;B1;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_ANDI + else if (((b__0 = (vec_of_bits [B1;B1;B0] : 3 words$word)))) then sail2_state_monad$returnS RISCV_ORI + else if (((b__0 = (vec_of_bits [B1;B0;B0] : 3 words$word)))) then sail2_state_monad$returnS RISCV_XORI + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val encdec_iop_forwards_matches : iop -> bool*) + +val _ = Define ` + ((encdec_iop_forwards_matches:iop -> bool) arg_= + ((case arg_ of + RISCV_ADDI => T + | RISCV_SLTI => T + | RISCV_SLTIU => T + | RISCV_ANDI => T + | RISCV_ORI => T + | RISCV_XORI => T + )))`; + + +(*val encdec_iop_backwards_matches : mword ty3 -> bool*) + +val _ = Define ` + ((encdec_iop_backwards_matches:(3)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B1;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B1;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0;B0] : 3 words$word)))) then T + else F))`; + + +(*val itype_mnemonic_forwards : iop -> string*) + +val _ = Define ` + ((itype_mnemonic_forwards:iop -> string) arg_= + ((case arg_ of + RISCV_ADDI => "addi" + | RISCV_SLTI => "slti" + | RISCV_SLTIU => "sltiu" + | RISCV_XORI => "xori" + | RISCV_ORI => "ori" + | RISCV_ANDI => "andi" + )))`; + + +(*val itype_mnemonic_backwards : string -> M iop*) + +val _ = Define ` + ((itype_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((iop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "addi"))) then sail2_state_monad$returnS RISCV_ADDI + else if (((p0_ = "slti"))) then sail2_state_monad$returnS RISCV_SLTI + else if (((p0_ = "sltiu"))) then sail2_state_monad$returnS RISCV_SLTIU + else if (((p0_ = "xori"))) then sail2_state_monad$returnS RISCV_XORI + else if (((p0_ = "ori"))) then sail2_state_monad$returnS RISCV_ORI + else if (((p0_ = "andi"))) then sail2_state_monad$returnS RISCV_ANDI + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val itype_mnemonic_forwards_matches : iop -> bool*) + +val _ = Define ` + ((itype_mnemonic_forwards_matches:iop -> bool) arg_= + ((case arg_ of + RISCV_ADDI => T + | RISCV_SLTI => T + | RISCV_SLTIU => T + | RISCV_XORI => T + | RISCV_ORI => T + | RISCV_ANDI => T + )))`; + + +(*val itype_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((itype_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "addi"))) then T + else if (((p0_ = "slti"))) then T + else if (((p0_ = "sltiu"))) then T + else if (((p0_ = "xori"))) then T + else if (((p0_ = "ori"))) then T + else if (((p0_ = "andi"))) then T + else F))`; + + +(*val itype_mnemonic_matches_prefix : string -> maybe ((iop * ii))*) + +(*val _s544_ : string -> maybe string*) + +val _ = Define ` + ((s544_:string ->(string)option) s545_0= + (let s546_0 = s545_0 in + if ((string_startswith s546_0 "andi")) then + (case ((string_drop s546_0 ((string_length "andi")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s540_ : string -> maybe string*) + +val _ = Define ` + ((s540_:string ->(string)option) s541_0= + (let s542_0 = s541_0 in + if ((string_startswith s542_0 "ori")) then + (case ((string_drop s542_0 ((string_length "ori")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s536_ : string -> maybe string*) + +val _ = Define ` + ((s536_:string ->(string)option) s537_0= + (let s538_0 = s537_0 in + if ((string_startswith s538_0 "xori")) then + (case ((string_drop s538_0 ((string_length "xori")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s532_ : string -> maybe string*) + +val _ = Define ` + ((s532_:string ->(string)option) s533_0= + (let s534_0 = s533_0 in + if ((string_startswith s534_0 "sltiu")) then + (case ((string_drop s534_0 ((string_length "sltiu")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s528_ : string -> maybe string*) + +val _ = Define ` + ((s528_:string ->(string)option) s529_0= + (let s530_0 = s529_0 in + if ((string_startswith s530_0 "slti")) then + (case ((string_drop s530_0 ((string_length "slti")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s524_ : string -> maybe string*) + +val _ = Define ` + ((s524_:string ->(string)option) s525_0= + (let s526_0 = s525_0 in + if ((string_startswith s526_0 "addi")) then + (case ((string_drop s526_0 ((string_length "addi")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((itype_mnemonic_matches_prefix:string ->(iop#int)option) arg_= + (let s527_0 = arg_ in + if ((case ((s524_ s527_0)) of SOME (s_) => T | _ => F )) then + (case s524_ s527_0 of + (SOME (s_)) => + SOME (RISCV_ADDI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s528_ s527_0)) of SOME (s_) => T | _ => F )) then + (case s528_ s527_0 of + (SOME (s_)) => + SOME (RISCV_SLTI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s532_ s527_0)) of SOME (s_) => T | _ => F )) then + (case s532_ s527_0 of + (SOME (s_)) => + SOME (RISCV_SLTIU, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s536_ s527_0)) of SOME (s_) => T | _ => F )) then + (case s536_ s527_0 of + (SOME (s_)) => + SOME (RISCV_XORI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s540_ s527_0)) of SOME (s_) => T | _ => F )) then + (case s540_ s527_0 of + (SOME (s_)) => + SOME (RISCV_ORI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s544_ s527_0)) of SOME (s_) => T | _ => F )) then + (case s544_ s527_0 of + (SOME (s_)) => + SOME (RISCV_ANDI, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val encdec_sop_forwards : sop -> mword ty3*) + +val _ = Define ` + ((encdec_sop_forwards:sop ->(3)words$word) arg_= + ((case arg_ of + RISCV_SLLI => (vec_of_bits [B0;B0;B1] : 3 words$word) + | RISCV_SRLI => (vec_of_bits [B1;B0;B1] : 3 words$word) + | RISCV_SRAI => (vec_of_bits [B1;B0;B1] : 3 words$word) + )))`; + + +(*val encdec_sop_backwards : mword ty3 -> M sop*) + +val _ = Define ` + ((encdec_sop_backwards:(3)words$word ->(regstate)sail2_state_monad$sequential_state ->(((sop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_SLLI + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_SRLI + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS RISCV_SRAI + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val encdec_sop_forwards_matches : sop -> bool*) + +val _ = Define ` + ((encdec_sop_forwards_matches:sop -> bool) arg_= + ((case arg_ of RISCV_SLLI => T | RISCV_SRLI => T | RISCV_SRAI => T )))`; + + +(*val encdec_sop_backwards_matches : mword ty3 -> bool*) + +val _ = Define ` + ((encdec_sop_backwards_matches:(3)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0;B1] : 3 words$word)))) then T + else F))`; + + +(*val shiftiop_mnemonic_forwards : sop -> string*) + +val _ = Define ` + ((shiftiop_mnemonic_forwards:sop -> string) arg_= + ((case arg_ of RISCV_SLLI => "slli" | RISCV_SRLI => "srli" | RISCV_SRAI => "srai" )))`; + + +(*val shiftiop_mnemonic_backwards : string -> M sop*) + +val _ = Define ` + ((shiftiop_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((sop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "slli"))) then sail2_state_monad$returnS RISCV_SLLI + else if (((p0_ = "srli"))) then sail2_state_monad$returnS RISCV_SRLI + else if (((p0_ = "srai"))) then sail2_state_monad$returnS RISCV_SRAI + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val shiftiop_mnemonic_forwards_matches : sop -> bool*) + +val _ = Define ` + ((shiftiop_mnemonic_forwards_matches:sop -> bool) arg_= + ((case arg_ of RISCV_SLLI => T | RISCV_SRLI => T | RISCV_SRAI => T )))`; + + +(*val shiftiop_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((shiftiop_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "slli"))) then T + else if (((p0_ = "srli"))) then T + else if (((p0_ = "srai"))) then T + else F))`; + + +(*val shiftiop_mnemonic_matches_prefix : string -> maybe ((sop * ii))*) + +(*val _s556_ : string -> maybe string*) + +val _ = Define ` + ((s556_:string ->(string)option) s557_0= + (let s558_0 = s557_0 in + if ((string_startswith s558_0 "srai")) then + (case ((string_drop s558_0 ((string_length "srai")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s552_ : string -> maybe string*) + +val _ = Define ` + ((s552_:string ->(string)option) s553_0= + (let s554_0 = s553_0 in + if ((string_startswith s554_0 "srli")) then + (case ((string_drop s554_0 ((string_length "srli")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s548_ : string -> maybe string*) + +val _ = Define ` + ((s548_:string ->(string)option) s549_0= + (let s550_0 = s549_0 in + if ((string_startswith s550_0 "slli")) then + (case ((string_drop s550_0 ((string_length "slli")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((shiftiop_mnemonic_matches_prefix:string ->(sop#int)option) arg_= + (let s551_0 = arg_ in + if ((case ((s548_ s551_0)) of SOME (s_) => T | _ => F )) then + (case s548_ s551_0 of + (SOME (s_)) => + SOME (RISCV_SLLI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s552_ s551_0)) of SOME (s_) => T | _ => F )) then + (case s552_ s551_0 of + (SOME (s_)) => + SOME (RISCV_SRLI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s556_ s551_0)) of SOME (s_) => T | _ => F )) then + (case s556_ s551_0 of + (SOME (s_)) => + SOME (RISCV_SRAI, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val rtype_mnemonic_forwards : rop -> string*) + +val _ = Define ` + ((rtype_mnemonic_forwards:rop -> string) arg_= + ((case arg_ of + RISCV_ADD => "add" + | RISCV_SLT => "slt" + | RISCV_SLTU => "sltu" + | RISCV_AND => "and" + | RISCV_OR => "or" + | RISCV_XOR => "xor" + | RISCV_SLL => "sll" + | RISCV_SRL => "srl" + | RISCV_SUB => "sub" + | RISCV_SRA => "sra" + )))`; + + +(*val rtype_mnemonic_backwards : string -> M rop*) + +val _ = Define ` + ((rtype_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((rop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "add"))) then sail2_state_monad$returnS RISCV_ADD + else if (((p0_ = "slt"))) then sail2_state_monad$returnS RISCV_SLT + else if (((p0_ = "sltu"))) then sail2_state_monad$returnS RISCV_SLTU + else if (((p0_ = "and"))) then sail2_state_monad$returnS RISCV_AND + else if (((p0_ = "or"))) then sail2_state_monad$returnS RISCV_OR + else if (((p0_ = "xor"))) then sail2_state_monad$returnS RISCV_XOR + else if (((p0_ = "sll"))) then sail2_state_monad$returnS RISCV_SLL + else if (((p0_ = "srl"))) then sail2_state_monad$returnS RISCV_SRL + else if (((p0_ = "sub"))) then sail2_state_monad$returnS RISCV_SUB + else if (((p0_ = "sra"))) then sail2_state_monad$returnS RISCV_SRA + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val rtype_mnemonic_forwards_matches : rop -> bool*) + +val _ = Define ` + ((rtype_mnemonic_forwards_matches:rop -> bool) arg_= + ((case arg_ of + RISCV_ADD => T + | RISCV_SLT => T + | RISCV_SLTU => T + | RISCV_AND => T + | RISCV_OR => T + | RISCV_XOR => T + | RISCV_SLL => T + | RISCV_SRL => T + | RISCV_SUB => T + | RISCV_SRA => T + )))`; + + +(*val rtype_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((rtype_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "add"))) then T + else if (((p0_ = "slt"))) then T + else if (((p0_ = "sltu"))) then T + else if (((p0_ = "and"))) then T + else if (((p0_ = "or"))) then T + else if (((p0_ = "xor"))) then T + else if (((p0_ = "sll"))) then T + else if (((p0_ = "srl"))) then T + else if (((p0_ = "sub"))) then T + else if (((p0_ = "sra"))) then T + else F))`; + + +(*val rtype_mnemonic_matches_prefix : string -> maybe ((rop * ii))*) + +(*val _s596_ : string -> maybe string*) + +val _ = Define ` + ((s596_:string ->(string)option) s597_0= + (let s598_0 = s597_0 in + if ((string_startswith s598_0 "sra")) then + (case ((string_drop s598_0 ((string_length "sra")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s592_ : string -> maybe string*) + +val _ = Define ` + ((s592_:string ->(string)option) s593_0= + (let s594_0 = s593_0 in + if ((string_startswith s594_0 "sub")) then + (case ((string_drop s594_0 ((string_length "sub")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s588_ : string -> maybe string*) + +val _ = Define ` + ((s588_:string ->(string)option) s589_0= + (let s590_0 = s589_0 in + if ((string_startswith s590_0 "srl")) then + (case ((string_drop s590_0 ((string_length "srl")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s584_ : string -> maybe string*) + +val _ = Define ` + ((s584_:string ->(string)option) s585_0= + (let s586_0 = s585_0 in + if ((string_startswith s586_0 "sll")) then + (case ((string_drop s586_0 ((string_length "sll")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s580_ : string -> maybe string*) + +val _ = Define ` + ((s580_:string ->(string)option) s581_0= + (let s582_0 = s581_0 in + if ((string_startswith s582_0 "xor")) then + (case ((string_drop s582_0 ((string_length "xor")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s576_ : string -> maybe string*) + +val _ = Define ` + ((s576_:string ->(string)option) s577_0= + (let s578_0 = s577_0 in + if ((string_startswith s578_0 "or")) then + (case ((string_drop s578_0 ((string_length "or")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s572_ : string -> maybe string*) + +val _ = Define ` + ((s572_:string ->(string)option) s573_0= + (let s574_0 = s573_0 in + if ((string_startswith s574_0 "and")) then + (case ((string_drop s574_0 ((string_length "and")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s568_ : string -> maybe string*) + +val _ = Define ` + ((s568_:string ->(string)option) s569_0= + (let s570_0 = s569_0 in + if ((string_startswith s570_0 "sltu")) then + (case ((string_drop s570_0 ((string_length "sltu")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s564_ : string -> maybe string*) + +val _ = Define ` + ((s564_:string ->(string)option) s565_0= + (let s566_0 = s565_0 in + if ((string_startswith s566_0 "slt")) then + (case ((string_drop s566_0 ((string_length "slt")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s560_ : string -> maybe string*) + +val _ = Define ` + ((s560_:string ->(string)option) s561_0= + (let s562_0 = s561_0 in + if ((string_startswith s562_0 "add")) then + (case ((string_drop s562_0 ((string_length "add")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((rtype_mnemonic_matches_prefix:string ->(rop#int)option) arg_= + (let s563_0 = arg_ in + if ((case ((s560_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s560_ s563_0 of + (SOME (s_)) => + SOME (RISCV_ADD, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s564_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s564_ s563_0 of + (SOME (s_)) => + SOME (RISCV_SLT, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s568_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s568_ s563_0 of + (SOME (s_)) => + SOME (RISCV_SLTU, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s572_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s572_ s563_0 of + (SOME (s_)) => + SOME (RISCV_AND, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s576_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s576_ s563_0 of + (SOME (s_)) => + SOME (RISCV_OR, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s580_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s580_ s563_0 of + (SOME (s_)) => + SOME (RISCV_XOR, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s584_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s584_ s563_0 of + (SOME (s_)) => + SOME (RISCV_SLL, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s588_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s588_ s563_0 of + (SOME (s_)) => + SOME (RISCV_SRL, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s592_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s592_ s563_0 of + (SOME (s_)) => + SOME (RISCV_SUB, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s596_ s563_0)) of SOME (s_) => T | _ => F )) then + (case s596_ s563_0 of + (SOME (s_)) => + SOME (RISCV_SRA, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val extend_value : forall 'int8_times_n. Size 'int8_times_n => bool -> MemoryOpResult (mword 'int8_times_n) -> MemoryOpResult (mword ty32)*) + +val _ = Define ` + ((extend_value:bool ->('int8_times_n words$word)MemoryOpResult ->((32)words$word)MemoryOpResult) is_unsigned value= + ((case value of + MemValue (v) => + MemValue (if is_unsigned then (EXTZ (( 32 : int):ii) v : 32 words$word) + else (EXTS (( 32 : int):ii) v : 32 words$word)) + | MemException (e) => MemException e + )))`; + + +(*val process_load : forall 'int8_times_n. Size 'int8_times_n => mword ty5 -> mword ty32 -> MemoryOpResult (mword 'int8_times_n) -> bool -> M Retired*) + +val _ = Define ` + ((process_load:(5)words$word ->(32)words$word ->('int8_times_n words$word)MemoryOpResult -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rd addr value is_unsigned= + ((case ((extend_value is_unsigned value : ( 32 words$word) MemoryOpResult)) of + MemValue (result) => sail2_state_monad$seqS (wX ((regidx_to_regno rd)) result) (sail2_state_monad$returnS RETIRE_SUCCESS) + | MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + )))`; + + +(*val check_misaligned : mword ty32 -> word_width -> bool*) + +val _ = Define ` + ((check_misaligned:(32)words$word -> word_width -> bool) (vaddr : xlenbits) (width : word_width)= + (if ((plat_enable_misaligned_access () )) then F + else + (case width of + BYTE => F + | HALF => (((bit_to_bool ((access_vec_dec vaddr (( 0 : int):ii))))) = T) + | WORD => + ((((((bit_to_bool ((access_vec_dec vaddr (( 0 : int):ii))))) = T))) \/ (((((bit_to_bool ((access_vec_dec vaddr (( 1 : int):ii))))) = T)))) + | DOUBLE => + ((((((bit_to_bool ((access_vec_dec vaddr (( 0 : int):ii))))) = T))) \/ ((((((((bit_to_bool ((access_vec_dec vaddr (( 1 : int):ii))))) = T))) \/ (((((bit_to_bool ((access_vec_dec vaddr (( 2 : int):ii))))) = T))))))) + )))`; + + +(*val maybe_aq_forwards : bool -> string*) + +val _ = Define ` + ((maybe_aq_forwards:bool -> string) arg_= ((case arg_ of T => ".aq" | F => "" )))`; + + +(*val maybe_aq_backwards : string -> M bool*) + +val _ = Define ` + ((maybe_aq_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = ".aq"))) then sail2_state_monad$returnS T + else if (((p0_ = ""))) then sail2_state_monad$returnS F + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val maybe_aq_forwards_matches : bool -> bool*) + +val _ = Define ` + ((maybe_aq_forwards_matches:bool -> bool) arg_= + ((case arg_ of T => T | F => T )))`; + + +(*val maybe_aq_backwards_matches : string -> bool*) + +val _ = Define ` + ((maybe_aq_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = ".aq"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val maybe_aq_matches_prefix : string -> maybe ((bool * ii))*) + +(*val _s604_ : string -> maybe string*) + +val _ = Define ` + ((s604_:string ->(string)option) s605_0= + (let s606_0 = s605_0 in + if ((string_startswith s606_0 "")) then + (case ((string_drop s606_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s600_ : string -> maybe string*) + +val _ = Define ` + ((s600_:string ->(string)option) s601_0= + (let s602_0 = s601_0 in + if ((string_startswith s602_0 ".aq")) then + (case ((string_drop s602_0 ((string_length ".aq")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((maybe_aq_matches_prefix:string ->(bool#int)option) arg_= + (let s603_0 = arg_ in + if ((case ((s600_ s603_0)) of SOME (s_) => T | _ => F )) then + (case s600_ s603_0 of + (SOME (s_)) => + SOME (T, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s604_ s603_0)) of SOME (s_) => T | _ => F )) then + (case s604_ s603_0 of + (SOME (s_)) => + SOME (F, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val maybe_rl_forwards : bool -> string*) + +val _ = Define ` + ((maybe_rl_forwards:bool -> string) arg_= ((case arg_ of T => ".rl" | F => "" )))`; + + +(*val maybe_rl_backwards : string -> M bool*) + +val _ = Define ` + ((maybe_rl_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = ".rl"))) then sail2_state_monad$returnS T + else if (((p0_ = ""))) then sail2_state_monad$returnS F + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val maybe_rl_forwards_matches : bool -> bool*) + +val _ = Define ` + ((maybe_rl_forwards_matches:bool -> bool) arg_= + ((case arg_ of T => T | F => T )))`; + + +(*val maybe_rl_backwards_matches : string -> bool*) + +val _ = Define ` + ((maybe_rl_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = ".rl"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val maybe_rl_matches_prefix : string -> maybe ((bool * ii))*) + +(*val _s612_ : string -> maybe string*) + +val _ = Define ` + ((s612_:string ->(string)option) s613_0= + (let s614_0 = s613_0 in + if ((string_startswith s614_0 "")) then + (case ((string_drop s614_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s608_ : string -> maybe string*) + +val _ = Define ` + ((s608_:string ->(string)option) s609_0= + (let s610_0 = s609_0 in + if ((string_startswith s610_0 ".rl")) then + (case ((string_drop s610_0 ((string_length ".rl")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((maybe_rl_matches_prefix:string ->(bool#int)option) arg_= + (let s611_0 = arg_ in + if ((case ((s608_ s611_0)) of SOME (s_) => T | _ => F )) then + (case s608_ s611_0 of + (SOME (s_)) => + SOME (T, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s612_ s611_0)) of SOME (s_) => T | _ => F )) then + (case s612_ s611_0 of + (SOME (s_)) => + SOME (F, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val maybe_u_forwards : bool -> string*) + +val _ = Define ` + ((maybe_u_forwards:bool -> string) arg_= ((case arg_ of T => "u" | F => "" )))`; + + +(*val maybe_u_backwards : string -> M bool*) + +val _ = Define ` + ((maybe_u_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "u"))) then sail2_state_monad$returnS T + else if (((p0_ = ""))) then sail2_state_monad$returnS F + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val maybe_u_forwards_matches : bool -> bool*) + +val _ = Define ` + ((maybe_u_forwards_matches:bool -> bool) arg_= + ((case arg_ of T => T | F => T )))`; + + +(*val maybe_u_backwards_matches : string -> bool*) + +val _ = Define ` + ((maybe_u_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "u"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val maybe_u_matches_prefix : string -> maybe ((bool * ii))*) + +(*val _s620_ : string -> maybe string*) + +val _ = Define ` + ((s620_:string ->(string)option) s621_0= + (let s622_0 = s621_0 in + if ((string_startswith s622_0 "")) then + (case ((string_drop s622_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s616_ : string -> maybe string*) + +val _ = Define ` + ((s616_:string ->(string)option) s617_0= + (let s618_0 = s617_0 in + if ((string_startswith s618_0 "u")) then + (case ((string_drop s618_0 ((string_length "u")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((maybe_u_matches_prefix:string ->(bool#int)option) arg_= + (let s619_0 = arg_ in + if ((case ((s616_ s619_0)) of SOME (s_) => T | _ => F )) then + (case s616_ s619_0 of + (SOME (s_)) => + SOME (T, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s620_ s619_0)) of SOME (s_) => T | _ => F )) then + (case s620_ s619_0 of + (SOME (s_)) => + SOME (F, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val shiftw_mnemonic_forwards : sop -> string*) + +val _ = Define ` + ((shiftw_mnemonic_forwards:sop -> string) arg_= + ((case arg_ of RISCV_SLLI => "slli" | RISCV_SRLI => "srli" | RISCV_SRAI => "srai" )))`; + + +(*val shiftw_mnemonic_backwards : string -> M sop*) + +val _ = Define ` + ((shiftw_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((sop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "slli"))) then sail2_state_monad$returnS RISCV_SLLI + else if (((p0_ = "srli"))) then sail2_state_monad$returnS RISCV_SRLI + else if (((p0_ = "srai"))) then sail2_state_monad$returnS RISCV_SRAI + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val shiftw_mnemonic_forwards_matches : sop -> bool*) + +val _ = Define ` + ((shiftw_mnemonic_forwards_matches:sop -> bool) arg_= + ((case arg_ of RISCV_SLLI => T | RISCV_SRLI => T | RISCV_SRAI => T )))`; + + +(*val shiftw_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((shiftw_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "slli"))) then T + else if (((p0_ = "srli"))) then T + else if (((p0_ = "srai"))) then T + else F))`; + + +(*val shiftw_mnemonic_matches_prefix : string -> maybe ((sop * ii))*) + +(*val _s632_ : string -> maybe string*) + +val _ = Define ` + ((s632_:string ->(string)option) s633_0= + (let s634_0 = s633_0 in + if ((string_startswith s634_0 "srai")) then + (case ((string_drop s634_0 ((string_length "srai")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s628_ : string -> maybe string*) + +val _ = Define ` + ((s628_:string ->(string)option) s629_0= + (let s630_0 = s629_0 in + if ((string_startswith s630_0 "srli")) then + (case ((string_drop s630_0 ((string_length "srli")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s624_ : string -> maybe string*) + +val _ = Define ` + ((s624_:string ->(string)option) s625_0= + (let s626_0 = s625_0 in + if ((string_startswith s626_0 "slli")) then + (case ((string_drop s626_0 ((string_length "slli")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((shiftw_mnemonic_matches_prefix:string ->(sop#int)option) arg_= + (let s627_0 = arg_ in + if ((case ((s624_ s627_0)) of SOME (s_) => T | _ => F )) then + (case s624_ s627_0 of + (SOME (s_)) => + SOME (RISCV_SLLI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s628_ s627_0)) of SOME (s_) => T | _ => F )) then + (case s628_ s627_0 of + (SOME (s_)) => + SOME (RISCV_SRLI, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s632_ s627_0)) of SOME (s_) => T | _ => F )) then + (case s632_ s627_0 of + (SOME (s_)) => + SOME (RISCV_SRAI, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val rtypew_mnemonic_forwards : ropw -> string*) + +val _ = Define ` + ((rtypew_mnemonic_forwards:ropw -> string) arg_= + ((case arg_ of + RISCV_ADDW => "addw" + | RISCV_SUBW => "subw" + | RISCV_SLLW => "sllw" + | RISCV_SRLW => "srlw" + | RISCV_SRAW => "sraw" + )))`; + + +(*val rtypew_mnemonic_backwards : string -> M ropw*) + +val _ = Define ` + ((rtypew_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((ropw),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "addw"))) then sail2_state_monad$returnS RISCV_ADDW + else if (((p0_ = "subw"))) then sail2_state_monad$returnS RISCV_SUBW + else if (((p0_ = "sllw"))) then sail2_state_monad$returnS RISCV_SLLW + else if (((p0_ = "srlw"))) then sail2_state_monad$returnS RISCV_SRLW + else if (((p0_ = "sraw"))) then sail2_state_monad$returnS RISCV_SRAW + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val rtypew_mnemonic_forwards_matches : ropw -> bool*) + +val _ = Define ` + ((rtypew_mnemonic_forwards_matches:ropw -> bool) arg_= + ((case arg_ of + RISCV_ADDW => T + | RISCV_SUBW => T + | RISCV_SLLW => T + | RISCV_SRLW => T + | RISCV_SRAW => T + )))`; + + +(*val rtypew_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((rtypew_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "addw"))) then T + else if (((p0_ = "subw"))) then T + else if (((p0_ = "sllw"))) then T + else if (((p0_ = "srlw"))) then T + else if (((p0_ = "sraw"))) then T + else F))`; + + +(*val rtypew_mnemonic_matches_prefix : string -> maybe ((ropw * ii))*) + +(*val _s652_ : string -> maybe string*) + +val _ = Define ` + ((s652_:string ->(string)option) s653_0= + (let s654_0 = s653_0 in + if ((string_startswith s654_0 "sraw")) then + (case ((string_drop s654_0 ((string_length "sraw")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s648_ : string -> maybe string*) + +val _ = Define ` + ((s648_:string ->(string)option) s649_0= + (let s650_0 = s649_0 in + if ((string_startswith s650_0 "srlw")) then + (case ((string_drop s650_0 ((string_length "srlw")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s644_ : string -> maybe string*) + +val _ = Define ` + ((s644_:string ->(string)option) s645_0= + (let s646_0 = s645_0 in + if ((string_startswith s646_0 "sllw")) then + (case ((string_drop s646_0 ((string_length "sllw")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s640_ : string -> maybe string*) + +val _ = Define ` + ((s640_:string ->(string)option) s641_0= + (let s642_0 = s641_0 in + if ((string_startswith s642_0 "subw")) then + (case ((string_drop s642_0 ((string_length "subw")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s636_ : string -> maybe string*) + +val _ = Define ` + ((s636_:string ->(string)option) s637_0= + (let s638_0 = s637_0 in + if ((string_startswith s638_0 "addw")) then + (case ((string_drop s638_0 ((string_length "addw")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((rtypew_mnemonic_matches_prefix:string ->(ropw#int)option) arg_= + (let s639_0 = arg_ in + if ((case ((s636_ s639_0)) of SOME (s_) => T | _ => F )) then + (case s636_ s639_0 of + (SOME (s_)) => + SOME (RISCV_ADDW, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s640_ s639_0)) of SOME (s_) => T | _ => F )) then + (case s640_ s639_0 of + (SOME (s_)) => + SOME (RISCV_SUBW, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s644_ s639_0)) of SOME (s_) => T | _ => F )) then + (case s644_ s639_0 of + (SOME (s_)) => + SOME (RISCV_SLLW, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s648_ s639_0)) of SOME (s_) => T | _ => F )) then + (case s648_ s639_0 of + (SOME (s_)) => + SOME (RISCV_SRLW, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s652_ s639_0)) of SOME (s_) => T | _ => F )) then + (case s652_ s639_0 of + (SOME (s_)) => + SOME (RISCV_SRAW, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val shiftiwop_mnemonic_forwards : sopw -> string*) + +val _ = Define ` + ((shiftiwop_mnemonic_forwards:sopw -> string) arg_= + ((case arg_ of RISCV_SLLIW => "slliw" | RISCV_SRLIW => "srliw" | RISCV_SRAIW => "sraiw" )))`; + + +(*val shiftiwop_mnemonic_backwards : string -> M sopw*) + +val _ = Define ` + ((shiftiwop_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((sopw),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "slliw"))) then sail2_state_monad$returnS RISCV_SLLIW + else if (((p0_ = "srliw"))) then sail2_state_monad$returnS RISCV_SRLIW + else if (((p0_ = "sraiw"))) then sail2_state_monad$returnS RISCV_SRAIW + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val shiftiwop_mnemonic_forwards_matches : sopw -> bool*) + +val _ = Define ` + ((shiftiwop_mnemonic_forwards_matches:sopw -> bool) arg_= + ((case arg_ of RISCV_SLLIW => T | RISCV_SRLIW => T | RISCV_SRAIW => T )))`; + + +(*val shiftiwop_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((shiftiwop_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "slliw"))) then T + else if (((p0_ = "srliw"))) then T + else if (((p0_ = "sraiw"))) then T + else F))`; + + +(*val shiftiwop_mnemonic_matches_prefix : string -> maybe ((sopw * ii))*) + +(*val _s664_ : string -> maybe string*) + +val _ = Define ` + ((s664_:string ->(string)option) s665_0= + (let s666_0 = s665_0 in + if ((string_startswith s666_0 "sraiw")) then + (case ((string_drop s666_0 ((string_length "sraiw")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s660_ : string -> maybe string*) + +val _ = Define ` + ((s660_:string ->(string)option) s661_0= + (let s662_0 = s661_0 in + if ((string_startswith s662_0 "srliw")) then + (case ((string_drop s662_0 ((string_length "srliw")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s656_ : string -> maybe string*) + +val _ = Define ` + ((s656_:string ->(string)option) s657_0= + (let s658_0 = s657_0 in + if ((string_startswith s658_0 "slliw")) then + (case ((string_drop s658_0 ((string_length "slliw")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((shiftiwop_mnemonic_matches_prefix:string ->(sopw#int)option) arg_= + (let s659_0 = arg_ in + if ((case ((s656_ s659_0)) of SOME (s_) => T | _ => F )) then + (case s656_ s659_0 of + (SOME (s_)) => + SOME (RISCV_SLLIW, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s660_ s659_0)) of SOME (s_) => T | _ => F )) then + (case s660_ s659_0 of + (SOME (s_)) => + SOME (RISCV_SRLIW, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s664_ s659_0)) of SOME (s_) => T | _ => F )) then + (case s664_ s659_0 of + (SOME (s_)) => + SOME (RISCV_SRAIW, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val bit_maybe_r_forwards : mword ty1 -> M string*) + +val _ = Define ` + ((bit_maybe_r_forwards:(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then sail2_state_monad$returnS "r" + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then sail2_state_monad$returnS "" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_r_backwards : string -> M (mword ty1)*) + +val _ = Define ` + ((bit_maybe_r_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((1)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "r"))) then sail2_state_monad$returnS (vec_of_bits [B1] : 1 words$word) + else if (((p0_ = ""))) then sail2_state_monad$returnS (vec_of_bits [B0] : 1 words$word) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_r_forwards_matches : mword ty1 -> bool*) + +val _ = Define ` + ((bit_maybe_r_forwards_matches:(1)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then T + else F))`; + + +(*val bit_maybe_r_backwards_matches : string -> bool*) + +val _ = Define ` + ((bit_maybe_r_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "r"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val bit_maybe_r_matches_prefix : string -> maybe ((mword ty1 * ii))*) + +(*val _s672_ : string -> maybe string*) + +val _ = Define ` + ((s672_:string ->(string)option) s673_0= + (let s674_0 = s673_0 in + if ((string_startswith s674_0 "")) then + (case ((string_drop s674_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s668_ : string -> maybe string*) + +val _ = Define ` + ((s668_:string ->(string)option) s669_0= + (let s670_0 = s669_0 in + if ((string_startswith s670_0 "r")) then + (case ((string_drop s670_0 ((string_length "r")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((bit_maybe_r_matches_prefix:string ->((1)words$word#int)option) arg_= + (let s671_0 = arg_ in + if ((case ((s668_ s671_0)) of SOME (s_) => T | _ => F )) then + (case s668_ s671_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s672_ s671_0)) of SOME (s_) => T | _ => F )) then + (case s672_ s671_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else NONE))`; + + +(*val bit_maybe_w_forwards : mword ty1 -> M string*) + +val _ = Define ` + ((bit_maybe_w_forwards:(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then sail2_state_monad$returnS "w" + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then sail2_state_monad$returnS "" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_w_backwards : string -> M (mword ty1)*) + +val _ = Define ` + ((bit_maybe_w_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((1)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "w"))) then sail2_state_monad$returnS (vec_of_bits [B1] : 1 words$word) + else if (((p0_ = ""))) then sail2_state_monad$returnS (vec_of_bits [B0] : 1 words$word) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_w_forwards_matches : mword ty1 -> bool*) + +val _ = Define ` + ((bit_maybe_w_forwards_matches:(1)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then T + else F))`; + + +(*val bit_maybe_w_backwards_matches : string -> bool*) + +val _ = Define ` + ((bit_maybe_w_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "w"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val bit_maybe_w_matches_prefix : string -> maybe ((mword ty1 * ii))*) + +(*val _s680_ : string -> maybe string*) + +val _ = Define ` + ((s680_:string ->(string)option) s681_0= + (let s682_0 = s681_0 in + if ((string_startswith s682_0 "")) then + (case ((string_drop s682_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s676_ : string -> maybe string*) + +val _ = Define ` + ((s676_:string ->(string)option) s677_0= + (let s678_0 = s677_0 in + if ((string_startswith s678_0 "w")) then + (case ((string_drop s678_0 ((string_length "w")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((bit_maybe_w_matches_prefix:string ->((1)words$word#int)option) arg_= + (let s679_0 = arg_ in + if ((case ((s676_ s679_0)) of SOME (s_) => T | _ => F )) then + (case s676_ s679_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s680_ s679_0)) of SOME (s_) => T | _ => F )) then + (case s680_ s679_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else NONE))`; + + +(*val bit_maybe_i_forwards : mword ty1 -> M string*) + +val _ = Define ` + ((bit_maybe_i_forwards:(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then sail2_state_monad$returnS "i" + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then sail2_state_monad$returnS "" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_i_backwards : string -> M (mword ty1)*) + +val _ = Define ` + ((bit_maybe_i_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((1)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "i"))) then sail2_state_monad$returnS (vec_of_bits [B1] : 1 words$word) + else if (((p0_ = ""))) then sail2_state_monad$returnS (vec_of_bits [B0] : 1 words$word) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_i_forwards_matches : mword ty1 -> bool*) + +val _ = Define ` + ((bit_maybe_i_forwards_matches:(1)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then T + else F))`; + + +(*val bit_maybe_i_backwards_matches : string -> bool*) + +val _ = Define ` + ((bit_maybe_i_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "i"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val bit_maybe_i_matches_prefix : string -> maybe ((mword ty1 * ii))*) + +(*val _s688_ : string -> maybe string*) + +val _ = Define ` + ((s688_:string ->(string)option) s689_0= + (let s690_0 = s689_0 in + if ((string_startswith s690_0 "")) then + (case ((string_drop s690_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s684_ : string -> maybe string*) + +val _ = Define ` + ((s684_:string ->(string)option) s685_0= + (let s686_0 = s685_0 in + if ((string_startswith s686_0 "i")) then + (case ((string_drop s686_0 ((string_length "i")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((bit_maybe_i_matches_prefix:string ->((1)words$word#int)option) arg_= + (let s687_0 = arg_ in + if ((case ((s684_ s687_0)) of SOME (s_) => T | _ => F )) then + (case s684_ s687_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s688_ s687_0)) of SOME (s_) => T | _ => F )) then + (case s688_ s687_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else NONE))`; + + +(*val bit_maybe_o_forwards : mword ty1 -> M string*) + +val _ = Define ` + ((bit_maybe_o_forwards:(1)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then sail2_state_monad$returnS "o" + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then sail2_state_monad$returnS "" + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_o_backwards : string -> M (mword ty1)*) + +val _ = Define ` + ((bit_maybe_o_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((1)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "o"))) then sail2_state_monad$returnS (vec_of_bits [B1] : 1 words$word) + else if (((p0_ = ""))) then sail2_state_monad$returnS (vec_of_bits [B0] : 1 words$word) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val bit_maybe_o_forwards_matches : mword ty1 -> bool*) + +val _ = Define ` + ((bit_maybe_o_forwards_matches:(1)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B1] : 1 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0] : 1 words$word)))) then T + else F))`; + + +(*val bit_maybe_o_backwards_matches : string -> bool*) + +val _ = Define ` + ((bit_maybe_o_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "o"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val bit_maybe_o_matches_prefix : string -> maybe ((mword ty1 * ii))*) + +(*val _s696_ : string -> maybe string*) + +val _ = Define ` + ((s696_:string ->(string)option) s697_0= + (let s698_0 = s697_0 in + if ((string_startswith s698_0 "")) then + (case ((string_drop s698_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s692_ : string -> maybe string*) + +val _ = Define ` + ((s692_:string ->(string)option) s693_0= + (let s694_0 = s693_0 in + if ((string_startswith s694_0 "o")) then + (case ((string_drop s694_0 ((string_length "o")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((bit_maybe_o_matches_prefix:string ->((1)words$word#int)option) arg_= + (let s695_0 = arg_ in + if ((case ((s692_ s695_0)) of SOME (s_) => T | _ => F )) then + (case s692_ s695_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B1] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s696_ s695_0)) of SOME (s_) => T | _ => F )) then + (case s696_ s695_0 of + (SOME (s_)) => + SOME + ((vec_of_bits [B0] : 1 words$word), ((string_length arg_)) - + ((string_length s_))) + ) + else NONE))`; + + +(*val fence_bits_forwards : mword ty4 -> M string*) + +val _ = Define ` + ((fence_bits_forwards:(4)words$word ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + ((case arg_ of + v__0 => + let (i : 1 bits) = ((subrange_vec_dec v__0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)) in + let (w : 1 bits) = ((subrange_vec_dec v__0 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + let (r : 1 bits) = ((subrange_vec_dec v__0 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)) in + let (o1 : 1 bits) = ((subrange_vec_dec v__0 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (i : 1 bits) = ((subrange_vec_dec v__0 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bit_maybe_i_forwards i) (\ (w__0 : string) . sail2_state_monad$bindS + (bit_maybe_o_forwards o1) (\ (w__1 : string) . sail2_state_monad$bindS + (bit_maybe_r_forwards r) (\ (w__2 : string) . sail2_state_monad$bindS + (bit_maybe_w_forwards w) (\ (w__3 : string) . + sail2_state_monad$returnS ((string_append w__0 + ((string_append w__1 ((string_append w__2 ((string_append w__3 "")))))))))))) + )))`; + + +(*val fence_bits_backwards : string -> M (mword ty4)*) + +(*val _s700_ : string -> maybe ((mword ty1 * mword ty1 * mword ty1 * mword ty1))*) + +val _ = Define ` + ((s700_:string ->((1)words$word#(1)words$word#(1)words$word#(1)words$word)option) s701_0= + ((case s701_0 of + s702_0 => + (case ((bit_maybe_i_matches_prefix s702_0 : (( 1 words$word # ii)) option)) of + SOME ((i, s703_0)) => + (case ((string_drop s702_0 s703_0)) of + s704_0 => + (case ((bit_maybe_o_matches_prefix s704_0 : (( 1 words$word # ii)) option)) of + SOME ((o1, s705_0)) => + (case ((string_drop s704_0 s705_0)) of + s706_0 => + (case ((bit_maybe_r_matches_prefix s706_0 : (( 1 words$word # ii)) option)) of + SOME ((r, s707_0)) => + (case ((string_drop s706_0 s707_0)) of + s708_0 => + (case ((bit_maybe_w_matches_prefix s708_0 : (( 1 words$word # ii)) option)) of + SOME ((w, s709_0)) => + let p0_ = (string_drop s708_0 s709_0) in + if (((p0_ = ""))) then SOME (i, o1, r, w) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((fence_bits_backwards:string ->(regstate)sail2_state_monad$sequential_state ->((((4)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let s710_0 = arg_ in + if ((case ((s700_ s710_0 : (( 1 words$word # 1 words$word # 1 words$word # 1 words$word))option)) of + SOME ((i, o1, r, w)) => T + | _ => F + )) then (case + (s700_ s710_0 : (( 1 words$word # 1 words$word # 1 words$word # 1 words$word)) option) of + (SOME ((i, o1, r, w))) => + sail2_state_monad$returnS + ((concat_vec i + ((concat_vec o1 ((concat_vec r w : 2 words$word)) : 3 words$word)) + : 4 words$word)) + ) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val fence_bits_forwards_matches : mword ty4 -> bool*) + +val _ = Define ` + ((fence_bits_forwards_matches:(4)words$word -> bool) arg_= + ((case arg_ of v__1 => T )))`; + + +(*val fence_bits_backwards_matches : string -> bool*) + +(*val _s711_ : string -> maybe ((mword ty1 * mword ty1 * mword ty1 * mword ty1))*) + +val _ = Define ` + ((s711_:string ->((1)words$word#(1)words$word#(1)words$word#(1)words$word)option) s712_0= + ((case s712_0 of + s713_0 => + (case ((bit_maybe_i_matches_prefix s713_0 : (( 1 words$word # ii)) option)) of + SOME ((i, s714_0)) => + (case ((string_drop s713_0 s714_0)) of + s715_0 => + (case ((bit_maybe_o_matches_prefix s715_0 : (( 1 words$word # ii)) option)) of + SOME ((o1, s716_0)) => + (case ((string_drop s715_0 s716_0)) of + s717_0 => + (case ((bit_maybe_r_matches_prefix s717_0 : (( 1 words$word # ii)) option)) of + SOME ((r, s718_0)) => + (case ((string_drop s717_0 s718_0)) of + s719_0 => + (case ((bit_maybe_w_matches_prefix s719_0 : (( 1 words$word # ii)) option)) of + SOME ((w, s720_0)) => + let p0_ = (string_drop s719_0 s720_0) in + if (((p0_ = ""))) then SOME (i, o1, r, w) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((fence_bits_backwards_matches:string -> bool) arg_= + (let s721_0 = arg_ in + if ((case ((s711_ s721_0 : (( 1 words$word # 1 words$word # 1 words$word # 1 words$word))option)) of + SOME ((i, o1, r, w)) => T + | _ => F + )) then (case + (s711_ s721_0 : (( 1 words$word # 1 words$word # 1 words$word # 1 words$word)) option) of + (SOME ((i, o1, r, w))) => + T + ) + else F))`; + + +(*val fence_bits_matches_prefix : string -> maybe ((mword ty4 * ii))*) + +(*val _s722_ : string -> maybe ((mword ty1 * mword ty1 * mword ty1 * mword ty1 * string))*) + +val _ = Define ` + ((s722_:string ->((1)words$word#(1)words$word#(1)words$word#(1)words$word#string)option) s723_0= + ((case s723_0 of + s724_0 => + (case ((bit_maybe_i_matches_prefix s724_0 : (( 1 words$word # ii)) option)) of + SOME ((i, s725_0)) => + (case ((string_drop s724_0 s725_0)) of + s726_0 => + (case ((bit_maybe_o_matches_prefix s726_0 : (( 1 words$word # ii)) option)) of + SOME ((o1, s727_0)) => + (case ((string_drop s726_0 s727_0)) of + s728_0 => + (case ((bit_maybe_r_matches_prefix s728_0 : (( 1 words$word # ii)) option)) of + SOME ((r, s729_0)) => + (case ((string_drop s728_0 s729_0)) of + s730_0 => + (case ((bit_maybe_w_matches_prefix s730_0 : (( 1 words$word # ii)) option)) of + SOME ((w, s731_0)) => + (case ((string_drop s730_0 s731_0)) of s_ => SOME (i, o1, r, w, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((fence_bits_matches_prefix:string ->((4)words$word#int)option) arg_= + (let s732_0 = arg_ in + if ((case ((s722_ s732_0 : (( 1 words$word # 1 words$word # 1 words$word # 1 words$word # string))option)) of + SOME ((i, o1, r, w, s_)) => T + | _ => F + )) then (case + (s722_ s732_0 : (( 1 words$word # 1 words$word # 1 words$word # 1 words$word # string)) option) of + (SOME ((i, o1, r, w, s_))) => + SOME + ((concat_vec i + ((concat_vec o1 ((concat_vec r w : 2 words$word)) : 3 words$word)) : 4 words$word), + ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val aqrl_str : bool -> bool -> string*) + +val _ = Define ` + ((aqrl_str:bool -> bool -> string) (aq : bool) (rl : bool)= + ((case (aq, rl) of + (F, F) => "" + | (F, T) => ".rl" + | (T, F) => ".aq" + | (T, T) => ".aqrl" + )))`; + + +(*val lrsc_width_str : word_width -> string*) + +val _ = Define ` + ((lrsc_width_str:word_width -> string) width= + ((case width of BYTE => ".b" | HALF => ".h" | WORD => ".w" | DOUBLE => ".d" )))`; + + +(*val process_loadres : forall 'int8_times_n. Size 'int8_times_n => mword ty5 -> mword ty32 -> MemoryOpResult (mword 'int8_times_n) -> bool -> M Retired*) + +val _ = Define ` + ((process_loadres:(5)words$word ->(32)words$word ->('int8_times_n words$word)MemoryOpResult -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rd addr value is_unsigned= + ((case ((extend_value is_unsigned value : ( 32 words$word) MemoryOpResult)) of + MemValue (result) => + let (_ : unit) = (load_reservation addr) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) result) (sail2_state_monad$returnS RETIRE_SUCCESS) + | MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + )))`; + + +(*val encdec_amoop_forwards : amoop -> mword ty5*) + +val _ = Define ` + ((encdec_amoop_forwards:amoop ->(5)words$word) arg_= + ((case arg_ of + AMOSWAP => (vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word) + | AMOADD => (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + | AMOXOR => (vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word) + | AMOAND => (vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word) + | AMOOR => (vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word) + | AMOMIN => (vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word) + | AMOMAX => (vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word) + | AMOMINU => (vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word) + | AMOMAXU => (vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word) + )))`; + + +(*val encdec_amoop_backwards : mword ty5 -> M amoop*) + +val _ = Define ` + ((encdec_amoop_backwards:(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((amoop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word)))))) + then + sail2_state_monad$returnS AMOSWAP + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOADD + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOXOR + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOAND + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOOR + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOMIN + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOMAX + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOMINU + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word)))))) then + sail2_state_monad$returnS AMOMAXU + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val encdec_amoop_forwards_matches : amoop -> bool*) + +val _ = Define ` + ((encdec_amoop_forwards_matches:amoop -> bool) arg_= + ((case arg_ of + AMOSWAP => T + | AMOADD => T + | AMOXOR => T + | AMOAND => T + | AMOOR => T + | AMOMIN => T + | AMOMAX => T + | AMOMINU => T + | AMOMAXU => T + )))`; + + +(*val encdec_amoop_backwards_matches : mword ty5 -> bool*) + +val _ = Define ` + ((encdec_amoop_backwards_matches:(5)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : 5 words$word)))))) + then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : 5 words$word)))))) then + T + else if (((((regidx_to_regno b__0)) = ((regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : 5 words$word)))))) then + T + else F))`; + + +(*val amo_mnemonic_forwards : amoop -> string*) + +val _ = Define ` + ((amo_mnemonic_forwards:amoop -> string) arg_= + ((case arg_ of + AMOSWAP => "amoswap" + | AMOADD => "amoadd" + | AMOXOR => "amoxor" + | AMOAND => "amoand" + | AMOOR => "amoor" + | AMOMIN => "amomin" + | AMOMAX => "amomax" + | AMOMINU => "amominu" + | AMOMAXU => "amomaxu" + )))`; + + +(*val amo_mnemonic_backwards : string -> M amoop*) + +val _ = Define ` + ((amo_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((amoop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "amoswap"))) then sail2_state_monad$returnS AMOSWAP + else if (((p0_ = "amoadd"))) then sail2_state_monad$returnS AMOADD + else if (((p0_ = "amoxor"))) then sail2_state_monad$returnS AMOXOR + else if (((p0_ = "amoand"))) then sail2_state_monad$returnS AMOAND + else if (((p0_ = "amoor"))) then sail2_state_monad$returnS AMOOR + else if (((p0_ = "amomin"))) then sail2_state_monad$returnS AMOMIN + else if (((p0_ = "amomax"))) then sail2_state_monad$returnS AMOMAX + else if (((p0_ = "amominu"))) then sail2_state_monad$returnS AMOMINU + else if (((p0_ = "amomaxu"))) then sail2_state_monad$returnS AMOMAXU + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val amo_mnemonic_forwards_matches : amoop -> bool*) + +val _ = Define ` + ((amo_mnemonic_forwards_matches:amoop -> bool) arg_= + ((case arg_ of + AMOSWAP => T + | AMOADD => T + | AMOXOR => T + | AMOAND => T + | AMOOR => T + | AMOMIN => T + | AMOMAX => T + | AMOMINU => T + | AMOMAXU => T + )))`; + + +(*val amo_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((amo_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "amoswap"))) then T + else if (((p0_ = "amoadd"))) then T + else if (((p0_ = "amoxor"))) then T + else if (((p0_ = "amoand"))) then T + else if (((p0_ = "amoor"))) then T + else if (((p0_ = "amomin"))) then T + else if (((p0_ = "amomax"))) then T + else if (((p0_ = "amominu"))) then T + else if (((p0_ = "amomaxu"))) then T + else F))`; + + +(*val amo_mnemonic_matches_prefix : string -> maybe ((amoop * ii))*) + +(*val _s765_ : string -> maybe string*) + +val _ = Define ` + ((s765_:string ->(string)option) s766_0= + (let s767_0 = s766_0 in + if ((string_startswith s767_0 "amomaxu")) then + (case ((string_drop s767_0 ((string_length "amomaxu")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s761_ : string -> maybe string*) + +val _ = Define ` + ((s761_:string ->(string)option) s762_0= + (let s763_0 = s762_0 in + if ((string_startswith s763_0 "amominu")) then + (case ((string_drop s763_0 ((string_length "amominu")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s757_ : string -> maybe string*) + +val _ = Define ` + ((s757_:string ->(string)option) s758_0= + (let s759_0 = s758_0 in + if ((string_startswith s759_0 "amomax")) then + (case ((string_drop s759_0 ((string_length "amomax")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s753_ : string -> maybe string*) + +val _ = Define ` + ((s753_:string ->(string)option) s754_0= + (let s755_0 = s754_0 in + if ((string_startswith s755_0 "amomin")) then + (case ((string_drop s755_0 ((string_length "amomin")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s749_ : string -> maybe string*) + +val _ = Define ` + ((s749_:string ->(string)option) s750_0= + (let s751_0 = s750_0 in + if ((string_startswith s751_0 "amoor")) then + (case ((string_drop s751_0 ((string_length "amoor")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s745_ : string -> maybe string*) + +val _ = Define ` + ((s745_:string ->(string)option) s746_0= + (let s747_0 = s746_0 in + if ((string_startswith s747_0 "amoand")) then + (case ((string_drop s747_0 ((string_length "amoand")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s741_ : string -> maybe string*) + +val _ = Define ` + ((s741_:string ->(string)option) s742_0= + (let s743_0 = s742_0 in + if ((string_startswith s743_0 "amoxor")) then + (case ((string_drop s743_0 ((string_length "amoxor")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s737_ : string -> maybe string*) + +val _ = Define ` + ((s737_:string ->(string)option) s738_0= + (let s739_0 = s738_0 in + if ((string_startswith s739_0 "amoadd")) then + (case ((string_drop s739_0 ((string_length "amoadd")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s733_ : string -> maybe string*) + +val _ = Define ` + ((s733_:string ->(string)option) s734_0= + (let s735_0 = s734_0 in + if ((string_startswith s735_0 "amoswap")) then + (case ((string_drop s735_0 ((string_length "amoswap")))) of + s_ => SOME s_ + ) + else NONE))`; + + +val _ = Define ` + ((amo_mnemonic_matches_prefix:string ->(amoop#int)option) arg_= + (let s736_0 = arg_ in + if ((case ((s733_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s733_ s736_0 of + (SOME (s_)) => + SOME (AMOSWAP, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s737_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s737_ s736_0 of + (SOME (s_)) => + SOME (AMOADD, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s741_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s741_ s736_0 of + (SOME (s_)) => + SOME (AMOXOR, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s745_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s745_ s736_0 of + (SOME (s_)) => + SOME (AMOAND, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s749_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s749_ s736_0 of + (SOME (s_)) => + SOME (AMOOR, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s753_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s753_ s736_0 of + (SOME (s_)) => + SOME (AMOMIN, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s757_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s757_ s736_0 of + (SOME (s_)) => + SOME (AMOMAX, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s761_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s761_ s736_0 of + (SOME (s_)) => + SOME (AMOMINU, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s765_ s736_0)) of SOME (s_) => T | _ => F )) then + (case s765_ s736_0 of + (SOME (s_)) => + SOME (AMOMAXU, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val encdec_mul_op_forwards : (bool * bool * bool) -> mword ty3*) + +val _ = Define ` + ((encdec_mul_op_forwards:bool#bool#bool ->(3)words$word) arg_= + ((case arg_ of + (F, T, T) => (vec_of_bits [B0;B0;B0] : 3 words$word) + | (T, T, T) => (vec_of_bits [B0;B0;B1] : 3 words$word) + | (T, T, F) => (vec_of_bits [B0;B1;B0] : 3 words$word) + | (T, F, F) => (vec_of_bits [B0;B1;B1] : 3 words$word) + )))`; + + +(*val encdec_mul_op_backwards : mword ty3 -> M (bool * bool * bool)*) + +val _ = Define ` + ((encdec_mul_op_backwards:(3)words$word ->(regstate)sail2_state_monad$sequential_state ->(((bool#bool#bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then sail2_state_monad$returnS (F, T, T) + else if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then sail2_state_monad$returnS (T, T, T) + else if (((b__0 = (vec_of_bits [B0;B1;B0] : 3 words$word)))) then sail2_state_monad$returnS (T, T, F) + else if (((b__0 = (vec_of_bits [B0;B1;B1] : 3 words$word)))) then sail2_state_monad$returnS (T, F, F) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val encdec_mul_op_forwards_matches : (bool * bool * bool) -> bool*) + +val _ = Define ` + ((encdec_mul_op_forwards_matches:bool#bool#bool -> bool) arg_= + ((case arg_ of + (F, T, T) => T + | (T, T, T) => T + | (T, T, F) => T + | (T, F, F) => T + | _ => F + )))`; + + +(*val encdec_mul_op_backwards_matches : mword ty3 -> bool*) + +val _ = Define ` + ((encdec_mul_op_backwards_matches:(3)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B0;B1] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B1;B0] : 3 words$word)))) then T + else if (((b__0 = (vec_of_bits [B0;B1;B1] : 3 words$word)))) then T + else F))`; + + +(*val mul_mnemonic_forwards : (bool * bool * bool) -> string*) + +val _ = Define ` + ((mul_mnemonic_forwards:bool#bool#bool -> string) arg_= + ((case arg_ of + (F, T, T) => "mul" + | (T, T, T) => "mulh" + | (T, T, F) => "mulhsu" + | (T, F, F) => "mulhu" + )))`; + + +(*val mul_mnemonic_backwards : string -> M (bool * bool * bool)*) + +val _ = Define ` + ((mul_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((bool#bool#bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "mul"))) then sail2_state_monad$returnS (F, T, T) + else if (((p0_ = "mulh"))) then sail2_state_monad$returnS (T, T, T) + else if (((p0_ = "mulhsu"))) then sail2_state_monad$returnS (T, T, F) + else if (((p0_ = "mulhu"))) then sail2_state_monad$returnS (T, F, F) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val mul_mnemonic_forwards_matches : (bool * bool * bool) -> bool*) + +val _ = Define ` + ((mul_mnemonic_forwards_matches:bool#bool#bool -> bool) arg_= + ((case arg_ of + (F, T, T) => T + | (T, T, T) => T + | (T, T, F) => T + | (T, F, F) => T + | _ => F + )))`; + + +(*val mul_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((mul_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "mul"))) then T + else if (((p0_ = "mulh"))) then T + else if (((p0_ = "mulhsu"))) then T + else if (((p0_ = "mulhu"))) then T + else F))`; + + +(*val mul_mnemonic_matches_prefix : string -> maybe (((bool * bool * bool) * ii))*) + +(*val _s781_ : string -> maybe string*) + +val _ = Define ` + ((s781_:string ->(string)option) s782_0= + (let s783_0 = s782_0 in + if ((string_startswith s783_0 "mulhu")) then + (case ((string_drop s783_0 ((string_length "mulhu")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s777_ : string -> maybe string*) + +val _ = Define ` + ((s777_:string ->(string)option) s778_0= + (let s779_0 = s778_0 in + if ((string_startswith s779_0 "mulhsu")) then + (case ((string_drop s779_0 ((string_length "mulhsu")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s773_ : string -> maybe string*) + +val _ = Define ` + ((s773_:string ->(string)option) s774_0= + (let s775_0 = s774_0 in + if ((string_startswith s775_0 "mulh")) then + (case ((string_drop s775_0 ((string_length "mulh")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s769_ : string -> maybe string*) + +val _ = Define ` + ((s769_:string ->(string)option) s770_0= + (let s771_0 = s770_0 in + if ((string_startswith s771_0 "mul")) then + (case ((string_drop s771_0 ((string_length "mul")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((mul_mnemonic_matches_prefix:string ->((bool#bool#bool)#int)option) arg_= + (let s772_0 = arg_ in + if ((case ((s769_ s772_0)) of SOME (s_) => T | _ => F )) then + (case s769_ s772_0 of + (SOME (s_)) => + SOME ((F, T, T), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s773_ s772_0)) of SOME (s_) => T | _ => F )) then + (case s773_ s772_0 of + (SOME (s_)) => + SOME ((T, T, T), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s777_ s772_0)) of SOME (s_) => T | _ => F )) then + (case s777_ s772_0 of + (SOME (s_)) => + SOME ((T, T, F), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s781_ s772_0)) of SOME (s_) => T | _ => F )) then + (case s781_ s772_0 of + (SOME (s_)) => + SOME ((T, F, F), ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val maybe_not_u_forwards : bool -> string*) + +val _ = Define ` + ((maybe_not_u_forwards:bool -> string) arg_= ((case arg_ of F => "u" | T => "" )))`; + + +(*val maybe_not_u_backwards : string -> M bool*) + +val _ = Define ` + ((maybe_not_u_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "u"))) then sail2_state_monad$returnS F + else if (((p0_ = ""))) then sail2_state_monad$returnS T + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val maybe_not_u_forwards_matches : bool -> bool*) + +val _ = Define ` + ((maybe_not_u_forwards_matches:bool -> bool) arg_= + ((case arg_ of F => T | T => T )))`; + + +(*val maybe_not_u_backwards_matches : string -> bool*) + +val _ = Define ` + ((maybe_not_u_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "u"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val maybe_not_u_matches_prefix : string -> maybe ((bool * ii))*) + +(*val _s789_ : string -> maybe string*) + +val _ = Define ` + ((s789_:string ->(string)option) s790_0= + (let s791_0 = s790_0 in + if ((string_startswith s791_0 "")) then + (case ((string_drop s791_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s785_ : string -> maybe string*) + +val _ = Define ` + ((s785_:string ->(string)option) s786_0= + (let s787_0 = s786_0 in + if ((string_startswith s787_0 "u")) then + (case ((string_drop s787_0 ((string_length "u")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((maybe_not_u_matches_prefix:string ->(bool#int)option) arg_= + (let s788_0 = arg_ in + if ((case ((s785_ s788_0)) of SOME (s_) => T | _ => F )) then + (case s785_ s788_0 of + (SOME (s_)) => + SOME (F, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s789_ s788_0)) of SOME (s_) => T | _ => F )) then + (case s789_ s788_0 of + (SOME (s_)) => + SOME (T, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val encdec_csrop_forwards : csrop -> mword ty2*) + +val _ = Define ` + ((encdec_csrop_forwards:csrop ->(2)words$word) arg_= + ((case arg_ of + CSRRW => (vec_of_bits [B0;B1] : 2 words$word) + | CSRRS => (vec_of_bits [B1;B0] : 2 words$word) + | CSRRC => (vec_of_bits [B1;B1] : 2 words$word) + )))`; + + +(*val encdec_csrop_backwards : mword ty2 -> M csrop*) + +val _ = Define ` + ((encdec_csrop_backwards:(2)words$word ->(regstate)sail2_state_monad$sequential_state ->(((csrop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then sail2_state_monad$returnS CSRRW + else if (((b__0 = (vec_of_bits [B1;B0] : 2 words$word)))) then sail2_state_monad$returnS CSRRS + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then sail2_state_monad$returnS CSRRC + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val encdec_csrop_forwards_matches : csrop -> bool*) + +val _ = Define ` + ((encdec_csrop_forwards_matches:csrop -> bool) arg_= + ((case arg_ of CSRRW => T | CSRRS => T | CSRRC => T )))`; + + +(*val encdec_csrop_backwards_matches : mword ty2 -> bool*) + +val _ = Define ` + ((encdec_csrop_backwards_matches:(2)words$word -> bool) arg_= + (let b__0 = arg_ in + if (((b__0 = (vec_of_bits [B0;B1] : 2 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B0] : 2 words$word)))) then T + else if (((b__0 = (vec_of_bits [B1;B1] : 2 words$word)))) then T + else F))`; + + +(*val readCSR : mword ty12 -> M (mword ty32)*) + +val _ = Define ` + ((readCSR:(12)words$word ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) csr= (sail2_state_monad$bindS + (case (csr, (( 32 : int):ii)) of + (b__0, g__3) => + if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mvendorid_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + sail2_state_monad$returnS ((EXTZ (( 32 : int):ii) w__0 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS marchid_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B1;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS mimpid_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B1;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS mhartid_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__4 : Mstatus) . + sail2_state_monad$returnS ((get_Mstatus_bits w__4 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__5 : Misa) . sail2_state_monad$returnS ((get_Misa_bits w__5 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS medeleg_ref) (\ (w__6 : Medeleg) . + sail2_state_monad$returnS ((get_Medeleg_bits w__6 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__7 : Minterrupts) . + sail2_state_monad$returnS ((get_Minterrupts_bits w__7 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__8 : Minterrupts) . + sail2_state_monad$returnS ((get_Minterrupts_bits w__8 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + (get_mtvec () : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcounteren_ref) (\ (w__10 : Counteren) . + sail2_state_monad$returnS ((EXTZ (( 32 : int):ii) ((get_Counteren_bits w__10 : 32 words$word)) : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS mscratch_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (get_xret_target Machine : ( 32 words$word) M) (\ (w__12 : 32 words$word) . sail2_state_monad$bindS + (pc_alignment_mask () : ( 32 words$word) M) (\ (w__13 : 32 words$word) . + sail2_state_monad$returnS ((and_vec w__12 w__13 : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcause_ref) (\ (w__14 : Mcause) . + sail2_state_monad$returnS ((get_Mcause_bits w__14 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS mtval_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__16 : Minterrupts) . + sail2_state_monad$returnS ((get_Minterrupts_bits w__16 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then + (pmpReadCfgReg (( 0 : int):ii) : ( 32 words$word) M) + else if ((((((g__3 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word))))))) + then + (pmpReadCfgReg (( 1 : int):ii) : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word)))) then + (pmpReadCfgReg (( 2 : int):ii) : ( 32 words$word) M) + else if ((((((g__3 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word))))))) + then + (pmpReadCfgReg (( 3 : int):ii) : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr0_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr1_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr2_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr3_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr4_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr5_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr6_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr7_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr8_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr9_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr10_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr11_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr12_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr13_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr14_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS pmpaddr15_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__37 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__37 (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) : 32 words$word))) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_ref : ( 64 words$word) M) (\ (w__38 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__38 (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) : 32 words$word))) + else if ((((((g__3 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__39 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__39 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word))) + else if ((((((g__3 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_ref : ( 64 words$word) M) (\ (w__40 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__40 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS tselect_ref : ( 32 words$word) M) (\ (w__41 : 32 words$word) . + sail2_state_monad$returnS ((not_vec w__41 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__42 : Mstatus) . + sail2_state_monad$returnS ((get_Sstatus_bits ((lower_mstatus w__42)) : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS sedeleg_ref) (\ (w__43 : Sedeleg) . + sail2_state_monad$returnS ((get_Sedeleg_bits w__43 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS sideleg_ref) (\ (w__44 : Sinterrupts) . + sail2_state_monad$returnS ((get_Sinterrupts_bits w__44 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__45 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__46 : Minterrupts) . + sail2_state_monad$returnS ((get_Sinterrupts_bits ((lower_mie w__45 w__46)) : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then + (get_stvec () : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS scounteren_ref) (\ (w__48 : Counteren) . + sail2_state_monad$returnS ((EXTZ (( 32 : int):ii) ((get_Counteren_bits w__48 : 32 words$word)) : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS sscratch_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (get_xret_target Supervisor : ( 32 words$word) M) (\ (w__50 : 32 words$word) . sail2_state_monad$bindS + (pc_alignment_mask () : ( 32 words$word) M) (\ (w__51 : 32 words$word) . + sail2_state_monad$returnS ((and_vec w__50 w__51 : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS scause_ref) (\ (w__52 : Mcause) . + sail2_state_monad$returnS ((get_Mcause_bits w__52 : 32 words$word))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then + (sail2_state_monad$read_regS stval_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__54 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__55 : Minterrupts) . + sail2_state_monad$returnS ((get_Sinterrupts_bits ((lower_mip w__54 w__55)) : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then + (sail2_state_monad$read_regS satp_ref : ( 32 words$word) M) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__57 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__57 (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) : 32 words$word))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__58 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__58 (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) : 32 words$word))) + else if (((b__0 = (vec_of_bits [B1;B1;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_ref : ( 64 words$word) M) (\ (w__59 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__59 (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) : 32 words$word))) + else if ((((((g__3 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__60 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__60 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word))) + else if ((((((g__3 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] : 12 words$word))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS mtime_ref : ( 64 words$word) M) (\ (w__61 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__61 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word))) + else if ((((((g__3 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_ref : ( 64 words$word) M) (\ (w__62 : 64 words$word) . + sail2_state_monad$returnS ((subrange_vec_dec w__62 (( 63 : int):ii) (( 32 : int):ii) : 32 words$word))) + else sail2_state_monad$bindS + (ext_read_CSR csr : ( ( 32 words$word)option) M) (\ (w__63 : ( 32 words$word)option) . + sail2_state_monad$returnS ((case w__63 of + SOME (res) => res + | NONE => + let (_ : unit) = (print_bits0 "unhandled read to CSR " csr) in + (EXTZ (( 32 : int):ii) (vec_of_bits [B0;B0;B0;B0] : 4 words$word) : 32 words$word) + ))) + ) (\ (res : xlenbits) . + let (_ : unit) = + (if ((get_config_print_reg () )) then + print_dbg + ((STRCAT "CSR " + ((STRCAT ((csr_name csr)) ((STRCAT " -> " ((string_of_bits res)))))))) + else () ) in + sail2_state_monad$returnS res)))`; + + +(*val writeCSR : mword ty12 -> mword ty32 -> M unit*) + +val _ = Define ` + ((writeCSR:(12)words$word ->(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) (csr : csreg) (value : xlenbits)= (sail2_state_monad$bindS + (case (csr, (( 32 : int):ii)) of + (b__0, g__2) => + if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__0 : Mstatus) . sail2_state_monad$bindS + (legalize_mstatus w__0 value) (\ (w__1 : Mstatus) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mstatus_ref w__1) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__2 : Mstatus) . + sail2_state_monad$returnS (SOME ((get_Mstatus_bits w__2 : 32 words$word)))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS misa_ref) (\ (w__3 : Misa) . sail2_state_monad$bindS + (legalize_misa w__3 value) (\ (w__4 : Misa) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS misa_ref w__4) + (sail2_state_monad$read_regS misa_ref)) (\ (w__5 : Misa) . + sail2_state_monad$returnS (SOME ((get_Misa_bits w__5 : 32 words$word)))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS medeleg_ref) (\ (w__6 : Medeleg) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS medeleg_ref ((legalize_medeleg w__6 value))) + (sail2_state_monad$read_regS medeleg_ref)) (\ (w__7 : Medeleg) . + sail2_state_monad$returnS (SOME ((get_Medeleg_bits w__7 : 32 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__8 : Minterrupts) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mideleg_ref ((legalize_mideleg w__8 value))) + (sail2_state_monad$read_regS mideleg_ref)) (\ (w__9 : Minterrupts) . + sail2_state_monad$returnS (SOME ((get_Minterrupts_bits w__9 : 32 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__10 : Minterrupts) . sail2_state_monad$bindS + (legalize_mie w__10 value) (\ (w__11 : Minterrupts) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mie_ref w__11) + (sail2_state_monad$read_regS mie_ref)) (\ (w__12 : Minterrupts) . + sail2_state_monad$returnS (SOME ((get_Minterrupts_bits w__12 : 32 words$word)))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (set_mtvec value : ( 32 words$word) M) (\ (w__13 : 32 words$word) . sail2_state_monad$returnS (SOME w__13)) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcounteren_ref) (\ (w__14 : Counteren) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mcounteren_ref ((legalize_mcounteren w__14 value))) + (sail2_state_monad$read_regS mcounteren_ref)) (\ (w__15 : Counteren) . + sail2_state_monad$returnS (SOME ((EXTZ (( 32 : int):ii) ((get_Counteren_bits w__15 : 32 words$word)) : 32 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mscratch_ref value) + (sail2_state_monad$read_regS mscratch_ref : ( 32 words$word) M)) (\ (w__16 : 32 words$word) . + sail2_state_monad$returnS (SOME w__16)) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (set_xret_target Machine value : ( 32 words$word) M) (\ (w__17 : 32 words$word) . + sail2_state_monad$returnS (SOME w__17)) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (set_Mcause_bits mcause_ref value) + (sail2_state_monad$read_regS mcause_ref)) (\ (w__18 : Mcause) . + sail2_state_monad$returnS (SOME ((get_Mcause_bits w__18 : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mtval_ref value) + (sail2_state_monad$read_regS mtval_ref : ( 32 words$word) M)) (\ (w__19 : 32 words$word) . sail2_state_monad$returnS (SOME w__19)) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__20 : Minterrupts) . sail2_state_monad$bindS + (legalize_mip w__20 value) (\ (w__21 : Minterrupts) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mip_ref w__21) + (sail2_state_monad$read_regS mip_ref)) (\ (w__22 : Minterrupts) . + sail2_state_monad$returnS (SOME ((get_Minterrupts_bits w__22 : 32 words$word)))))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$seqS + (pmpWriteCfgReg (( 0 : int):ii) value) (sail2_state_monad$returnS (SOME value)) + else if ((((((g__2 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] : 12 words$word))))))) + then sail2_state_monad$seqS + (pmpWriteCfgReg (( 1 : int):ii) value) (sail2_state_monad$returnS (SOME value)) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$seqS + (pmpWriteCfgReg (( 2 : int):ii) value) (sail2_state_monad$returnS (SOME value)) + else if ((((((g__2 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] : 12 words$word))))))) + then sail2_state_monad$seqS + (pmpWriteCfgReg (( 3 : int):ii) value) (sail2_state_monad$returnS (SOME value)) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp0cfg_ref) (\ (w__23 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr0_ref : ( 32 words$word) M) (\ (w__24 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr0_ref ((pmpWriteAddr w__23 w__24 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr0_ref : ( 32 words$word) M)) (\ (w__25 : 32 words$word) . + sail2_state_monad$returnS (SOME w__25)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp1cfg_ref) (\ (w__26 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr1_ref : ( 32 words$word) M) (\ (w__27 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr1_ref ((pmpWriteAddr w__26 w__27 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr1_ref : ( 32 words$word) M)) (\ (w__28 : 32 words$word) . + sail2_state_monad$returnS (SOME w__28)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp2cfg_ref) (\ (w__29 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr2_ref : ( 32 words$word) M) (\ (w__30 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr2_ref ((pmpWriteAddr w__29 w__30 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr2_ref : ( 32 words$word) M)) (\ (w__31 : 32 words$word) . + sail2_state_monad$returnS (SOME w__31)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp3cfg_ref) (\ (w__32 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr3_ref : ( 32 words$word) M) (\ (w__33 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr3_ref ((pmpWriteAddr w__32 w__33 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr3_ref : ( 32 words$word) M)) (\ (w__34 : 32 words$word) . + sail2_state_monad$returnS (SOME w__34)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp4cfg_ref) (\ (w__35 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr4_ref : ( 32 words$word) M) (\ (w__36 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr4_ref ((pmpWriteAddr w__35 w__36 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr4_ref : ( 32 words$word) M)) (\ (w__37 : 32 words$word) . + sail2_state_monad$returnS (SOME w__37)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp5cfg_ref) (\ (w__38 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr5_ref : ( 32 words$word) M) (\ (w__39 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr5_ref ((pmpWriteAddr w__38 w__39 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr5_ref : ( 32 words$word) M)) (\ (w__40 : 32 words$word) . + sail2_state_monad$returnS (SOME w__40)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp6cfg_ref) (\ (w__41 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr6_ref : ( 32 words$word) M) (\ (w__42 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr6_ref ((pmpWriteAddr w__41 w__42 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr6_ref : ( 32 words$word) M)) (\ (w__43 : 32 words$word) . + sail2_state_monad$returnS (SOME w__43)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B1;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp7cfg_ref) (\ (w__44 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr7_ref : ( 32 words$word) M) (\ (w__45 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr7_ref ((pmpWriteAddr w__44 w__45 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr7_ref : ( 32 words$word) M)) (\ (w__46 : 32 words$word) . + sail2_state_monad$returnS (SOME w__46)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp8cfg_ref) (\ (w__47 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr8_ref : ( 32 words$word) M) (\ (w__48 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr8_ref ((pmpWriteAddr w__47 w__48 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr8_ref : ( 32 words$word) M)) (\ (w__49 : 32 words$word) . + sail2_state_monad$returnS (SOME w__49)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp9cfg_ref) (\ (w__50 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr9_ref : ( 32 words$word) M) (\ (w__51 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr9_ref ((pmpWriteAddr w__50 w__51 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr9_ref : ( 32 words$word) M)) (\ (w__52 : 32 words$word) . + sail2_state_monad$returnS (SOME w__52)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp10cfg_ref) (\ (w__53 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr10_ref : ( 32 words$word) M) (\ (w__54 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr10_ref ((pmpWriteAddr w__53 w__54 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr10_ref : ( 32 words$word) M)) (\ (w__55 : 32 words$word) . + sail2_state_monad$returnS (SOME w__55)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp11cfg_ref) (\ (w__56 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr11_ref : ( 32 words$word) M) (\ (w__57 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr11_ref ((pmpWriteAddr w__56 w__57 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr11_ref : ( 32 words$word) M)) (\ (w__58 : 32 words$word) . + sail2_state_monad$returnS (SOME w__58)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp12cfg_ref) (\ (w__59 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr12_ref : ( 32 words$word) M) (\ (w__60 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr12_ref ((pmpWriteAddr w__59 w__60 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr12_ref : ( 32 words$word) M)) (\ (w__61 : 32 words$word) . + sail2_state_monad$returnS (SOME w__61)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp13cfg_ref) (\ (w__62 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr13_ref : ( 32 words$word) M) (\ (w__63 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr13_ref ((pmpWriteAddr w__62 w__63 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr13_ref : ( 32 words$word) M)) (\ (w__64 : 32 words$word) . + sail2_state_monad$returnS (SOME w__64)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp14cfg_ref) (\ (w__65 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr14_ref : ( 32 words$word) M) (\ (w__66 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr14_ref ((pmpWriteAddr w__65 w__66 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr14_ref : ( 32 words$word) M)) (\ (w__67 : 32 words$word) . + sail2_state_monad$returnS (SOME w__67)))) + else if (((b__0 = (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B1;B1;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS pmp15cfg_ref) (\ (w__68 : Pmpcfg_ent) . sail2_state_monad$bindS + (sail2_state_monad$read_regS pmpaddr15_ref : ( 32 words$word) M) (\ (w__69 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS pmpaddr15_ref ((pmpWriteAddr w__68 w__69 value : 32 words$word))) + (sail2_state_monad$read_regS pmpaddr15_ref : ( 32 words$word) M)) (\ (w__70 : 32 words$word) . + sail2_state_monad$returnS (SOME w__70)))) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__71 : 64 words$word) . sail2_state_monad$seqS + (sail2_state_monad$write_regS + mcycle_ref + ((update_subrange_vec_dec w__71 (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) value : 64 words$word))) + (sail2_state_monad$returnS (SOME value))) + else if (((b__0 = (vec_of_bits [B1;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_ref : ( 64 words$word) M) (\ (w__72 : 64 words$word) . sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS + minstret_ref + ((update_subrange_vec_dec w__72 (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) value : 64 words$word))) + (sail2_state_monad$write_regS minstret_written_ref T)) (sail2_state_monad$returnS (SOME value))) + else if ((((((g__2 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS mcycle_ref : ( 64 words$word) M) (\ (w__73 : 64 words$word) . sail2_state_monad$seqS + (sail2_state_monad$write_regS mcycle_ref ((update_subrange_vec_dec w__73 (( 63 : int):ii) (( 32 : int):ii) value : 64 words$word))) + (sail2_state_monad$returnS (SOME value))) + else if ((((((g__2 = (( 32 : int):ii)))) /\ (((b__0 = (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] : 12 words$word))))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS minstret_ref : ( 64 words$word) M) (\ (w__74 : 64 words$word) . sail2_state_monad$seqS (sail2_state_monad$seqS + (sail2_state_monad$write_regS minstret_ref ((update_subrange_vec_dec w__74 (( 63 : int):ii) (( 32 : int):ii) value : 64 words$word))) + (sail2_state_monad$write_regS minstret_written_ref T)) (sail2_state_monad$returnS (SOME value))) + else if (((b__0 = (vec_of_bits [B0;B1;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS tselect_ref value) + (sail2_state_monad$read_regS tselect_ref : ( 32 words$word) M)) (\ (w__75 : 32 words$word) . sail2_state_monad$returnS (SOME w__75)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__76 : Mstatus) . sail2_state_monad$bindS + (legalize_sstatus w__76 value) (\ (w__77 : Mstatus) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mstatus_ref w__77) + (sail2_state_monad$read_regS mstatus_ref)) (\ (w__78 : Mstatus) . + sail2_state_monad$returnS (SOME ((get_Mstatus_bits w__78 : 32 words$word)))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS sedeleg_ref) (\ (w__79 : Sedeleg) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS sedeleg_ref ((legalize_sedeleg w__79 value))) + (sail2_state_monad$read_regS sedeleg_ref)) (\ (w__80 : Sedeleg) . + sail2_state_monad$returnS (SOME ((get_Sedeleg_bits w__80 : 32 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (set_Sinterrupts_bits sideleg_ref value) + (sail2_state_monad$read_regS sideleg_ref)) (\ (w__81 : Sinterrupts) . + sail2_state_monad$returnS (SOME ((get_Sinterrupts_bits w__81 : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mie_ref) (\ (w__82 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__83 : Minterrupts) . sail2_state_monad$bindS + (legalize_sie w__82 w__83 value) (\ (w__84 : Minterrupts) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mie_ref w__84) + (sail2_state_monad$read_regS mie_ref)) (\ (w__85 : Minterrupts) . + sail2_state_monad$returnS (SOME ((get_Minterrupts_bits w__85 : 32 words$word))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (set_stvec value : ( 32 words$word) M) (\ (w__86 : 32 words$word) . sail2_state_monad$returnS (SOME w__86)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS scounteren_ref) (\ (w__87 : Counteren) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS scounteren_ref ((legalize_scounteren w__87 value))) + (sail2_state_monad$read_regS scounteren_ref)) (\ (w__88 : Counteren) . + sail2_state_monad$returnS (SOME ((EXTZ (( 32 : int):ii) ((get_Counteren_bits w__88 : 32 words$word)) : 32 words$word))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS sscratch_ref value) + (sail2_state_monad$read_regS sscratch_ref : ( 32 words$word) M)) (\ (w__89 : 32 words$word) . + sail2_state_monad$returnS (SOME w__89)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B1] : 12 words$word)))) then sail2_state_monad$bindS + (set_xret_target Supervisor value : ( 32 words$word) M) (\ (w__90 : 32 words$word) . + sail2_state_monad$returnS (SOME w__90)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B0] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (set_Mcause_bits scause_ref value) + (sail2_state_monad$read_regS scause_ref)) (\ (w__91 : Mcause) . + sail2_state_monad$returnS (SOME ((get_Mcause_bits w__91 : 32 words$word)))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B1;B1] : 12 words$word)))) then sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS stval_ref value) + (sail2_state_monad$read_regS stval_ref : ( 32 words$word) M)) (\ (w__92 : 32 words$word) . sail2_state_monad$returnS (SOME w__92)) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B0;B1;B0;B0;B0;B1;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (sail2_state_monad$read_regS mip_ref) (\ (w__93 : Minterrupts) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mideleg_ref) (\ (w__94 : Minterrupts) . sail2_state_monad$bindS + (legalize_sip w__93 w__94 value) (\ (w__95 : Minterrupts) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS mip_ref w__95) + (sail2_state_monad$read_regS mip_ref)) (\ (w__96 : Minterrupts) . + sail2_state_monad$returnS (SOME ((get_Minterrupts_bits w__96 : 32 words$word))))))) + else if (((b__0 = (vec_of_bits [B0;B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0] : 12 words$word)))) then sail2_state_monad$bindS + (cur_Architecture () ) (\ (w__97 : Architecture) . sail2_state_monad$bindS + (sail2_state_monad$read_regS satp_ref : ( 32 words$word) M) (\ (w__98 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS satp_ref ((legalize_satp w__97 w__98 value : 32 words$word))) + (sail2_state_monad$read_regS satp_ref : ( 32 words$word) M)) (\ (w__99 : 32 words$word) . sail2_state_monad$returnS (SOME w__99)))) + else sail2_state_monad$returnS NONE + ) (\ (res : xlenbits option) . + (case res of + SOME (v) => + sail2_state_monad$returnS (if ((get_config_print_reg () )) then + print_dbg + ((STRCAT "CSR " + ((STRCAT ((csr_name csr)) + ((STRCAT " <- " + ((STRCAT ((string_of_bits v)) + ((STRCAT " (input: " + ((STRCAT ((string_of_bits value)) ")")))))))))))) + else () ) + | NONE => sail2_state_monad$bindS + (ext_write_CSR csr value) (\ (w__149 : bool) . + sail2_state_monad$returnS (if w__149 then () + else print_bits0 "unhandled write to CSR " csr)) + ))))`; + + +(*val maybe_i_forwards : bool -> string*) + +val _ = Define ` + ((maybe_i_forwards:bool -> string) arg_= ((case arg_ of T => "i" | F => "" )))`; + + +(*val maybe_i_backwards : string -> M bool*) + +val _ = Define ` + ((maybe_i_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "i"))) then sail2_state_monad$returnS T + else if (((p0_ = ""))) then sail2_state_monad$returnS F + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val maybe_i_forwards_matches : bool -> bool*) + +val _ = Define ` + ((maybe_i_forwards_matches:bool -> bool) arg_= + ((case arg_ of T => T | F => T )))`; + + +(*val maybe_i_backwards_matches : string -> bool*) + +val _ = Define ` + ((maybe_i_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "i"))) then T + else if (((p0_ = ""))) then T + else F))`; + + +(*val maybe_i_matches_prefix : string -> maybe ((bool * ii))*) + +(*val _s797_ : string -> maybe string*) + +val _ = Define ` + ((s797_:string ->(string)option) s798_0= + (let s799_0 = s798_0 in + if ((string_startswith s799_0 "")) then + (case ((string_drop s799_0 ((string_length "")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s793_ : string -> maybe string*) + +val _ = Define ` + ((s793_:string ->(string)option) s794_0= + (let s795_0 = s794_0 in + if ((string_startswith s795_0 "i")) then + (case ((string_drop s795_0 ((string_length "i")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((maybe_i_matches_prefix:string ->(bool#int)option) arg_= + (let s796_0 = arg_ in + if ((case ((s793_ s796_0)) of SOME (s_) => T | _ => F )) then + (case s793_ s796_0 of + (SOME (s_)) => + SOME (T, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s797_ s796_0)) of SOME (s_) => T | _ => F )) then + (case s797_ s796_0 of + (SOME (s_)) => + SOME (F, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val csr_mnemonic_forwards : csrop -> string*) + +val _ = Define ` + ((csr_mnemonic_forwards:csrop -> string) arg_= + ((case arg_ of CSRRW => "csrrw" | CSRRS => "csrrs" | CSRRC => "csrrc" )))`; + + +(*val csr_mnemonic_backwards : string -> M csrop*) + +val _ = Define ` + ((csr_mnemonic_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((csrop),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let p0_ = arg_ in + if (((p0_ = "csrrw"))) then sail2_state_monad$returnS CSRRW + else if (((p0_ = "csrrs"))) then sail2_state_monad$returnS CSRRS + else if (((p0_ = "csrrc"))) then sail2_state_monad$returnS CSRRC + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val csr_mnemonic_forwards_matches : csrop -> bool*) + +val _ = Define ` + ((csr_mnemonic_forwards_matches:csrop -> bool) arg_= + ((case arg_ of CSRRW => T | CSRRS => T | CSRRC => T )))`; + + +(*val csr_mnemonic_backwards_matches : string -> bool*) + +val _ = Define ` + ((csr_mnemonic_backwards_matches:string -> bool) arg_= + (let p0_ = arg_ in + if (((p0_ = "csrrw"))) then T + else if (((p0_ = "csrrs"))) then T + else if (((p0_ = "csrrc"))) then T + else F))`; + + +(*val csr_mnemonic_matches_prefix : string -> maybe ((csrop * ii))*) + +(*val _s809_ : string -> maybe string*) + +val _ = Define ` + ((s809_:string ->(string)option) s810_0= + (let s811_0 = s810_0 in + if ((string_startswith s811_0 "csrrc")) then + (case ((string_drop s811_0 ((string_length "csrrc")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s805_ : string -> maybe string*) + +val _ = Define ` + ((s805_:string ->(string)option) s806_0= + (let s807_0 = s806_0 in + if ((string_startswith s807_0 "csrrs")) then + (case ((string_drop s807_0 ((string_length "csrrs")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s801_ : string -> maybe string*) + +val _ = Define ` + ((s801_:string ->(string)option) s802_0= + (let s803_0 = s802_0 in + if ((string_startswith s803_0 "csrrw")) then + (case ((string_drop s803_0 ((string_length "csrrw")))) of s_ => SOME s_ ) + else NONE))`; + + +val _ = Define ` + ((csr_mnemonic_matches_prefix:string ->(csrop#int)option) arg_= + (let s804_0 = arg_ in + if ((case ((s801_ s804_0)) of SOME (s_) => T | _ => F )) then + (case s801_ s804_0 of + (SOME (s_)) => + SOME (CSRRW, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s805_ s804_0)) of SOME (s_) => T | _ => F )) then + (case s805_ s804_0 of + (SOME (s_)) => + SOME (CSRRS, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s809_ s804_0)) of SOME (s_) => T | _ => F )) then + (case s809_ s804_0 of + (SOME (s_)) => + SOME (CSRRC, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +(*val encdec_forwards : ast -> M (mword ty32)*) + +val _ = Define ` + ((encdec_forwards:ast ->(regstate)sail2_state_monad$sequential_state ->((((32)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + ((case arg_ of + UTYPE ((imm, rd, op)) => + sail2_state_monad$returnS ((concat_vec imm + ((concat_vec rd ((encdec_uop_forwards op : 7 words$word)) : 12 words$word)) + : 32 words$word)) + | RISCV_JAL ((v__2, rd)) => + if (((((subrange_vec_dec v__2 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) then + let (imm_19 : 1 bits) = ((subrange_vec_dec v__2 (( 20 : int):ii) (( 20 : int):ii) : 1 words$word)) in + let (imm_8 : 1 bits) = ((subrange_vec_dec v__2 (( 11 : int):ii) (( 11 : int):ii) : 1 words$word)) in + let (imm_7_0 : 8 bits) = ((subrange_vec_dec v__2 (( 19 : int):ii) (( 12 : int):ii) : 8 words$word)) in + let (imm_19 : 1 bits) = ((subrange_vec_dec v__2 (( 20 : int):ii) (( 20 : int):ii) : 1 words$word)) in + let (imm_18_13 : 6 bits) = ((subrange_vec_dec v__2 (( 10 : int):ii) (( 5 : int):ii) : 6 words$word)) in + let (imm_12_9 : 4 bits) = ((subrange_vec_dec v__2 (( 4 : int):ii) (( 1 : int):ii) : 4 words$word)) in + sail2_state_monad$returnS ((concat_vec imm_19 + ((concat_vec imm_18_13 + ((concat_vec imm_12_9 + ((concat_vec imm_8 + ((concat_vec imm_7_0 + ((concat_vec rd (vec_of_bits [B1;B1;B0;B1;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 20 words$word)) + : 21 words$word)) + : 25 words$word)) + : 31 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | RISCV_JALR ((imm, rs1, rd)) => + sail2_state_monad$returnS ((concat_vec imm + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B1;B1;B0;B0;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + | BTYPE ((v__4, rs2, rs1, op)) => + if (((((subrange_vec_dec v__4 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) then + let (imm7_6 : 1 bits) = ((subrange_vec_dec v__4 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (imm7_6 : 1 bits) = ((subrange_vec_dec v__4 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (imm7_5_0 : 6 bits) = ((subrange_vec_dec v__4 (( 10 : int):ii) (( 5 : int):ii) : 6 words$word)) in + let (imm5_4_1 : 4 bits) = ((subrange_vec_dec v__4 (( 4 : int):ii) (( 1 : int):ii) : 4 words$word)) in + let (imm5_0 : 1 bits) = ((subrange_vec_dec v__4 (( 11 : int):ii) (( 11 : int):ii) : 1 words$word)) in + sail2_state_monad$returnS ((concat_vec imm7_6 + ((concat_vec imm7_5_0 + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec ((encdec_bop_forwards op : 3 words$word)) + ((concat_vec imm5_4_1 + ((concat_vec imm5_0 + (vec_of_bits [B1;B1;B0;B0;B0;B1;B1] : 7 words$word) + : 8 words$word)) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 31 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | ITYPE ((imm, rs1, rd, op)) => + sail2_state_monad$returnS ((concat_vec imm + ((concat_vec rs1 + ((concat_vec ((encdec_iop_forwards op : 3 words$word)) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + | SHIFTIOP ((shamt, rs1, rd, RISCV_SLLI)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 26 words$word)) + : 32 words$word)) + | SHIFTIOP ((shamt, rs1, rd, RISCV_SRLI)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 26 words$word)) + : 32 words$word)) + | SHIFTIOP ((shamt, rs1, rd, RISCV_SRAI)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0;B0;B0;B0] : 6 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 26 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_ADD)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_SLT)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B1;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_SLTU)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B1;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_AND)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B1;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_OR)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B1;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_XOR)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_SLL)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_SRL)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_SUB)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | RTYPE ((rs2, rs1, rd, RISCV_SRA)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | LOAD ((imm, rs1, rd, is_unsigned, size1, F, F)) => + if (((((((word_width_bytes size1)) < (( 4 : int):ii))) \/ (((((~ is_unsigned)) /\ ((((word_width_bytes size1)) <= (( 4 : int):ii))))))))) then + sail2_state_monad$returnS ((concat_vec imm + ((concat_vec rs1 + ((concat_vec ((bool_bits_forwards is_unsigned : 1 words$word)) + ((concat_vec ((size_bits_forwards size1 : 2 words$word)) + ((concat_vec rd (vec_of_bits [B0;B0;B0;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 14 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | STORE ((v__6, rs2, rs1, size1, F, F)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then + let (imm7 : 7 bits) = ((subrange_vec_dec v__6 (( 11 : int):ii) (( 5 : int):ii) : 7 words$word)) in + let (imm7 : 7 bits) = ((subrange_vec_dec v__6 (( 11 : int):ii) (( 5 : int):ii) : 7 words$word)) in + let (imm5 : 5 bits) = ((subrange_vec_dec v__6 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec imm7 + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec ((size_bits_forwards size1 : 2 words$word)) + ((concat_vec imm5 + (vec_of_bits [B0;B1;B0;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 14 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | ADDIW ((imm, rs1, rd)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec imm + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | SHIFTW ((shamt, rs1, rd, RISCV_SLLI)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | SHIFTW ((shamt, rs1, rd, RISCV_SRLI)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | SHIFTW ((shamt, rs1, rd, RISCV_SRAI)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | RTYPEW ((rs2, rs1, rd, RISCV_ADDW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | RTYPEW ((rs2, rs1, rd, RISCV_SUBW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | RTYPEW ((rs2, rs1, rd, RISCV_SLLW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | RTYPEW ((rs2, rs1, rd, RISCV_SRLW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | RTYPEW ((rs2, rs1, rd, RISCV_SRAW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | SHIFTIWOP ((shamt, rs1, rd, RISCV_SLLIW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | SHIFTIWOP ((shamt, rs1, rd, RISCV_SRLIW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | SHIFTIWOP ((shamt, rs1, rd, RISCV_SRAIW)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec shamt + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | FENCE ((pred, succ)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0] : 4 words$word) + ((concat_vec pred + ((concat_vec succ + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B0;B0;B0;B1;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 24 words$word)) + : 28 words$word)) + : 32 words$word)) + | FENCE_TSO ((pred, succ)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0;B0] : 4 words$word) + ((concat_vec pred + ((concat_vec succ + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B0;B0;B0;B1;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 24 words$word)) + : 28 words$word)) + : 32 words$word)) + | FENCEI (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B0;B0;B0;B1;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + | ECALL (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + | MRET (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B1;B1;B0;B0;B0] : 7 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | SRET (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0;B0;B0] : 7 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | EBREAK (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 12 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + | WFI (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1] : 12 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + | SFENCE_VMA ((rs1, rs2)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0;B0;B1] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | LOADRES ((aq, rl, rs1, size1, rd)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word) + ((concat_vec ((bool_bits_forwards aq : 1 words$word)) + ((concat_vec ((bool_bits_forwards rl : 1 words$word)) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec ((size_bits_forwards size1 : 2 words$word)) + ((concat_vec rd + (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 14 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 26 words$word)) + : 27 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | STORECON ((aq, rl, rs2, rs1, size1, rd)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word) + ((concat_vec ((bool_bits_forwards aq : 1 words$word)) + ((concat_vec ((bool_bits_forwards rl : 1 words$word)) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec ((size_bits_forwards size1 : 2 words$word)) + ((concat_vec rd + (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 14 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 26 words$word)) + : 27 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | AMO ((op, aq, rl, rs2, rs1, size1, rd)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then + sail2_state_monad$returnS ((concat_vec ((encdec_amoop_forwards op : 5 words$word)) + ((concat_vec ((bool_bits_forwards aq : 1 words$word)) + ((concat_vec ((bool_bits_forwards rl : 1 words$word)) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec ((size_bits_forwards size1 : 2 words$word)) + ((concat_vec rd + (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word) + : 12 words$word)) + : 14 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 26 words$word)) + : 27 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | MUL ((rs2, rs1, rd, high, signed1, signed2)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec + ((encdec_mul_op_forwards (high, signed1, signed2) : 3 words$word)) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | DIV0 ((rs2, rs1, rd, s)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0] : 2 words$word) + ((concat_vec ((bool_not_bits_forwards s : 1 words$word)) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 13 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | REM ((rs2, rs1, rd, s)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec ((bool_not_bits_forwards s : 1 words$word)) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 13 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | MULW ((rs2, rs1, rd)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | DIVW ((rs2, rs1, rd, s)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B0] : 2 words$word) + ((concat_vec ((bool_not_bits_forwards s : 1 words$word)) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 13 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | REMW ((rs2, rs1, rd, s)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word) + ((concat_vec rs2 + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec ((bool_not_bits_forwards s : 1 words$word)) + ((concat_vec rd (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 13 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | CSR ((csr, rs1, rd, is_imm, op)) => + sail2_state_monad$returnS ((concat_vec csr + ((concat_vec rs1 + ((concat_vec ((bool_bits_forwards is_imm : 1 words$word)) + ((concat_vec ((encdec_csrop_forwards op : 2 words$word)) + ((concat_vec rd (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 14 words$word)) + : 15 words$word)) + : 20 words$word)) + : 32 words$word)) + | URET (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word) + : 12 words$word)) + : 15 words$word)) + : 20 words$word)) + : 25 words$word)) + : 32 words$word)) + | ILLEGAL (s) => sail2_state_monad$returnS s + | _ => sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + )))`; + + +(*val encdec_backwards : mword ty32 -> M ast*) + +val _ = Define ` + ((encdec_backwards:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((ast),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let v__7 = arg_ in + let (mappingpatterns_23_0 : 7 words$word) = ((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) in sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_uop_backwards_matches mappingpatterns_23_0))) + (if ((encdec_uop_backwards_matches mappingpatterns_23_0)) then sail2_state_monad$bindS + (encdec_uop_backwards mappingpatterns_23_0) (\ op . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) (\ (w__1 : bool) . + if w__1 then + let (imm : 20 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 12 : int):ii) : 20 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm : 20 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 12 : int):ii) : 20 words$word)) in + let (mappingpatterns_23_0 : 7 words$word) = ((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) in sail2_state_monad$bindS + (encdec_uop_backwards mappingpatterns_23_0) (\ op . sail2_state_monad$returnS (UTYPE (imm, rd, op))) + else if (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B0;B1;B1;B1;B1] : 7 words$word)))) then + let (imm_19 : 1 bits) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm_8 : 1 bits) = ((subrange_vec_dec v__7 (( 20 : int):ii) (( 20 : int):ii) : 1 words$word)) in + let (imm_7_0 : 8 bits) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 12 : int):ii) : 8 words$word)) in + let (imm_19 : 1 bits) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)) in + let (imm_18_13 : 6 bits) = ((subrange_vec_dec v__7 (( 30 : int):ii) (( 25 : int):ii) : 6 words$word)) in + let (imm_12_9 : 4 bits) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 21 : int):ii) : 4 words$word)) in + sail2_state_monad$returnS (RISCV_JAL ((concat_vec imm_19 + ((concat_vec imm_7_0 + ((concat_vec imm_8 + ((concat_vec imm_18_13 + ((concat_vec imm_12_9 (vec_of_bits [B0] : 1 words$word) + : 5 words$word)) + : 11 words$word)) + : 12 words$word)) + : 20 words$word)) + : 21 words$word), + rd)) + else if ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B0;B0;B1;B1;B1] : 7 words$word))))))) then + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + sail2_state_monad$returnS (RISCV_JALR (imm, rs1, rd)) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_24_0 : 3 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_bop_backwards_matches mappingpatterns_24_0))) + (if ((encdec_bop_backwards_matches mappingpatterns_24_0)) then sail2_state_monad$bindS + (encdec_bop_backwards mappingpatterns_24_0) (\ op . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B0;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__4 : bool) . + if w__4 then + let (imm7_6 : 1 bits) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)) in + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (imm7_6 : 1 bits) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 31 : int):ii) : 1 words$word)) in + let (imm7_5_0 : 6 bits) = ((subrange_vec_dec v__7 (( 30 : int):ii) (( 25 : int):ii) : 6 words$word)) in + let (imm5_4_1 : 4 bits) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 8 : int):ii) : 4 words$word)) in + let (imm5_0 : 1 bits) = ((subrange_vec_dec v__7 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)) in + let (mappingpatterns_24_0 : 3 words$word) = ((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in sail2_state_monad$bindS + (encdec_bop_backwards mappingpatterns_24_0) (\ op . + sail2_state_monad$returnS (BTYPE ((concat_vec imm7_6 + ((concat_vec imm5_0 + ((concat_vec imm7_5_0 + ((concat_vec imm5_4_1 (vec_of_bits [B0] : 1 words$word) : 5 words$word)) + : 11 words$word)) + : 12 words$word)) + : 13 words$word), + rs2, + rs1, + op))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_25_0 : 3 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_iop_backwards_matches mappingpatterns_25_0))) + (if ((encdec_iop_backwards_matches mappingpatterns_25_0)) then sail2_state_monad$bindS + (encdec_iop_backwards mappingpatterns_25_0) (\ op . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__7 : bool) . + if w__7 then + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (mappingpatterns_25_0 : 3 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in sail2_state_monad$bindS + (encdec_iop_backwards mappingpatterns_25_0) (\ op . sail2_state_monad$returnS (ITYPE (imm, rs1, rd, op))) + else if ((((let (shamt : 6 words$word) = ((subrange_vec_dec v__7 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + (((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((((bit_to_bool ((access_vec_dec shamt (( 5 : int):ii))))) = F))))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 26 : int):ii) : 6 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 6 words$word) = ((subrange_vec_dec v__7 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTIOP (shamt, rs1, rd, RISCV_SLLI)) + else if ((((let (shamt : 6 words$word) = ((subrange_vec_dec v__7 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + (((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((((bit_to_bool ((access_vec_dec shamt (( 5 : int):ii))))) = F))))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 26 : int):ii) : 6 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 6 words$word) = ((subrange_vec_dec v__7 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTIOP (shamt, rs1, rd, RISCV_SRLI)) + else if ((((let (shamt : 6 words$word) = ((subrange_vec_dec v__7 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + (((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((((bit_to_bool ((access_vec_dec shamt (( 5 : int):ii))))) = F))))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 26 : int):ii) : 6 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 6 words$word) = ((subrange_vec_dec v__7 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTIOP (shamt, rs1, rd, RISCV_SRAI)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_ADD)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_SLT)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_SLTU)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_AND)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_OR)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_XOR)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_SLL)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_SRL)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_SUB)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, RISCV_SRA)) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_27_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_26_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_27_0))) + (if ((size_bits_backwards_matches mappingpatterns_27_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_27_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_26_0))) + (if ((bool_bits_backwards_matches mappingpatterns_26_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_26_0) (\ is_unsigned . + sail2_state_monad$returnS (((((((word_width_bytes size1)) < (( 4 : int):ii))) \/ (((((~ is_unsigned)) /\ ((((word_width_bytes size1)) <= (( 4 : int):ii)))))))))) + else sail2_state_monad$returnS F)) (\ (w__9 : bool) . + sail2_state_monad$returnS w__9)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__12 : bool) . + if w__12 then + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (mappingpatterns_27_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_26_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_27_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_26_0) (\ is_unsigned . + sail2_state_monad$returnS (LOAD (imm, rs1, rd, is_unsigned, size1, F, F)))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_28_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_28_0))) + (if ((size_bits_backwards_matches mappingpatterns_28_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_28_0) (\ size1 . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B1;B1] : 7 words$word))))))))) (\ (w__15 : + bool) . + if w__15 then + let (imm7 : 7 bits) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) in + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (imm7 : 7 bits) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) in + let (imm5 : 5 bits) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_28_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_28_0) (\ size1 . + sail2_state_monad$returnS (STORE ((concat_vec imm7 imm5 : 12 words$word), rs2, rs1, size1, F, F))) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word)))))))))) then + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm : 12 words$word) = ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + sail2_state_monad$returnS (ADDIW (imm, rs1, rd)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTW (shamt, rs1, rd, RISCV_SLLI)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTW (shamt, rs1, rd, RISCV_SRLI)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTW (shamt, rs1, rd, RISCV_SRAI)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPEW (rs2, rs1, rd, RISCV_ADDW)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPEW (rs2, rs1, rd, RISCV_SUBW)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPEW (rs2, rs1, rd, RISCV_SLLW)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPEW (rs2, rs1, rd, RISCV_SRLW)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (RTYPEW (rs2, rs1, rd, RISCV_SRAW)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTIWOP (shamt, rs1, rd, RISCV_SLLIW)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTIWOP (shamt, rs1, rd, RISCV_SRLIW)) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + let (shamt : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SHIFTIWOP (shamt, rs1, rd, RISCV_SRAIW)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 28 : int):ii) : 4 words$word)) = (vec_of_bits [B0;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__7 (( 19 : int):ii) (( 0 : int):ii) : 20 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B1] + : 20 words$word))))))) then + let (succ : 4 words$word) = ((subrange_vec_dec v__7 (( 23 : int):ii) (( 20 : int):ii) : 4 words$word)) in + let (pred : 4 words$word) = ((subrange_vec_dec v__7 (( 27 : int):ii) (( 24 : int):ii) : 4 words$word)) in + sail2_state_monad$returnS (FENCE (pred, succ)) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 28 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__7 (( 19 : int):ii) (( 0 : int):ii) : 20 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B1] + : 20 words$word))))))) then + let (succ : 4 words$word) = ((subrange_vec_dec v__7 (( 23 : int):ii) (( 20 : int):ii) : 4 words$word)) in + let (pred : 4 words$word) = ((subrange_vec_dec v__7 (( 27 : int):ii) (( 24 : int):ii) : 4 words$word)) in + sail2_state_monad$returnS (FENCE_TSO (pred, succ)) + else if (((v__7 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0; + B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS (FENCEI () ) + else if (((v__7 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS (ECALL () ) + else if (((v__7 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS (MRET () ) + else if (((v__7 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS (SRET () ) + else if (((v__7 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS (EBREAK () ) + else if (((v__7 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS (WFI () ) + else if ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B1;B0;B0;B1] : 7 words$word)))) /\ (((((subrange_vec_dec v__7 (( 14 : int):ii) (( 0 : int):ii) : 15 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] : 15 words$word))))))) + then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (SFENCE_VMA (rs1, rs2)) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_31_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_30_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_29_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_31_0))) + (if ((size_bits_backwards_matches mappingpatterns_31_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_31_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_30_0))) + (if ((bool_bits_backwards_matches mappingpatterns_30_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_30_0) (\ rl . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_29_0))) + (if ((bool_bits_backwards_matches mappingpatterns_29_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_29_0) (\ aq . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) (\ (w__17 : bool) . + sail2_state_monad$returnS w__17)) + else sail2_state_monad$returnS F)) (\ (w__19 : bool) . + sail2_state_monad$returnS w__19)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((regidx_to_regno + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))))) /\ ((((((((regidx_to_regno + ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word))))))))))))))) (\ (w__22 : + bool) . + if w__22 then + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_31_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_30_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_29_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_31_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_30_0) (\ rl . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_29_0) (\ aq . + sail2_state_monad$returnS (LOADRES (aq, rl, rs1, size1, rd))))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_34_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_33_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_32_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_34_0))) + (if ((size_bits_backwards_matches mappingpatterns_34_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_34_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_33_0))) + (if ((bool_bits_backwards_matches mappingpatterns_33_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_33_0) (\ rl . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_32_0))) + (if ((bool_bits_backwards_matches mappingpatterns_32_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_32_0) (\ aq . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) (\ (w__24 : bool) . + sail2_state_monad$returnS w__24)) + else sail2_state_monad$returnS F)) (\ (w__26 : bool) . + sail2_state_monad$returnS w__26)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((regidx_to_regno + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word)))))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word)))))))))))) (\ (w__29 : + bool) . + if w__29 then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_34_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_33_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_32_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_34_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_33_0) (\ rl . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_32_0) (\ aq . + sail2_state_monad$returnS (STORECON (aq, rl, rs2, rs1, size1, rd))))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_35_0 : 5 words$word) = + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in + let (mappingpatterns_38_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_37_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_36_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + let (mappingpatterns_35_0 : 5 words$word) = + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_38_0))) + (if ((size_bits_backwards_matches mappingpatterns_38_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_38_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_37_0))) + (if ((bool_bits_backwards_matches mappingpatterns_37_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_37_0) (\ rl . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_36_0))) + (if ((bool_bits_backwards_matches mappingpatterns_36_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_36_0) (\ aq . sail2_state_monad$bindS + (sail2_state$and_boolS + (sail2_state_monad$returnS ((encdec_amoop_backwards_matches mappingpatterns_35_0))) + (if ((encdec_amoop_backwards_matches mappingpatterns_35_0)) then sail2_state_monad$bindS + (encdec_amoop_backwards mappingpatterns_35_0) (\ op . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) (\ (w__31 : bool) . + sail2_state_monad$returnS w__31)) + else sail2_state_monad$returnS F)) (\ (w__33 : bool) . + sail2_state_monad$returnS w__33)) + else sail2_state_monad$returnS F)) (\ (w__35 : bool) . + sail2_state_monad$returnS w__35)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word))))))))) (\ (w__38 : + bool) . + if w__38 then + let (mappingpatterns_35_0 : 5 words$word) = + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_38_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_37_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_36_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + let (mappingpatterns_35_0 : 5 words$word) = + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_38_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_37_0) (\ rl . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_36_0) (\ aq . sail2_state_monad$bindS + (encdec_amoop_backwards mappingpatterns_35_0) (\ op . + sail2_state_monad$returnS (AMO (op, aq, rl, rs2, rs1, size1, rd)))))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_39_0 : 3 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_mul_op_backwards_matches mappingpatterns_39_0))) + (if ((encdec_mul_op_backwards_matches mappingpatterns_39_0)) then sail2_state_monad$bindS + (encdec_mul_op_backwards mappingpatterns_39_0) (\ varstup . let (high, signed1, signed2) = varstup in + sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word))))))))) (\ (w__41 : + bool) . + if w__41 then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_39_0 : 3 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in sail2_state_monad$bindS + (encdec_mul_op_backwards mappingpatterns_39_0) (\ varstup . let (high, signed1, signed2) = varstup in + sail2_state_monad$returnS (MUL (rs2, rs1, rd, high, signed1, signed2))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_40_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_40_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_40_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_40_0) (\ s . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 13 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__44 : + bool) . + if w__44 then + let (rs2 : 5 words$word) = ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_40_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_40_0) (\ s . + sail2_state_monad$returnS (DIV0 (rs2, rs1, rd, s))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_41_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_41_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_41_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_41_0) (\ s . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 13 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__47 : + bool) . + if w__47 then + let (rs2 : 5 words$word) = + ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = + ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_41_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_41_0) (\ s . + sail2_state_monad$returnS (REM (rs2, rs1, rd, s))) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) + then + let (rs2 : 5 words$word) = + ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = + ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS (MULW (rs2, rs1, rd)) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_42_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS + (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_42_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_42_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_42_0) (\ s . + sail2_state_monad$returnS ((((( 32 : int):ii) = (( 64 : int):ii))))) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 13 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__50 : + bool) . + if w__50 then + let (rs2 : 5 words$word) = + ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = + ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = + ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_42_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_42_0) (\ s . + sail2_state_monad$returnS (DIVW (rs2, rs1, rd, s))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_43_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS + (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_43_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_43_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_43_0) (\ s . + sail2_state_monad$returnS ((((( 32 : int):ii) = (( 64 : int):ii))))) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__7 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__7 (( 14 : int):ii) (( 13 : int):ii) + : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__53 : + bool) . + if w__53 then + let (rs2 : 5 words$word) = + ((subrange_vec_dec v__7 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)) in + let (rs1 : 5 words$word) = + ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = + ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (mappingpatterns_43_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_43_0) (\ s . + sail2_state_monad$returnS (REMW (rs2, rs1, rd, s))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_45_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_44_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in + sail2_state$and_boolS + (sail2_state_monad$returnS ((encdec_csrop_backwards_matches mappingpatterns_45_0))) + (if ((encdec_csrop_backwards_matches mappingpatterns_45_0)) then sail2_state_monad$bindS + (encdec_csrop_backwards mappingpatterns_45_0) (\ op . sail2_state_monad$bindS + (sail2_state$and_boolS + (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_44_0))) + (if ((bool_bits_backwards_matches mappingpatterns_44_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_44_0) (\ is_imm . + sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) (\ (w__55 : bool) . + sail2_state_monad$returnS w__55)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__7 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__58 : + bool) . + if w__58 then + let (csr : 12 words$word) = + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (rs1 : 5 words$word) = + ((subrange_vec_dec v__7 (( 19 : int):ii) (( 15 : int):ii) : 5 words$word)) in + let (rd : 5 words$word) = + ((subrange_vec_dec v__7 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (csr : 12 words$word) = + ((subrange_vec_dec v__7 (( 31 : int):ii) (( 20 : int):ii) : 12 words$word)) in + let (mappingpatterns_45_0 : 2 words$word) = + ((subrange_vec_dec v__7 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_44_0 : 1 words$word) = + ((subrange_vec_dec v__7 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (encdec_csrop_backwards mappingpatterns_45_0) (\ op . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_44_0) (\ is_imm . + sail2_state_monad$returnS (CSR (csr, rs1, rd, is_imm, op)))) + else + sail2_state_monad$returnS (if (((v__7 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1; + B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + URET () + else ILLEGAL v__7)))))))))))))))))`; + + +(*val encdec_forwards_matches : ast -> bool*) + +val _ = Define ` + ((encdec_forwards_matches:ast -> bool) arg_= + ((case arg_ of + UTYPE ((imm, rd, op)) => T + | RISCV_JAL ((v__220, rd)) => + if (((((subrange_vec_dec v__220 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) then + T + else F + | RISCV_JALR ((imm, rs1, rd)) => T + | BTYPE ((v__222, rs2, rs1, op)) => + if (((((subrange_vec_dec v__222 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) then + T + else F + | ITYPE ((imm, rs1, rd, op)) => T + | SHIFTIOP ((shamt, rs1, rd, RISCV_SLLI)) => T + | SHIFTIOP ((shamt, rs1, rd, RISCV_SRLI)) => T + | SHIFTIOP ((shamt, rs1, rd, RISCV_SRAI)) => T + | RTYPE ((rs2, rs1, rd, RISCV_ADD)) => T + | RTYPE ((rs2, rs1, rd, RISCV_SLT)) => T + | RTYPE ((rs2, rs1, rd, RISCV_SLTU)) => T + | RTYPE ((rs2, rs1, rd, RISCV_AND)) => T + | RTYPE ((rs2, rs1, rd, RISCV_OR)) => T + | RTYPE ((rs2, rs1, rd, RISCV_XOR)) => T + | RTYPE ((rs2, rs1, rd, RISCV_SLL)) => T + | RTYPE ((rs2, rs1, rd, RISCV_SRL)) => T + | RTYPE ((rs2, rs1, rd, RISCV_SUB)) => T + | RTYPE ((rs2, rs1, rd, RISCV_SRA)) => T + | LOAD ((imm, rs1, rd, is_unsigned, size1, F, F)) => + if (((((((word_width_bytes size1)) < (( 4 : int):ii))) \/ (((((~ is_unsigned)) /\ ((((word_width_bytes size1)) <= (( 4 : int):ii))))))))) then + T + else F + | STORE ((v__224, rs2, rs1, size1, F, F)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then T else F + | ADDIW ((imm, rs1, rd)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | SHIFTW ((shamt, rs1, rd, RISCV_SLLI)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | SHIFTW ((shamt, rs1, rd, RISCV_SRLI)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | SHIFTW ((shamt, rs1, rd, RISCV_SRAI)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | RTYPEW ((rs2, rs1, rd, RISCV_ADDW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | RTYPEW ((rs2, rs1, rd, RISCV_SUBW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | RTYPEW ((rs2, rs1, rd, RISCV_SLLW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | RTYPEW ((rs2, rs1, rd, RISCV_SRLW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | RTYPEW ((rs2, rs1, rd, RISCV_SRAW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | SHIFTIWOP ((shamt, rs1, rd, RISCV_SLLIW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | SHIFTIWOP ((shamt, rs1, rd, RISCV_SRLIW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | SHIFTIWOP ((shamt, rs1, rd, RISCV_SRAIW)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | FENCE ((pred, succ)) => T + | FENCE_TSO ((pred, succ)) => T + | FENCEI (() ) => T + | ECALL (() ) => T + | MRET (() ) => T + | SRET (() ) => T + | EBREAK (() ) => T + | WFI (() ) => T + | SFENCE_VMA ((rs1, rs2)) => T + | LOADRES ((aq, rl, rs1, size1, rd)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then T else F + | STORECON ((aq, rl, rs2, rs1, size1, rd)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then T else F + | AMO ((op, aq, rl, rs2, rs1, size1, rd)) => + if ((((word_width_bytes size1)) <= (( 4 : int):ii))) then T else F + | MUL ((rs2, rs1, rd, high, signed1, signed2)) => T + | DIV0 ((rs2, rs1, rd, s)) => T + | REM ((rs2, rs1, rd, s)) => T + | MULW ((rs2, rs1, rd)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | DIVW ((rs2, rs1, rd, s)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | REMW ((rs2, rs1, rd, s)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | CSR ((csr, rs1, rd, is_imm, op)) => T + | URET (() ) => T + | ILLEGAL (s) => T + | _ => F + )))`; + + +(*val encdec_backwards_matches : mword ty32 -> M bool*) + +val _ = Define ` + ((encdec_backwards_matches:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let v__225 = arg_ in + let (mappingpatterns_0_0 : 7 words$word) = ((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) in sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_uop_backwards_matches mappingpatterns_0_0))) + (if ((encdec_uop_backwards_matches mappingpatterns_0_0)) then sail2_state_monad$bindS + (encdec_uop_backwards mappingpatterns_0_0) (\ op . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) (\ (w__1 : bool) . + if w__1 then + let (mappingpatterns_0_0 : 7 words$word) = ((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) in sail2_state_monad$bindS + (encdec_uop_backwards mappingpatterns_0_0) (\ op . sail2_state_monad$returnS T) + else if (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B0;B1;B1;B1;B1] : 7 words$word)))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B0;B0;B1;B1;B1] : 7 words$word))))))) then + sail2_state_monad$returnS T + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_1_0 : 3 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_bop_backwards_matches mappingpatterns_1_0))) + (if ((encdec_bop_backwards_matches mappingpatterns_1_0)) then sail2_state_monad$bindS + (encdec_bop_backwards mappingpatterns_1_0) (\ op . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B0;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__4 : bool) . + if w__4 then + let (mappingpatterns_1_0 : 3 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in sail2_state_monad$bindS + (encdec_bop_backwards mappingpatterns_1_0) (\ op . sail2_state_monad$returnS T) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_2_0 : 3 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_iop_backwards_matches mappingpatterns_2_0))) + (if ((encdec_iop_backwards_matches mappingpatterns_2_0)) then sail2_state_monad$bindS + (encdec_iop_backwards mappingpatterns_2_0) (\ op . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__7 : bool) . + if w__7 then + let (mappingpatterns_2_0 : 3 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in sail2_state_monad$bindS + (encdec_iop_backwards mappingpatterns_2_0) (\ op . sail2_state_monad$returnS T) + else if ((((let (shamt : 6 words$word) = ((subrange_vec_dec v__225 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + (((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((((bit_to_bool ((access_vec_dec shamt (( 5 : int):ii))))) = F))))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 26 : int):ii) : 6 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if ((((let (shamt : 6 words$word) = ((subrange_vec_dec v__225 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + (((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((((bit_to_bool ((access_vec_dec shamt (( 5 : int):ii))))) = F))))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 26 : int):ii) : 6 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if ((((let (shamt : 6 words$word) = ((subrange_vec_dec v__225 (( 25 : int):ii) (( 20 : int):ii) : 6 words$word)) in + (((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((((bit_to_bool ((access_vec_dec shamt (( 5 : int):ii))))) = F))))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 26 : int):ii) : 6 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_4_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_3_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_4_0))) + (if ((size_bits_backwards_matches mappingpatterns_4_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_4_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_3_0))) + (if ((bool_bits_backwards_matches mappingpatterns_3_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_3_0) (\ is_unsigned . + sail2_state_monad$returnS (((((((word_width_bytes size1)) < (( 4 : int):ii))) \/ (((((~ is_unsigned)) /\ ((((word_width_bytes size1)) <= (( 4 : int):ii)))))))))) + else sail2_state_monad$returnS F)) (\ (w__9 : bool) . + sail2_state_monad$returnS w__9)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__12 : bool) . + if w__12 then + let (mappingpatterns_4_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_3_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_4_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_3_0) (\ is_unsigned . sail2_state_monad$returnS T)) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_5_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_5_0))) + (if ((size_bits_backwards_matches mappingpatterns_5_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_5_0) (\ size1 . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B1;B1] : 7 words$word))))))))) (\ (w__15 : + bool) . + if w__15 then + let (mappingpatterns_5_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_5_0) (\ size1 . sail2_state_monad$returnS T) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word)))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B0;B0;B0;B0] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 28 : int):ii) : 4 words$word)) = (vec_of_bits [B0;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__225 (( 19 : int):ii) (( 0 : int):ii) : 20 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B1] + : 20 words$word))))))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 28 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__225 (( 19 : int):ii) (( 0 : int):ii) : 20 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B1] + : 20 words$word))))))) then + sail2_state_monad$returnS T + else if (((v__225 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0; + B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS T + else if (((v__225 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS T + else if (((v__225 = (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS T + else if (((v__225 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS T + else if (((v__225 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS T + else if (((v__225 = (vec_of_bits [B0;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + sail2_state_monad$returnS T + else if ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B1;B0;B0;B1] : 7 words$word)))) /\ (((((subrange_vec_dec v__225 (( 14 : int):ii) (( 0 : int):ii) : 15 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B1;B1;B1;B0;B0;B1;B1] : 15 words$word))))))) + then + sail2_state_monad$returnS T + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_8_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_7_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_6_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_8_0))) + (if ((size_bits_backwards_matches mappingpatterns_8_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_8_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_7_0))) + (if ((bool_bits_backwards_matches mappingpatterns_7_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_7_0) (\ rl . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_6_0))) + (if ((bool_bits_backwards_matches mappingpatterns_6_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_6_0) (\ aq . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) (\ (w__17 : bool) . + sail2_state_monad$returnS w__17)) + else sail2_state_monad$returnS F)) (\ (w__19 : bool) . + sail2_state_monad$returnS w__19)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((regidx_to_regno + ((subrange_vec_dec v__225 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))))) /\ ((((((((regidx_to_regno + ((subrange_vec_dec v__225 (( 24 : int):ii) (( 20 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word)))))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word))))))))))))))) (\ (w__22 : + bool) . + if w__22 then + let (mappingpatterns_8_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_7_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_6_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_8_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_7_0) (\ rl . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_6_0) (\ aq . sail2_state_monad$returnS T))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_9_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + let (mappingpatterns_11_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_10_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_11_0))) + (if ((size_bits_backwards_matches mappingpatterns_11_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_11_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_10_0))) + (if ((bool_bits_backwards_matches mappingpatterns_10_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_10_0) (\ rl . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_9_0))) + (if ((bool_bits_backwards_matches mappingpatterns_9_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_9_0) (\ aq . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) (\ (w__24 : bool) . + sail2_state_monad$returnS w__24)) + else sail2_state_monad$returnS F)) (\ (w__26 : bool) . + sail2_state_monad$returnS w__26)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((regidx_to_regno + ((subrange_vec_dec v__225 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : 5 words$word)))))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word)))))))))))) (\ (w__29 : + bool) . + if w__29 then + let (mappingpatterns_9_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + let (mappingpatterns_11_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_10_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_11_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_10_0) (\ rl . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_9_0) (\ aq . sail2_state_monad$returnS T))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_12_0 : 5 words$word) = + ((subrange_vec_dec v__225 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in + let (mappingpatterns_15_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_14_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_13_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + let (mappingpatterns_12_0 : 5 words$word) = + ((subrange_vec_dec v__225 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((size_bits_backwards_matches mappingpatterns_15_0))) + (if ((size_bits_backwards_matches mappingpatterns_15_0)) then sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_15_0) (\ size1 . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_14_0))) + (if ((bool_bits_backwards_matches mappingpatterns_14_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_14_0) (\ rl . sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_13_0))) + (if ((bool_bits_backwards_matches mappingpatterns_13_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_13_0) (\ aq . sail2_state_monad$bindS + (sail2_state$and_boolS + (sail2_state_monad$returnS ((encdec_amoop_backwards_matches mappingpatterns_12_0))) + (if ((encdec_amoop_backwards_matches mappingpatterns_12_0)) then sail2_state_monad$bindS + (encdec_amoop_backwards mappingpatterns_12_0) (\ op . + sail2_state_monad$returnS ((((word_width_bytes size1)) <= (( 4 : int):ii)))) + else sail2_state_monad$returnS F)) (\ (w__31 : bool) . + sail2_state_monad$returnS w__31)) + else sail2_state_monad$returnS F)) (\ (w__33 : bool) . + sail2_state_monad$returnS w__33)) + else sail2_state_monad$returnS F)) (\ (w__35 : bool) . + sail2_state_monad$returnS w__35)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] : 7 words$word))))))))) (\ (w__38 : + bool) . + if w__38 then + let (mappingpatterns_12_0 : 5 words$word) = + ((subrange_vec_dec v__225 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in + let (mappingpatterns_15_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_14_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 25 : int):ii) (( 25 : int):ii) : 1 words$word)) in + let (mappingpatterns_13_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 26 : int):ii) (( 26 : int):ii) : 1 words$word)) in + let (mappingpatterns_12_0 : 5 words$word) = + ((subrange_vec_dec v__225 (( 31 : int):ii) (( 27 : int):ii) : 5 words$word)) in sail2_state_monad$bindS + (size_bits_backwards mappingpatterns_15_0) (\ size1 . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_14_0) (\ rl . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_13_0) (\ aq . sail2_state_monad$bindS + (encdec_amoop_backwards mappingpatterns_12_0) (\ op . sail2_state_monad$returnS T)))) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_16_0 : 3 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((encdec_mul_op_backwards_matches mappingpatterns_16_0))) + (if ((encdec_mul_op_backwards_matches mappingpatterns_16_0)) then sail2_state_monad$bindS + (encdec_mul_op_backwards mappingpatterns_16_0) (\ varstup . let (high, signed1, signed2) = varstup in + sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word))))))))) (\ (w__41 : + bool) . + if w__41 then + let (mappingpatterns_16_0 : 3 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) : 3 words$word)) in sail2_state_monad$bindS + (encdec_mul_op_backwards mappingpatterns_16_0) (\ varstup . let (high, signed1, signed2) = varstup in + sail2_state_monad$returnS T) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_17_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_17_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_17_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_17_0) (\ s . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 13 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__44 : + bool) . + if w__44 then + let (mappingpatterns_17_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_17_0) (\ s . sail2_state_monad$returnS T) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_18_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_18_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_18_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_18_0) (\ s . sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 13 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B0;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__47 : + bool) . + if w__47 then + let (mappingpatterns_18_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_18_0) (\ s . sail2_state_monad$returnS T) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 12 : int):ii) + : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word))))))))))))) + then + sail2_state_monad$returnS T + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_19_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS + (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_19_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_19_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_19_0) (\ s . + sail2_state_monad$returnS ((((( 32 : int):ii) = (( 64 : int):ii))))) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 13 : int):ii) + : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__50 : + bool) . + if w__50 then + let (mappingpatterns_19_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_19_0) (\ s . sail2_state_monad$returnS T) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_20_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + sail2_state$and_boolS + (sail2_state_monad$returnS ((bool_not_bits_backwards_matches mappingpatterns_20_0))) + (if ((bool_not_bits_backwards_matches mappingpatterns_20_0)) then sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_20_0) (\ s . + sail2_state_monad$returnS ((((( 32 : int):ii) = (( 64 : int):ii))))) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS ((((((((subrange_vec_dec v__225 (( 31 : int):ii) (( 25 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B0;B1] : 7 words$word)))) /\ ((((((((subrange_vec_dec v__225 (( 14 : int):ii) (( 13 : int):ii) + : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) + : 7 words$word)) = (vec_of_bits [B0;B1;B1;B1;B0;B1;B1] : 7 words$word)))))))))))) (\ (w__53 : + bool) . + if w__53 then + let (mappingpatterns_20_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (bool_not_bits_backwards mappingpatterns_20_0) (\ s . sail2_state_monad$returnS T) + else sail2_state_monad$bindS + (sail2_state$and_boolS + (let (mappingpatterns_22_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_21_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in + sail2_state$and_boolS + (sail2_state_monad$returnS ((encdec_csrop_backwards_matches mappingpatterns_22_0))) + (if ((encdec_csrop_backwards_matches mappingpatterns_22_0)) then sail2_state_monad$bindS + (encdec_csrop_backwards mappingpatterns_22_0) (\ op . sail2_state_monad$bindS + (sail2_state$and_boolS + (sail2_state_monad$returnS ((bool_bits_backwards_matches mappingpatterns_21_0))) + (if ((bool_bits_backwards_matches mappingpatterns_21_0)) then sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_21_0) (\ is_imm . + sail2_state_monad$returnS T) + else sail2_state_monad$returnS F)) (\ (w__55 : bool) . + sail2_state_monad$returnS w__55)) + else sail2_state_monad$returnS F)) + (sail2_state_monad$returnS (((((subrange_vec_dec v__225 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B1;B1;B1;B0;B0;B1;B1] : 7 words$word)))))) (\ (w__58 : + bool) . + if w__58 then + let (mappingpatterns_22_0 : 2 words$word) = + ((subrange_vec_dec v__225 (( 13 : int):ii) (( 12 : int):ii) : 2 words$word)) in + let (mappingpatterns_21_0 : 1 words$word) = + ((subrange_vec_dec v__225 (( 14 : int):ii) (( 14 : int):ii) : 1 words$word)) in sail2_state_monad$bindS + (encdec_csrop_backwards mappingpatterns_22_0) (\ op . sail2_state_monad$bindS + (bool_bits_backwards mappingpatterns_21_0) (\ is_imm . + sail2_state_monad$returnS T)) + else + sail2_state_monad$returnS (if (((v__225 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1; + B1;B1;B0;B0;B1;B1] + : 32 words$word)))) then + T + else T)))))))))))))))))`; + + +(*val encdec_compressed_forwards : ast -> M (mword ty16)*) + +val _ = Define ` + ((encdec_compressed_forwards:ast ->(regstate)sail2_state_monad$sequential_state ->((((16)words$word),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + ((case arg_ of + C_NOP (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B0;B1] : 2 words$word) + : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_ADDI4SPN ((rd, v__438)) => + if (let (nz96 : 4 bits) = ((subrange_vec_dec v__438 (( 7 : int):ii) (( 4 : int):ii) : 4 words$word)) in + let (nz96 : 4 bits) = ((subrange_vec_dec v__438 (( 7 : int):ii) (( 4 : int):ii) : 4 words$word)) in + let (nz54 : 2 bits) = ((subrange_vec_dec v__438 (( 3 : int):ii) (( 2 : int):ii) : 2 words$word)) in + let (nz3 : 1 bits) = ((subrange_vec_dec v__438 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)) in + let (nz2 : 1 bits) = ((subrange_vec_dec v__438 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + (((concat_vec nz96 ((concat_vec nz54 ((concat_vec nz3 nz2 : 2 words$word)) : 4 words$word)) + : 8 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word))) then + let (nz96 : 4 bits) = ((subrange_vec_dec v__438 (( 7 : int):ii) (( 4 : int):ii) : 4 words$word)) in + let (nz96 : 4 bits) = ((subrange_vec_dec v__438 (( 7 : int):ii) (( 4 : int):ii) : 4 words$word)) in + let (nz54 : 2 bits) = ((subrange_vec_dec v__438 (( 3 : int):ii) (( 2 : int):ii) : 2 words$word)) in + let (nz3 : 1 bits) = ((subrange_vec_dec v__438 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)) in + let (nz2 : 1 bits) = ((subrange_vec_dec v__438 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec nz54 + ((concat_vec nz96 + ((concat_vec nz2 + ((concat_vec nz3 + ((concat_vec rd (vec_of_bits [B0;B0] : 2 words$word) : 5 words$word)) + : 6 words$word)) + : 7 words$word)) + : 11 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_LW ((v__439, rs1, rd)) => + let (ui6 : 1 bits) = ((subrange_vec_dec v__439 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (ui6 : 1 bits) = ((subrange_vec_dec v__439 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__439 (( 3 : int):ii) (( 1 : int):ii) : 3 words$word)) in + let (ui2 : 1 bits) = ((subrange_vec_dec v__439 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0] : 3 words$word) + ((concat_vec ui53 + ((concat_vec rs1 + ((concat_vec ui2 + ((concat_vec ui6 + ((concat_vec rd (vec_of_bits [B0;B0] : 2 words$word) : 5 words$word)) + : 6 words$word)) + : 7 words$word)) + : 10 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_LD ((v__440, rs1, rd)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + let (ui76 : 2 bits) = ((subrange_vec_dec v__440 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (ui76 : 2 bits) = ((subrange_vec_dec v__440 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__440 (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B1] : 3 words$word) + ((concat_vec ui53 + ((concat_vec rs1 + ((concat_vec ui76 + ((concat_vec rd (vec_of_bits [B0;B0] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_SW ((v__441, rs1, rs2)) => + let (ui6 : 1 bits) = ((subrange_vec_dec v__441 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (ui6 : 1 bits) = ((subrange_vec_dec v__441 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__441 (( 3 : int):ii) (( 1 : int):ii) : 3 words$word)) in + let (ui2 : 1 bits) = ((subrange_vec_dec v__441 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B1;B0] : 3 words$word) + ((concat_vec ui53 + ((concat_vec rs1 + ((concat_vec ui2 + ((concat_vec ui6 + ((concat_vec rs2 (vec_of_bits [B0;B0] : 2 words$word) : 5 words$word)) + : 6 words$word)) + : 7 words$word)) + : 10 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_SD ((v__442, rs1, rs2)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + let (ui76 : 2 bits) = ((subrange_vec_dec v__442 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (ui76 : 2 bits) = ((subrange_vec_dec v__442 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__442 (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B1;B1] : 3 words$word) + ((concat_vec ui53 + ((concat_vec rs1 + ((concat_vec ui76 + ((concat_vec rs2 (vec_of_bits [B0;B0] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_ADDI ((v__443, rsd)) => + if (let (nzi5 : 1 bits) = ((subrange_vec_dec v__443 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__443 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi40 : 5 bits) = ((subrange_vec_dec v__443 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + ((((((concat_vec nzi5 nzi40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))))) then + let (nzi5 : 1 bits) = ((subrange_vec_dec v__443 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__443 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi40 : 5 bits) = ((subrange_vec_dec v__443 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec nzi5 + ((concat_vec rsd + ((concat_vec nzi40 (vec_of_bits [B0;B1] : 2 words$word) : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_JAL (v__444) => + if ((((( 32 : int):ii) = (( 32 : int):ii)))) then + let (i11 : 1 bits) = ((subrange_vec_dec v__444 (( 10 : int):ii) (( 10 : int):ii) : 1 words$word)) in + let (i98 : 2 bits) = ((subrange_vec_dec v__444 (( 8 : int):ii) (( 7 : int):ii) : 2 words$word)) in + let (i7 : 1 bits) = ((subrange_vec_dec v__444 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + let (i6 : 1 bits) = ((subrange_vec_dec v__444 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__444 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (i4 : 1 bits) = ((subrange_vec_dec v__444 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)) in + let (i31 : 3 bits) = ((subrange_vec_dec v__444 (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) in + let (i11 : 1 bits) = ((subrange_vec_dec v__444 (( 10 : int):ii) (( 10 : int):ii) : 1 words$word)) in + let (i10 : 1 bits) = ((subrange_vec_dec v__444 (( 9 : int):ii) (( 9 : int):ii) : 1 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec i11 + ((concat_vec i4 + ((concat_vec i98 + ((concat_vec i10 + ((concat_vec i6 + ((concat_vec i7 + ((concat_vec i31 + ((concat_vec i5 (vec_of_bits [B0;B1] : 2 words$word) + : 3 words$word)) + : 6 words$word)) + : 7 words$word)) + : 8 words$word)) + : 9 words$word)) + : 11 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_ADDIW ((v__445, rsd)) => + if ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii))))))) + then + let (imm5 : 1 bits) = ((subrange_vec_dec v__445 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm5 : 1 bits) = ((subrange_vec_dec v__445 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm40 : 5 bits) = ((subrange_vec_dec v__445 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B1] : 3 words$word) + ((concat_vec imm5 + ((concat_vec rsd + ((concat_vec imm40 (vec_of_bits [B0;B1] : 2 words$word) : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_LI ((v__446, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then + let (imm5 : 1 bits) = ((subrange_vec_dec v__446 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm5 : 1 bits) = ((subrange_vec_dec v__446 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm40 : 5 bits) = ((subrange_vec_dec v__446 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0] : 3 words$word) + ((concat_vec imm5 + ((concat_vec rd + ((concat_vec imm40 (vec_of_bits [B0;B1] : 2 words$word) : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_ADDI16SP (v__447) => + if (let (nzi9 : 1 bits) = ((subrange_vec_dec v__447 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi9 : 1 bits) = ((subrange_vec_dec v__447 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi87 : 2 bits) = ((subrange_vec_dec v__447 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (nzi6 : 1 bits) = ((subrange_vec_dec v__447 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__447 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)) in + let (nzi4 : 1 bits) = ((subrange_vec_dec v__447 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + (((concat_vec nzi9 + ((concat_vec nzi87 + ((concat_vec nzi6 ((concat_vec nzi5 nzi4 : 2 words$word)) : 3 words$word)) + : 5 words$word)) + : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) then + let (nzi9 : 1 bits) = ((subrange_vec_dec v__447 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi9 : 1 bits) = ((subrange_vec_dec v__447 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi87 : 2 bits) = ((subrange_vec_dec v__447 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (nzi6 : 1 bits) = ((subrange_vec_dec v__447 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__447 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)) in + let (nzi4 : 1 bits) = ((subrange_vec_dec v__447 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B1] : 3 words$word) + ((concat_vec nzi9 + ((concat_vec (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word) + ((concat_vec nzi4 + ((concat_vec nzi6 + ((concat_vec nzi87 + ((concat_vec nzi5 (vec_of_bits [B0;B1] : 2 words$word) + : 3 words$word)) + : 5 words$word)) + : 6 words$word)) + : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_LUI ((v__448, rd)) => + if (let (imm17 : 1 bits) = ((subrange_vec_dec v__448 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm17 : 1 bits) = ((subrange_vec_dec v__448 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm1612 : 5 bits) = ((subrange_vec_dec v__448 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ (((((concat_vec imm17 imm1612 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))))))))) then + let (imm17 : 1 bits) = ((subrange_vec_dec v__448 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm17 : 1 bits) = ((subrange_vec_dec v__448 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm1612 : 5 bits) = ((subrange_vec_dec v__448 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B1] : 3 words$word) + ((concat_vec imm17 + ((concat_vec rd + ((concat_vec imm1612 (vec_of_bits [B0;B1] : 2 words$word) : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_SRLI ((v__449, rsd)) => + if (let (nzui5 : 1 bits) = ((subrange_vec_dec v__449 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__449 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__449 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) then + let (nzui5 : 1 bits) = ((subrange_vec_dec v__449 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__449 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__449 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec nzui5 + ((concat_vec (vec_of_bits [B0;B0] : 2 words$word) + ((concat_vec rsd + ((concat_vec nzui40 (vec_of_bits [B0;B1] : 2 words$word) : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_SRAI ((v__450, rsd)) => + if (let (nzui5 : 1 bits) = ((subrange_vec_dec v__450 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__450 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__450 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) then + let (nzui5 : 1 bits) = ((subrange_vec_dec v__450 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__450 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__450 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec nzui5 + ((concat_vec (vec_of_bits [B0;B1] : 2 words$word) + ((concat_vec rsd + ((concat_vec nzui40 (vec_of_bits [B0;B1] : 2 words$word) : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_ANDI ((v__451, rsd)) => + let (i5 : 1 bits) = ((subrange_vec_dec v__451 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__451 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (i40 : 5 bits) = ((subrange_vec_dec v__451 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec i5 + ((concat_vec (vec_of_bits [B1;B0] : 2 words$word) + ((concat_vec rsd + ((concat_vec i40 (vec_of_bits [B0;B1] : 2 words$word) : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_SUB ((rsd, rs2)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec rsd + ((concat_vec (vec_of_bits [B0;B0] : 2 words$word) + ((concat_vec rs2 (vec_of_bits [B0;B1] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_XOR ((rsd, rs2)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec rsd + ((concat_vec (vec_of_bits [B0;B1] : 2 words$word) + ((concat_vec rs2 (vec_of_bits [B0;B1] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_OR ((rsd, rs2)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec rsd + ((concat_vec (vec_of_bits [B1;B0] : 2 words$word) + ((concat_vec rs2 (vec_of_bits [B0;B1] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_AND ((rsd, rs2)) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec rsd + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec rs2 (vec_of_bits [B0;B1] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_SUBW ((rsd, rs2)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B1] : 1 words$word) + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec rsd + ((concat_vec (vec_of_bits [B0;B0] : 2 words$word) + ((concat_vec rs2 (vec_of_bits [B0;B1] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_ADDW ((rsd, rs2)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B1] : 1 words$word) + ((concat_vec (vec_of_bits [B1;B1] : 2 words$word) + ((concat_vec rsd + ((concat_vec (vec_of_bits [B0;B1] : 2 words$word) + ((concat_vec rs2 (vec_of_bits [B0;B1] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_J (v__452) => + let (i11 : 1 bits) = ((subrange_vec_dec v__452 (( 10 : int):ii) (( 10 : int):ii) : 1 words$word)) in + let (i98 : 2 bits) = ((subrange_vec_dec v__452 (( 8 : int):ii) (( 7 : int):ii) : 2 words$word)) in + let (i7 : 1 bits) = ((subrange_vec_dec v__452 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + let (i6 : 1 bits) = ((subrange_vec_dec v__452 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__452 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (i4 : 1 bits) = ((subrange_vec_dec v__452 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)) in + let (i31 : 3 bits) = ((subrange_vec_dec v__452 (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) in + let (i11 : 1 bits) = ((subrange_vec_dec v__452 (( 10 : int):ii) (( 10 : int):ii) : 1 words$word)) in + let (i10 : 1 bits) = ((subrange_vec_dec v__452 (( 9 : int):ii) (( 9 : int):ii) : 1 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B1] : 3 words$word) + ((concat_vec i11 + ((concat_vec i4 + ((concat_vec i98 + ((concat_vec i10 + ((concat_vec i6 + ((concat_vec i7 + ((concat_vec i31 + ((concat_vec i5 (vec_of_bits [B0;B1] : 2 words$word) + : 3 words$word)) + : 6 words$word)) + : 7 words$word)) + : 8 words$word)) + : 9 words$word)) + : 11 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_BEQZ ((v__453, rs)) => + let (i8 : 1 bits) = ((subrange_vec_dec v__453 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)) in + let (i8 : 1 bits) = ((subrange_vec_dec v__453 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)) in + let (i76 : 2 bits) = ((subrange_vec_dec v__453 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__453 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (i43 : 2 bits) = ((subrange_vec_dec v__453 (( 3 : int):ii) (( 2 : int):ii) : 2 words$word)) in + let (i21 : 2 bits) = ((subrange_vec_dec v__453 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B1;B0] : 3 words$word) + ((concat_vec i8 + ((concat_vec i43 + ((concat_vec rs + ((concat_vec i76 + ((concat_vec i21 + ((concat_vec i5 (vec_of_bits [B0;B1] : 2 words$word) : 3 words$word)) + : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_BNEZ ((v__454, rs)) => + let (i8 : 1 bits) = ((subrange_vec_dec v__454 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)) in + let (i8 : 1 bits) = ((subrange_vec_dec v__454 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)) in + let (i76 : 2 bits) = ((subrange_vec_dec v__454 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__454 (( 4 : int):ii) (( 4 : int):ii) : 1 words$word)) in + let (i43 : 2 bits) = ((subrange_vec_dec v__454 (( 3 : int):ii) (( 2 : int):ii) : 2 words$word)) in + let (i21 : 2 bits) = ((subrange_vec_dec v__454 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B1;B1] : 3 words$word) + ((concat_vec i8 + ((concat_vec i43 + ((concat_vec rs + ((concat_vec i76 + ((concat_vec i21 + ((concat_vec i5 (vec_of_bits [B0;B1] : 2 words$word) : 3 words$word)) + : 5 words$word)) + : 7 words$word)) + : 10 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_SLLI ((v__455, rsd)) => + if (let (nzui5 : 1 bits) = ((subrange_vec_dec v__455 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__455 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__455 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + ((((((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((nzui5 = ((bool_to_bits F : 1 words$word))))))))))))) + then + let (nzui5 : 1 bits) = ((subrange_vec_dec v__455 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__455 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__455 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B0;B0] : 3 words$word) + ((concat_vec nzui5 + ((concat_vec rsd + ((concat_vec nzui40 (vec_of_bits [B1;B0] : 2 words$word) : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_LWSP ((v__456, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then + let (ui76 : 2 bits) = ((subrange_vec_dec v__456 (( 5 : int):ii) (( 4 : int):ii) : 2 words$word)) in + let (ui76 : 2 bits) = ((subrange_vec_dec v__456 (( 5 : int):ii) (( 4 : int):ii) : 2 words$word)) in + let (ui5 : 1 bits) = ((subrange_vec_dec v__456 (( 3 : int):ii) (( 3 : int):ii) : 1 words$word)) in + let (ui42 : 3 bits) = ((subrange_vec_dec v__456 (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B0] : 3 words$word) + ((concat_vec ui5 + ((concat_vec rd + ((concat_vec ui42 + ((concat_vec ui76 (vec_of_bits [B1;B0] : 2 words$word) : 4 words$word)) + : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_LDSP ((v__457, rd)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii))))))) + then + let (ui86 : 3 bits) = ((subrange_vec_dec v__457 (( 5 : int):ii) (( 3 : int):ii) : 3 words$word)) in + let (ui86 : 3 bits) = ((subrange_vec_dec v__457 (( 5 : int):ii) (( 3 : int):ii) : 3 words$word)) in + let (ui5 : 1 bits) = ((subrange_vec_dec v__457 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (ui43 : 2 bits) = ((subrange_vec_dec v__457 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B0;B1;B1] : 3 words$word) + ((concat_vec ui5 + ((concat_vec rd + ((concat_vec ui43 + ((concat_vec ui86 (vec_of_bits [B1;B0] : 2 words$word) : 5 words$word)) + : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_SWSP ((v__458, rs2)) => + let (ui76 : 2 bits) = ((subrange_vec_dec v__458 (( 5 : int):ii) (( 4 : int):ii) : 2 words$word)) in + let (ui76 : 2 bits) = ((subrange_vec_dec v__458 (( 5 : int):ii) (( 4 : int):ii) : 2 words$word)) in + let (ui52 : 4 bits) = ((subrange_vec_dec v__458 (( 3 : int):ii) (( 0 : int):ii) : 4 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B1;B0] : 3 words$word) + ((concat_vec ui52 + ((concat_vec ui76 + ((concat_vec rs2 (vec_of_bits [B1;B0] : 2 words$word) : 7 words$word)) + : 9 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_SDSP ((v__459, rs2)) => + if ((((( 32 : int):ii) = (( 64 : int):ii)))) then + let (ui86 : 3 bits) = ((subrange_vec_dec v__459 (( 5 : int):ii) (( 3 : int):ii) : 3 words$word)) in + let (ui86 : 3 bits) = ((subrange_vec_dec v__459 (( 5 : int):ii) (( 3 : int):ii) : 3 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__459 (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) in + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B1;B1] : 3 words$word) + ((concat_vec ui53 + ((concat_vec ui86 + ((concat_vec rs2 (vec_of_bits [B1;B0] : 2 words$word) : 7 words$word)) + : 10 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_JR (rs1) => + if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B0] : 2 words$word) + : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_JALR (rs1) => + if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B1] : 1 words$word) + ((concat_vec rs1 + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B0] : 2 words$word) + : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_MV ((rd, rs2)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B0] : 1 words$word) + ((concat_vec rd + ((concat_vec rs2 (vec_of_bits [B1;B0] : 2 words$word) : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_EBREAK (() ) => + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B1] : 1 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + ((concat_vec (vec_of_bits [B0;B0;B0;B0;B0] : 5 words$word) + (vec_of_bits [B1;B0] : 2 words$word) + : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + | C_ADD ((rsd, rs2)) => + if ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + sail2_state_monad$returnS ((concat_vec (vec_of_bits [B1;B0;B0] : 3 words$word) + ((concat_vec (vec_of_bits [B1] : 1 words$word) + ((concat_vec rsd + ((concat_vec rs2 (vec_of_bits [B1;B0] : 2 words$word) : 7 words$word)) + : 12 words$word)) + : 13 words$word)) + : 16 words$word)) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + | C_ILLEGAL (s) => sail2_state_monad$returnS s + | _ => sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () ) + )))`; + + +(*val encdec_compressed_backwards : mword ty16 -> ast*) + +val _ = Define ` + ((encdec_compressed_backwards:(16)words$word -> ast) arg_= + (let v__460 = arg_ in + if (((v__460 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 16 words$word)))) + then + C_NOP () + else if ((((let (nz96 : 4 bits) = ((subrange_vec_dec v__460 (( 10 : int):ii) (( 7 : int):ii) : 4 words$word)) in + let (nz54 : 2 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 11 : int):ii) : 2 words$word)) in + let (nz3 : 1 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nz2 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + (((concat_vec nz96 + ((concat_vec nz54 ((concat_vec nz3 nz2 : 2 words$word)) : 4 words$word)) + : 8 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))))))))) then + let (rd : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + let (nz96 : 4 bits) = ((subrange_vec_dec v__460 (( 10 : int):ii) (( 7 : int):ii) : 4 words$word)) in + let (nz54 : 2 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 11 : int):ii) : 2 words$word)) in + let (nz3 : 1 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nz2 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + C_ADDI4SPN (rd, + (concat_vec nz96 + ((concat_vec nz54 ((concat_vec nz3 nz2 : 2 words$word)) : 4 words$word)) + : 8 words$word)) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word))))))) then + let (ui6 : 1 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 10 : int):ii) : 3 words$word)) in + let (ui2 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + let (rs1 : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rd : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_LW ((concat_vec ui6 ((concat_vec ui53 ui2 : 4 words$word)) : 5 words$word), rs1, rd) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))))))))) then + let (ui76 : 2 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 10 : int):ii) : 3 words$word)) in + let (rs1 : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rd : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_LD ((concat_vec ui76 ui53 : 5 words$word), rs1, rd) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word))))))) then + let (ui6 : 1 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 10 : int):ii) : 3 words$word)) in + let (ui2 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + let (rs2 : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + let (rs1 : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + C_SW ((concat_vec ui6 ((concat_vec ui53 ui2 : 4 words$word)) : 5 words$word), rs1, rs2) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))))))))) then + let (ui76 : 2 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 10 : int):ii) : 3 words$word)) in + let (rs2 : 3 bits) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + let (rs1 : 3 bits) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + C_SD ((concat_vec ui76 ui53 : 5 words$word), rs1, rs2) + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzi40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((concat_vec nzi5 nzi40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzi40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_ADDI ((concat_vec nzi5 nzi40 : 6 words$word), rsd) + else if (((((((( 32 : int):ii) = (( 32 : int):ii)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (i98 : 2 bits) = ((subrange_vec_dec v__460 (( 10 : int):ii) (( 9 : int):ii) : 2 words$word)) in + let (i7 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + let (i6 : 1 bits) = ((subrange_vec_dec v__460 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__460 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (i4 : 1 bits) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 11 : int):ii) : 1 words$word)) in + let (i31 : 3 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 3 : int):ii) : 3 words$word)) in + let (i11 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (i10 : 1 bits) = ((subrange_vec_dec v__460 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)) in + C_JAL ((concat_vec i11 + ((concat_vec i10 + ((concat_vec i98 + ((concat_vec i7 + ((concat_vec i6 + ((concat_vec i5 ((concat_vec i4 i31 : 4 words$word)) : 5 words$word)) + : 6 words$word)) + : 7 words$word)) + : 9 words$word)) + : 10 words$word)) + : 11 words$word)) + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii)))))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (imm40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_ADDIW ((concat_vec imm5 imm40 : 6 words$word), rsd) + else if ((((let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rd)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (imm40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_LI ((concat_vec imm5 imm40 : 6 words$word), rd) + else if ((((let (nzi9 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzi87 : 2 bits) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (nzi6 : 1 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__460 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (nzi4 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + (((concat_vec nzi9 + ((concat_vec nzi87 + ((concat_vec nzi6 ((concat_vec nzi5 nzi4 : 2 words$word)) : 3 words$word)) + : 5 words$word)) + : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ ((((((((regidx_to_regno ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + let (nzi9 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzi87 : 2 bits) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (nzi6 : 1 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__460 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (nzi4 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + C_ADDI16SP ((concat_vec nzi9 + ((concat_vec nzi87 + ((concat_vec nzi6 ((concat_vec nzi5 nzi4 : 2 words$word)) : 3 words$word)) + : 5 words$word)) + : 6 words$word)) + else if ((((let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm17 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (imm1612 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ (((((concat_vec imm17 imm1612 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))))))))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm17 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (imm1612 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_LUI ((concat_vec imm17 imm1612 : 6 words$word), rd) + else if ((((let (nzui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_SRLI ((concat_vec nzui5 nzui40 : 6 words$word), rsd) + else if ((((let (nzui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_SRAI ((concat_vec nzui5 nzui40 : 6 words$word), rsd) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (i40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_ANDI ((concat_vec i5 i40 : 6 words$word), rsd) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rs2 : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_SUB (rsd, rs2) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rs2 : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_XOR (rsd, rs2) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rs2 : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_OR (rsd, rs2) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rs2 : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_AND (rsd, rs2) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B1;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rs2 : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_SUBW (rsd, rs2) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B1;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + let (rsd : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (rs2 : cregidx) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + C_ADDW (rsd, rs2) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + let (i98 : 2 bits) = ((subrange_vec_dec v__460 (( 10 : int):ii) (( 9 : int):ii) : 2 words$word)) in + let (i7 : 1 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + let (i6 : 1 bits) = ((subrange_vec_dec v__460 (( 7 : int):ii) (( 7 : int):ii) : 1 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__460 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (i4 : 1 bits) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 11 : int):ii) : 1 words$word)) in + let (i31 : 3 bits) = ((subrange_vec_dec v__460 (( 5 : int):ii) (( 3 : int):ii) : 3 words$word)) in + let (i11 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (i10 : 1 bits) = ((subrange_vec_dec v__460 (( 8 : int):ii) (( 8 : int):ii) : 1 words$word)) in + C_J ((concat_vec i11 + ((concat_vec i10 + ((concat_vec i98 + ((concat_vec i7 + ((concat_vec i6 + ((concat_vec i5 ((concat_vec i4 i31 : 4 words$word)) : 5 words$word)) + : 6 words$word)) + : 7 words$word)) + : 9 words$word)) + : 10 words$word)) + : 11 words$word)) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + let (rs : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (i8 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (i76 : 2 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__460 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (i43 : 2 bits) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) in + let (i21 : 2 bits) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + C_BEQZ ((concat_vec i8 + ((concat_vec i76 ((concat_vec i5 ((concat_vec i43 i21 : 4 words$word)) : 5 words$word)) + : 7 words$word)) + : 8 words$word), + rs) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + let (rs : cregidx) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (i8 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (i76 : 2 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) in + let (i5 : 1 bits) = ((subrange_vec_dec v__460 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (i43 : 2 bits) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) in + let (i21 : 2 bits) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + C_BNEZ ((concat_vec i8 + ((concat_vec i76 ((concat_vec i5 ((concat_vec i43 i21 : 4 words$word)) : 5 words$word)) + : 7 words$word)) + : 8 words$word), + rs) + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((nzui5 = ((bool_to_bits F : 1 words$word))))))))))))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_SLLI ((concat_vec nzui5 nzui40 : 6 words$word), rsd) + else if ((((let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rd)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + let (ui76 : 2 bits) = ((subrange_vec_dec v__460 (( 3 : int):ii) (( 2 : int):ii) : 2 words$word)) in + let (ui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (ui42 : 3 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 4 : int):ii) : 3 words$word)) in + let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + C_LWSP ((concat_vec ui76 ((concat_vec ui5 ui42 : 4 words$word)) : 6 words$word), rd) + else if ((((let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii)))))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + let (ui86 : 3 bits) = ((subrange_vec_dec v__460 (( 4 : int):ii) (( 2 : int):ii) : 3 words$word)) in + let (ui5 : 1 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (ui43 : 2 bits) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) in + let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + C_LDSP ((concat_vec ui86 ((concat_vec ui5 ui43 : 3 words$word)) : 6 words$word), rd) + else if ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word))))))) then + let (ui76 : 2 bits) = ((subrange_vec_dec v__460 (( 8 : int):ii) (( 7 : int):ii) : 2 words$word)) in + let (ui52 : 4 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 9 : int):ii) : 4 words$word)) in + let (rs2 : regidx) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_SWSP ((concat_vec ui76 ui52 : 6 words$word), rs2) + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + let (ui86 : 3 bits) = ((subrange_vec_dec v__460 (( 9 : int):ii) (( 7 : int):ii) : 3 words$word)) in + let (ui53 : 3 bits) = ((subrange_vec_dec v__460 (( 12 : int):ii) (( 10 : int):ii) : 3 words$word)) in + let (rs2 : regidx) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_SDSP ((concat_vec ui86 ui53 : 6 words$word), rs2) + else if ((((let (rs1 : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__460 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0] : 7 words$word)))))))))) then + let (rs1 : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + C_JR rs1 + else if ((((let (rs1 : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B1] : 4 words$word)))) /\ (((((subrange_vec_dec v__460 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0] : 7 words$word)))))))))) then + let (rs1 : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + C_JALR rs1 + else if ((((let (rs2 : regidx) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg))))))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + let (rs2 : regidx) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + let (rd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + C_MV (rd, rs2) + else if (((v__460 = (vec_of_bits [B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 16 words$word)))) then + C_EBREAK () + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (rs2 : regidx) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg))))))) /\ ((((((((subrange_vec_dec v__460 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B1] : 4 words$word)))) /\ (((((subrange_vec_dec v__460 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + let (rsd : regidx) = ((subrange_vec_dec v__460 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (rs2 : regidx) = ((subrange_vec_dec v__460 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + C_ADD (rsd, rs2) + else C_ILLEGAL v__460))`; + + +(*val encdec_compressed_forwards_matches : ast -> bool*) + +val _ = Define ` + ((encdec_compressed_forwards_matches:ast -> bool) arg_= + ((case arg_ of + C_NOP (() ) => T + | C_ADDI4SPN ((rd, v__596)) => + if (let (nz96 : 4 bits) = ((subrange_vec_dec v__596 (( 7 : int):ii) (( 4 : int):ii) : 4 words$word)) in + let (nz96 : 4 bits) = ((subrange_vec_dec v__596 (( 7 : int):ii) (( 4 : int):ii) : 4 words$word)) in + let (nz54 : 2 bits) = ((subrange_vec_dec v__596 (( 3 : int):ii) (( 2 : int):ii) : 2 words$word)) in + let (nz3 : 1 bits) = ((subrange_vec_dec v__596 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)) in + let (nz2 : 1 bits) = ((subrange_vec_dec v__596 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + (((concat_vec nz96 ((concat_vec nz54 ((concat_vec nz3 nz2 : 2 words$word)) : 4 words$word)) + : 8 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word))) then + T + else F + | C_LW ((v__597, rs1, rd)) => T + | C_LD ((v__598, rs1, rd)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | C_SW ((v__599, rs1, rs2)) => T + | C_SD ((v__600, rs1, rs2)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | C_ADDI ((v__601, rsd)) => + if (let (nzi5 : 1 bits) = ((subrange_vec_dec v__601 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__601 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi40 : 5 bits) = ((subrange_vec_dec v__601 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + ((((((concat_vec nzi5 nzi40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))))) then + T + else F + | C_JAL (v__602) => if ((((( 32 : int):ii) = (( 32 : int):ii)))) then T else F + | C_ADDIW ((v__603, rsd)) => + if ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii))))))) + then + T + else F + | C_LI ((v__604, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then T else F + | C_ADDI16SP (v__605) => + if (let (nzi9 : 1 bits) = ((subrange_vec_dec v__605 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi9 : 1 bits) = ((subrange_vec_dec v__605 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi87 : 2 bits) = ((subrange_vec_dec v__605 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (nzi6 : 1 bits) = ((subrange_vec_dec v__605 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__605 (( 1 : int):ii) (( 1 : int):ii) : 1 words$word)) in + let (nzi4 : 1 bits) = ((subrange_vec_dec v__605 (( 0 : int):ii) (( 0 : int):ii) : 1 words$word)) in + (((concat_vec nzi9 + ((concat_vec nzi87 + ((concat_vec nzi6 ((concat_vec nzi5 nzi4 : 2 words$word)) : 3 words$word)) + : 5 words$word)) + : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) then + T + else F + | C_LUI ((v__606, rd)) => + if (let (imm17 : 1 bits) = ((subrange_vec_dec v__606 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm17 : 1 bits) = ((subrange_vec_dec v__606 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (imm1612 : 5 bits) = ((subrange_vec_dec v__606 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ (((((concat_vec imm17 imm1612 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))))))))) then + T + else F + | C_SRLI ((v__607, rsd)) => + if (let (nzui5 : 1 bits) = ((subrange_vec_dec v__607 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__607 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__607 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) then + T + else F + | C_SRAI ((v__608, rsd)) => + if (let (nzui5 : 1 bits) = ((subrange_vec_dec v__608 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__608 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__608 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) then + T + else F + | C_ANDI ((v__609, rsd)) => T + | C_SUB ((rsd, rs2)) => T + | C_XOR ((rsd, rs2)) => T + | C_OR ((rsd, rs2)) => T + | C_AND ((rsd, rs2)) => T + | C_SUBW ((rsd, rs2)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | C_ADDW ((rsd, rs2)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | C_J (v__610) => T + | C_BEQZ ((v__611, rs)) => T + | C_BNEZ ((v__612, rs)) => T + | C_SLLI ((v__613, rsd)) => + if (let (nzui5 : 1 bits) = ((subrange_vec_dec v__613 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__613 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__613 (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) in + ((((((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((nzui5 = ((bool_to_bits F : 1 words$word))))))))))))) + then + T + else F + | C_LWSP ((v__614, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then T else F + | C_LDSP ((v__615, rd)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii))))))) + then + T + else F + | C_SWSP ((v__616, rs2)) => T + | C_SDSP ((v__617, rs2)) => if ((((( 32 : int):ii) = (( 64 : int):ii)))) then T else F + | C_JR (rs1) => if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then T else F + | C_JALR (rs1) => + if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then T else F + | C_MV ((rd, rs2)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + T + else F + | C_EBREAK (() ) => T + | C_ADD ((rsd, rs2)) => + if ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + T + else F + | C_ILLEGAL (s) => T + | _ => F + )))`; + + +(*val encdec_compressed_backwards_matches : mword ty16 -> bool*) + +val _ = Define ` + ((encdec_compressed_backwards_matches:(16)words$word -> bool) arg_= + (let v__618 = arg_ in + if (((v__618 = (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1] : 16 words$word)))) + then + T + else if ((((let (nz96 : 4 bits) = ((subrange_vec_dec v__618 (( 10 : int):ii) (( 7 : int):ii) : 4 words$word)) in + let (nz54 : 2 bits) = ((subrange_vec_dec v__618 (( 12 : int):ii) (( 11 : int):ii) : 2 words$word)) in + let (nz3 : 1 bits) = ((subrange_vec_dec v__618 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nz2 : 1 bits) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + (((concat_vec nz96 + ((concat_vec nz54 ((concat_vec nz3 nz2 : 2 words$word)) : 4 words$word)) + : 8 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word))))))) then + T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word))))))) then + T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))))))))) then + T + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__618 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzi40 : 5 bits) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((concat_vec nzi5 nzi40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if (((((((( 32 : int):ii) = (( 32 : int):ii)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii)))))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((let (rd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rd)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((let (nzi9 : 1 bits) = ((subrange_vec_dec v__618 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzi87 : 2 bits) = ((subrange_vec_dec v__618 (( 4 : int):ii) (( 3 : int):ii) : 2 words$word)) in + let (nzi6 : 1 bits) = ((subrange_vec_dec v__618 (( 5 : int):ii) (( 5 : int):ii) : 1 words$word)) in + let (nzi5 : 1 bits) = ((subrange_vec_dec v__618 (( 2 : int):ii) (( 2 : int):ii) : 1 words$word)) in + let (nzi4 : 1 bits) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 6 : int):ii) : 1 words$word)) in + (((concat_vec nzi9 + ((concat_vec nzi87 + ((concat_vec nzi6 ((concat_vec nzi5 nzi4 : 2 words$word)) : 3 words$word)) + : 5 words$word)) + : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ ((((((((regidx_to_regno ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)))) = ((regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : 5 words$word)))))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + T + else if ((((let (rd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (imm17 : 1 bits) = ((subrange_vec_dec v__618 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (imm1612 : 5 bits) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ (((((concat_vec imm17 imm1612 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))))))))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((let (nzui5 : 1 bits) = ((subrange_vec_dec v__618 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + T + else if ((((let (nzui5 : 1 bits) = ((subrange_vec_dec v__618 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + (((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B0] : 3 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 11 : int):ii) (( 10 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B0;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))))))))) then + T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B1;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 10 : int):ii) : 6 words$word)) = (vec_of_bits [B1;B0;B0;B1;B1;B1] : 6 words$word)))) /\ ((((((((subrange_vec_dec v__618 (( 6 : int):ii) (( 5 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B0;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + T + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (nzui5 : 1 bits) = ((subrange_vec_dec v__618 (( 12 : int):ii) (( 12 : int):ii) : 1 words$word)) in + let (nzui40 : 5 bits) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((concat_vec nzui5 nzui40 : 6 words$word)) <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((((( 32 : int):ii) = (( 64 : int):ii)))) \/ (((nzui5 = ((bool_to_bits F : 1 words$word))))))))))))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + T + else if ((((let (rd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rd)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + T + else if ((((let (rd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii)))))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + T + else if ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B0] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word))))))) then + T + else if (((((((( 32 : int):ii) = (( 64 : int):ii)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 13 : int):ii) : 3 words$word)) = (vec_of_bits [B1;B1;B1] : 3 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + T + else if ((((let (rs1 : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__618 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0] : 7 words$word)))))))))) then + T + else if ((((let (rs1 : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg)))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B1] : 4 words$word)))) /\ (((((subrange_vec_dec v__618 (( 6 : int):ii) (( 0 : int):ii) : 7 words$word)) = (vec_of_bits [B0;B0;B0;B0;B0;B1;B0] : 7 words$word)))))))))) then + T + else if ((((let (rs2 : regidx) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + let (rd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg))))))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B0] : 4 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + T + else if (((v__618 = (vec_of_bits [B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B1;B0] : 16 words$word)))) then + T + else if ((((let (rsd : regidx) = ((subrange_vec_dec v__618 (( 11 : int):ii) (( 7 : int):ii) : 5 words$word)) in + let (rs2 : regidx) = ((subrange_vec_dec v__618 (( 6 : int):ii) (( 2 : int):ii) : 5 words$word)) in + ((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg))))))) /\ ((((((((subrange_vec_dec v__618 (( 15 : int):ii) (( 12 : int):ii) : 4 words$word)) = (vec_of_bits [B1;B0;B0;B1] : 4 words$word)))) /\ (((((subrange_vec_dec v__618 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))))))))) then + T + else T))`; + + +(*val execute_WFI : unit -> M Retired*) + +val _ = Define ` + ((execute_WFI:unit ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__0 : Privilege) . + (case w__0 of + Machine => sail2_state_monad$seqS (platform_wfi () ) (sail2_state_monad$returnS RETIRE_SUCCESS) + | Supervisor => sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__1 : Mstatus) . + if (((((get_Mstatus_TW w__1 : 1 words$word)) = ((bool_to_bits T : 1 words$word))))) then sail2_state_monad$seqS + (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$seqS (platform_wfi () ) (sail2_state_monad$returnS RETIRE_SUCCESS)) + | User => sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL) + ))))`; + + +(*val execute_UTYPE : mword ty20 -> mword ty5 -> uop -> M Retired*) + +val _ = Define ` + ((execute_UTYPE:(20)words$word ->(5)words$word -> uop ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rd op= + (let (off : xlenbits) = + ((EXTS (( 32 : int):ii) + ((concat_vec imm (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0] : 12 words$word) + : 32 words$word)) + : 32 words$word)) in sail2_state_monad$bindS + (case op of + RISCV_LUI => sail2_state_monad$returnS off + | RISCV_AUIPC => sail2_state_monad$bindS + (get_arch_pc () : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + sail2_state_monad$returnS ((add_vec w__0 off : 32 words$word))) + ) (\ (ret : xlenbits) . sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ret) (sail2_state_monad$returnS RETIRE_SUCCESS))))`; + + +(*val execute_URET : unit -> M Retired*) + +val _ = Define ` + ((execute_URET:unit ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (haveUsrMode () ) (\ (w__0 : bool) . sail2_state_monad$seqS + (if ((~ w__0)) then handle_illegal () + else sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__1 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__2 : 32 words$word) . sail2_state_monad$bindS + (exception_handler w__1 (CTL_URET () ) w__2 : ( 32 words$word) M) (\ (w__3 : 32 words$word) . + set_next_pc w__3)))) + (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_STORECON : bool -> bool -> mword ty5 -> mword ty5 -> word_width -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_STORECON:bool -> bool ->(5)words$word ->(5)words$word -> word_width ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) aq rl rs2 rs1 width rd= (sail2_state_monad$bindS + (speculate_conditional_success () ) (\ (w__0 : bool) . + if (((w__0 = F))) then sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((EXTZ (( 32 : int):ii) (vec_of_bits [B1] : 1 words$word) : 32 words$word))) + (sail2_state_monad$returnS RETIRE_SUCCESS) + else sail2_state_monad$bindS + (haveAtomics () ) (\ (w__1 : bool) . + if w__1 then sail2_state_monad$bindS + (ext_data_get_addr rs1 ((zeros_implicit (( 32 : int):ii) : 32 words$word)) Write width) (\ (w__2 : unit + Ext_DataAddr_Check) . + (case w__2 of + Ext_DataAddr_Error (e) => + let (_ : unit) = (ext_handle_data_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_DataAddr_OK (vaddr) => + let (aligned : bool) = + ((case width of + BYTE => T + | HALF => + (((cast_unit_vec0 ((access_vec_dec vaddr (( 0 : int):ii))) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)) + | WORD => + (((subrange_vec_dec vaddr (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)) + | DOUBLE => + (((subrange_vec_dec vaddr (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)) + )) in + if ((~ aligned)) then sail2_state_monad$seqS (handle_mem_exception vaddr E_SAMO_Addr_Align) (sail2_state_monad$returnS RETIRE_FAIL) + else if (((((match_reservation vaddr)) = F))) then sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((EXTZ (( 32 : int):ii) (vec_of_bits [B1] : 1 words$word) : 32 words$word))) + (let (_ : unit) = (cancel_reservation () ) in + sail2_state_monad$returnS RETIRE_SUCCESS) + else sail2_state_monad$bindS + (translateAddr vaddr Write : ( (( 32 words$word), ExceptionType)TR_Result) M) (\ (w__3 : (( 32 words$word), ExceptionType) + TR_Result) . + (case w__3 of + TR_Failure (e) => sail2_state_monad$seqS (handle_mem_exception vaddr e) (sail2_state_monad$returnS RETIRE_FAIL) + | TR_Address (addr) => sail2_state_monad$bindS + (case (width, (( 32 : int):ii)) of + (WORD, _) => mem_write_ea addr (( 4 : int):ii) aq rl T + | _ => internal_error "STORECON expected word or double" + ) (\ (eares : unit MemoryOpResult) . + (case eares of + MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + | MemValue (_) => sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ rs2_val . sail2_state_monad$bindS + (case (width, (( 32 : int):ii)) of + (WORD, _) => + mem_write_value addr (( 4 : int):ii) + ((subrange_vec_dec rs2_val (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) aq rl T + | _ => internal_error "STORECON expected word or double" + ) (\ (res : bool MemoryOpResult) . + (case res of + MemValue (T) => sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) + ((EXTZ (( 32 : int):ii) (vec_of_bits [B0] : 1 words$word) : 32 words$word))) + (let (_ : unit) = (cancel_reservation () ) in + sail2_state_monad$returnS RETIRE_SUCCESS) + | MemValue (F) => sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) + ((EXTZ (( 32 : int):ii) (vec_of_bits [B1] : 1 words$word) : 32 words$word))) + (let (_ : unit) = (cancel_reservation () ) in + sail2_state_monad$returnS RETIRE_SUCCESS) + | MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + ))) + )) + )) + )) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL)))))`; + + +(*val execute_STORE : mword ty12 -> mword ty5 -> mword ty5 -> word_width -> bool -> bool -> M Retired*) + +val _ = Define ` + ((execute_STORE:(12)words$word ->(5)words$word ->(5)words$word -> word_width -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rs2 rs1 width aq rl= + (let (offset : xlenbits) = ((EXTS (( 32 : int):ii) imm : 32 words$word)) in sail2_state_monad$bindS + (ext_data_get_addr rs1 offset Write width) (\ (w__0 : unit Ext_DataAddr_Check) . + (case w__0 of + Ext_DataAddr_Error (e) => + let (_ : unit) = (ext_handle_data_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_DataAddr_OK (vaddr) => + if ((check_misaligned vaddr width)) then sail2_state_monad$seqS + (handle_mem_exception vaddr E_SAMO_Addr_Align) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$bindS + (translateAddr vaddr Write : ( (( 32 words$word), ExceptionType)TR_Result) M) (\ (w__1 : (( 32 words$word), ExceptionType) + TR_Result) . + (case w__1 of + TR_Failure (e) => sail2_state_monad$seqS (handle_mem_exception vaddr e) (sail2_state_monad$returnS RETIRE_FAIL) + | TR_Address (addr) => sail2_state_monad$bindS + (case width of + BYTE => mem_write_ea addr (( 1 : int):ii) aq rl F + | HALF => mem_write_ea addr (( 2 : int):ii) aq rl F + | WORD => mem_write_ea addr (( 4 : int):ii) aq rl F + | DOUBLE => mem_write_ea addr (( 8 : int):ii) aq rl F + ) (\ (eares : unit MemoryOpResult) . + (case eares of + MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + | MemValue (_) => sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ rs2_val . sail2_state_monad$bindS + (case (width, (( 32 : int):ii)) of + (BYTE, _) => + mem_write_value addr (( 1 : int):ii) ((subrange_vec_dec rs2_val (( 7 : int):ii) (( 0 : int):ii) : 8 words$word)) + aq rl F + | (HALF, _) => + mem_write_value addr (( 2 : int):ii) + ((subrange_vec_dec rs2_val (( 15 : int):ii) (( 0 : int):ii) : 16 words$word)) aq rl F + | (WORD, _) => + mem_write_value addr (( 4 : int):ii) + ((subrange_vec_dec rs2_val (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) aq rl F + ) (\ (res : bool MemoryOpResult) . + (case res of + MemValue (T) => sail2_state_monad$returnS RETIRE_SUCCESS + | MemValue (F) => internal_error "store got false from mem_write_value" + | MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + ))) + )) + )) + ))))`; + + +(*val execute_SRET : unit -> M Retired*) + +val _ = Define ` + ((execute_SRET:unit ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__0 : Privilege) . sail2_state_monad$seqS + (case w__0 of + User => handle_illegal () + | Supervisor => sail2_state_monad$bindS + (sail2_state$or_boolS ( sail2_state_monad$bindS(haveSupMode () ) (\ (w__1 : bool) . sail2_state_monad$returnS ((~ w__1)))) + ( sail2_state_monad$bindS(sail2_state_monad$read_regS mstatus_ref) (\ (w__2 : Mstatus) . + sail2_state_monad$returnS (((((get_Mstatus_TSR w__2 : 1 words$word)) = ((bool_to_bits T : 1 words$word)))))))) (\ (w__3 : + bool) . + if w__3 then handle_illegal () + else sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__4 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__5 : 32 words$word) . sail2_state_monad$bindS + (exception_handler w__4 (CTL_SRET () ) w__5 : ( 32 words$word) M) (\ (w__6 : 32 words$word) . + set_next_pc w__6)))) + | Machine => sail2_state_monad$bindS + (haveSupMode () ) (\ (w__7 : bool) . + if ((~ w__7)) then handle_illegal () + else sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__8 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__9 : 32 words$word) . sail2_state_monad$bindS + (exception_handler w__8 (CTL_SRET () ) w__9 : ( 32 words$word) M) (\ (w__10 : 32 words$word) . + set_next_pc w__10)))) + ) + (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_SHIFTW : mword ty5 -> mword ty5 -> mword ty5 -> sop -> M Retired*) + +val _ = Define ` + ((execute_SHIFTW:(5)words$word ->(5)words$word ->(5)words$word -> sop ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) shamt rs1 rd op= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + let rs1_val = ((subrange_vec_dec w__0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in + let (result : 32 bits) = + ((case op of + RISCV_SLLI => (shift_bits_left rs1_val shamt : 32 words$word) + | RISCV_SRLI => (shift_bits_right rs1_val shamt : 32 words$word) + | RISCV_SRAI => (shift_right_arith32 rs1_val shamt : 32 words$word) + )) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((EXTS (( 32 : int):ii) result : 32 words$word))) (sail2_state_monad$returnS RETIRE_SUCCESS))))`; + + +(*val execute_SHIFTIWOP : mword ty5 -> mword ty5 -> mword ty5 -> sopw -> M Retired*) + +val _ = Define ` + ((execute_SHIFTIWOP:(5)words$word ->(5)words$word ->(5)words$word -> sopw ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) shamt rs1 rd op= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . + let (result : 32 bits) = + ((case op of + RISCV_SLLIW => + (shift_bits_left ((subrange_vec_dec rs1_val (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) shamt + : 32 words$word) + | RISCV_SRLIW => + (shift_bits_right ((subrange_vec_dec rs1_val (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) shamt + : 32 words$word) + | RISCV_SRAIW => + (shift_right_arith32 ((subrange_vec_dec rs1_val (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) shamt + : 32 words$word) + )) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((EXTS (( 32 : int):ii) result : 32 words$word))) (sail2_state_monad$returnS RETIRE_SUCCESS))))`; + + +(*val execute_SHIFTIOP : mword ty6 -> mword ty5 -> mword ty5 -> sop -> M Retired*) + +val _ = Define ` + ((execute_SHIFTIOP:(6)words$word ->(5)words$word ->(5)words$word -> sop ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) shamt rs1 rd op= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . + let (result : xlenbits) = + ((case op of + RISCV_SLLI => + (shift_bits_left rs1_val ((subrange_vec_dec shamt (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) : 32 words$word) + | RISCV_SRLI => + (shift_bits_right rs1_val ((subrange_vec_dec shamt (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + | RISCV_SRAI => + (shift_right_arith32 rs1_val ((subrange_vec_dec shamt (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + )) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) result) (sail2_state_monad$returnS RETIRE_SUCCESS))))`; + + +(*val execute_SFENCE_VMA : mword ty5 -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_SFENCE_VMA:(5)words$word ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs1 rs2= (sail2_state_monad$bindS + (if (((((regidx_to_regno rs1)) = (( 0 : int):ii)))) then sail2_state_monad$returnS NONE + else sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + sail2_state_monad$returnS (SOME w__0))) (\ (addr : xlenbits option) . sail2_state_monad$bindS + (if (((((regidx_to_regno rs2)) = (( 0 : int):ii)))) then sail2_state_monad$returnS NONE + else sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + sail2_state_monad$returnS (SOME w__1))) (\ (asid : xlenbits option) . sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__2 : Privilege) . + (case w__2 of + User => sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL) + | Supervisor => sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__3 : Mstatus) . sail2_state_monad$bindS + (sail2_state_monad$read_regS mstatus_ref) (\ (w__4 : Mstatus) . + let p__1 = + (architecture ((get_mstatus_SXL w__3 : 2 words$word)), (get_Mstatus_TVM w__4 : 1 words$word)) in + (case p__1 of + (SOME (g__0), v_0) => + if (((v_0 = ((bool_to_bits T : 1 words$word))))) then sail2_state_monad$seqS + (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL) + else if (((v_0 = ((bool_to_bits F : 1 words$word))))) then sail2_state_monad$seqS + (flush_TLB asid addr) (sail2_state_monad$returnS RETIRE_SUCCESS) + else + (case (SOME g__0, v_0) of + (_, _) => internal_error "unimplemented sfence architecture" + ) + | (_, _) => internal_error "unimplemented sfence architecture" + ))) + | Machine => sail2_state_monad$seqS (flush_TLB asid addr) (sail2_state_monad$returnS RETIRE_SUCCESS) + ))))))`; + + +(*val execute_RTYPEW : mword ty5 -> mword ty5 -> mword ty5 -> ropw -> M Retired*) + +val _ = Define ` + ((execute_RTYPEW:(5)words$word ->(5)words$word ->(5)words$word -> ropw ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd op= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + let rs1_val = ((subrange_vec_dec w__0 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + let rs2_val = ((subrange_vec_dec w__1 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in + let (result : 32 bits) = + ((case op of + RISCV_ADDW => (add_vec rs1_val rs2_val : 32 words$word) + | RISCV_SUBW => (sub_vec rs1_val rs2_val : 32 words$word) + | RISCV_SLLW => + (shift_bits_left rs1_val ((subrange_vec_dec rs2_val (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + | RISCV_SRLW => + (shift_bits_right rs1_val ((subrange_vec_dec rs2_val (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + | RISCV_SRAW => + (shift_right_arith32 rs1_val ((subrange_vec_dec rs2_val (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + )) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((EXTS (( 32 : int):ii) result : 32 words$word))) (sail2_state_monad$returnS RETIRE_SUCCESS)))))`; + + +(*val execute_RTYPE : mword ty5 -> mword ty5 -> mword ty5 -> rop -> M Retired*) + +val _ = Define ` + ((execute_RTYPE:(5)words$word ->(5)words$word ->(5)words$word -> rop ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd op= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ rs2_val . + let (result : xlenbits) = + ((case op of + RISCV_ADD => (add_vec rs1_val rs2_val : 32 words$word) + | RISCV_SLT => + (EXTZ (( 32 : int):ii) ((bool_to_bits ((zopz0zI_s rs1_val rs2_val)) : 1 words$word)) : 32 words$word) + | RISCV_SLTU => + (EXTZ (( 32 : int):ii) ((bool_to_bits ((zopz0zI_u rs1_val rs2_val)) : 1 words$word)) : 32 words$word) + | RISCV_AND => (and_vec rs1_val rs2_val : 32 words$word) + | RISCV_OR => (or_vec rs1_val rs2_val : 32 words$word) + | RISCV_XOR => (xor_vec rs1_val rs2_val : 32 words$word) + | RISCV_SLL => + (shift_bits_left rs1_val ((subrange_vec_dec rs2_val (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + | RISCV_SRL => + (shift_bits_right rs1_val ((subrange_vec_dec rs2_val (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + | RISCV_SUB => (sub_vec rs1_val rs2_val : 32 words$word) + | RISCV_SRA => + (shift_right_arith32 rs1_val ((subrange_vec_dec rs2_val (( 4 : int):ii) (( 0 : int):ii) : 5 words$word)) + : 32 words$word) + )) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) result) (sail2_state_monad$returnS RETIRE_SUCCESS)))))`; + + +(*val execute_RISCV_JALR : mword ty12 -> mword ty5 -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_RISCV_JALR:(12)words$word ->(5)words$word ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rs1 rd= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + let (t : xlenbits) = ((add_vec w__0 ((EXTS (( 32 : int):ii) imm : 32 words$word)) : 32 words$word)) in + (case ((ext_control_check_addr t)) of + Ext_ControlAddr_Error (e) => + let (_ : unit) = (ext_handle_control_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_ControlAddr_OK (addr) => + let target = ((update_vec_dec addr (( 0 : int):ii) B0 : 32 words$word)) in sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bit_to_bool ((access_vec_dec target (( 1 : int):ii)))))) + ( sail2_state_monad$bindS(haveRVC () ) (\ (w__1 : bool) . sail2_state_monad$returnS ((~ w__1))))) (\ (w__2 : bool) . + if w__2 then sail2_state_monad$seqS (handle_mem_exception target E_Fetch_Addr_Align) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$bindS + (get_next_pc () : ( 32 words$word) M) (\ (w__3 : 32 words$word) . sail2_state_monad$seqS (sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) w__3) (set_next_pc target)) (sail2_state_monad$returnS RETIRE_SUCCESS))) + ))))`; + + +(*val execute_RISCV_JAL : mword ty21 -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_RISCV_JAL:(21)words$word ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rd= (sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + let (t : xlenbits) = ((add_vec w__0 ((EXTS (( 32 : int):ii) imm : 32 words$word)) : 32 words$word)) in + (case ((ext_control_check_pc t)) of + Ext_ControlAddr_Error (e) => + let (_ : unit) = (ext_handle_control_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_ControlAddr_OK (target) => sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bit_to_bool ((access_vec_dec target (( 1 : int):ii)))))) + ( sail2_state_monad$bindS(haveRVC () ) (\ (w__1 : bool) . sail2_state_monad$returnS ((~ w__1))))) (\ (w__2 : bool) . + if w__2 then sail2_state_monad$seqS (handle_mem_exception target E_Fetch_Addr_Align) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$bindS + (get_next_pc () : ( 32 words$word) M) (\ (w__3 : 32 words$word) . sail2_state_monad$seqS (sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) w__3) (set_next_pc target)) (sail2_state_monad$returnS RETIRE_SUCCESS))) + ))))`; + + +(*val execute_REMW : mword ty5 -> mword ty5 -> mword ty5 -> bool -> M Retired*) + +val _ = Define ` + ((execute_REMW:(5)words$word ->(5)words$word ->(5)words$word -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd s= (sail2_state_monad$bindS + (haveMulDiv () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + let rs1_val = ((subrange_vec_dec w__1 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ (w__2 : 32 words$word) . + let rs2_val = ((subrange_vec_dec w__2 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in + let (rs1_int : ii) = (if s then integer_word$w2i rs1_val else lem$w2ui rs1_val) in + let (rs2_int : ii) = (if s then integer_word$w2i rs2_val else lem$w2ui rs2_val) in + let (r : ii) = (if (((rs2_int = (( 0 : int):ii)))) then rs1_int else hardware_mod rs1_int rs2_int) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((EXTS (( 32 : int):ii) ((to_bits (( 32 : int):ii) r : 32 words$word)) : 32 words$word))) + (sail2_state_monad$returnS RETIRE_SUCCESS))) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_REM : mword ty5 -> mword ty5 -> mword ty5 -> bool -> M Retired*) + +val _ = Define ` + ((execute_REM:(5)words$word ->(5)words$word ->(5)words$word -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd s= (sail2_state_monad$bindS + (haveMulDiv () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ rs2_val . + let (rs1_int : ii) = (if s then integer_word$w2i rs1_val else lem$w2ui rs1_val) in + let (rs2_int : ii) = (if s then integer_word$w2i rs2_val else lem$w2ui rs2_val) in + let (r : ii) = (if (((rs2_int = (( 0 : int):ii)))) then rs1_int else hardware_mod rs1_int rs2_int) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((to_bits (( 32 : int):ii) r : 32 words$word))) (sail2_state_monad$returnS RETIRE_SUCCESS))) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_MULW : mword ty5 -> mword ty5 -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_MULW:(5)words$word ->(5)words$word ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd= (sail2_state_monad$bindS + (haveMulDiv () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + let rs1_val = ((subrange_vec_dec w__1 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ (w__2 : 32 words$word) . + let rs2_val = ((subrange_vec_dec w__2 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in + let (rs1_int : ii) = (integer_word$w2i rs1_val) in + let (rs2_int : ii) = (integer_word$w2i rs2_val) in + let result32 = + ((subrange_vec_dec ((to_bits (( 64 : int):ii) ((rs1_int * rs2_int)) : 64 words$word)) (( 31 : int):ii) + (( 0 : int):ii) + : 32 words$word)) in + let (result : xlenbits) = ((EXTS (( 32 : int):ii) result32 : 32 words$word)) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) result) (sail2_state_monad$returnS RETIRE_SUCCESS))) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_MUL : mword ty5 -> mword ty5 -> mword ty5 -> bool -> bool -> bool -> M Retired*) + +val _ = Define ` + ((execute_MUL:(5)words$word ->(5)words$word ->(5)words$word -> bool -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd high signed1 signed2= (sail2_state_monad$bindS + (haveMulDiv () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ rs2_val . + let (rs1_int : ii) = (if signed1 then integer_word$w2i rs1_val else lem$w2ui rs1_val) in + let (rs2_int : ii) = (if signed2 then integer_word$w2i rs2_val else lem$w2ui rs2_val) in + let result_wide = + ((to_bits (((( 2 : int):ii) * (( 32 : int):ii))) ((rs1_int * rs2_int)) : 64 words$word)) in + let result = + (if high then + (subrange_vec_dec result_wide (((((( 2 : int):ii) * (( 32 : int):ii))) - (( 1 : int):ii))) + (( 32 : int):ii) + : 32 words$word) + else (subrange_vec_dec result_wide (((( 32 : int):ii) - (( 1 : int):ii))) (( 0 : int):ii) : 32 words$word)) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) result) (sail2_state_monad$returnS RETIRE_SUCCESS))) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_MRET : unit -> M Retired*) + +val _ = Define ` + ((execute_MRET:unit ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__0 : Privilege) . sail2_state_monad$seqS + (if (((((privLevel_to_bits w__0 : 2 words$word)) = ((privLevel_to_bits Machine : 2 words$word))))) + then sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__1 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__2 : 32 words$word) . sail2_state_monad$bindS + (exception_handler w__1 (CTL_MRET () ) w__2 : ( 32 words$word) M) (\ (w__3 : 32 words$word) . + set_next_pc w__3))) + else handle_illegal () ) + (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_LOADRES : bool -> bool -> mword ty5 -> word_width -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_LOADRES:bool -> bool ->(5)words$word -> word_width ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) aq rl rs1 width rd= (sail2_state_monad$bindS + (haveAtomics () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (ext_data_get_addr rs1 ((zeros_implicit (( 32 : int):ii) : 32 words$word)) Read width) (\ (w__1 : unit + Ext_DataAddr_Check) . + (case w__1 of + Ext_DataAddr_Error (e) => + let (_ : unit) = (ext_handle_data_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_DataAddr_OK (vaddr) => + let (aligned : bool) = + ((case width of + BYTE => T + | HALF => + (((cast_unit_vec0 ((access_vec_dec vaddr (( 0 : int):ii))) : 1 words$word)) = (vec_of_bits [B0] : 1 words$word)) + | WORD => + (((subrange_vec_dec vaddr (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)) + | DOUBLE => + (((subrange_vec_dec vaddr (( 2 : int):ii) (( 0 : int):ii) : 3 words$word)) = (vec_of_bits [B0;B0;B0] : 3 words$word)) + )) in + if ((~ aligned)) then sail2_state_monad$seqS (handle_mem_exception vaddr E_Load_Addr_Align) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$bindS + (translateAddr vaddr Read : ( (( 32 words$word), ExceptionType)TR_Result) M) (\ (w__2 : (( 32 words$word), ExceptionType) + TR_Result) . + (case w__2 of + TR_Failure (e) => sail2_state_monad$seqS (handle_mem_exception vaddr e) (sail2_state_monad$returnS RETIRE_FAIL) + | TR_Address (addr) => + (case (width, (( 32 : int):ii)) of + (WORD, _) => sail2_state_monad$bindS + (mem_read Read addr (( 4 : int):ii) aq rl T : ( ( 32 words$word)MemoryOpResult) M) (\ (w__3 : ( 32 words$word) + MemoryOpResult) . + process_loadres rd vaddr w__3 F) + | _ => internal_error "LOADRES expected WORD or DOUBLE" + ) + )) + )) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_LOAD : mword ty12 -> mword ty5 -> mword ty5 -> bool -> word_width -> bool -> bool -> M Retired*) + +val _ = Define ` + ((execute_LOAD:(12)words$word ->(5)words$word ->(5)words$word -> bool -> word_width -> bool -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rs1 rd is_unsigned width aq rl= + (let (offset : xlenbits) = ((EXTS (( 32 : int):ii) imm : 32 words$word)) in sail2_state_monad$bindS + (ext_data_get_addr rs1 offset Read width) (\ (w__0 : unit Ext_DataAddr_Check) . + (case w__0 of + Ext_DataAddr_Error (e) => + let (_ : unit) = (ext_handle_data_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_DataAddr_OK (vaddr) => + if ((check_misaligned vaddr width)) then sail2_state_monad$seqS + (handle_mem_exception vaddr E_Load_Addr_Align) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$bindS + (translateAddr vaddr Read : ( (( 32 words$word), ExceptionType)TR_Result) M) (\ (w__1 : (( 32 words$word), ExceptionType) + TR_Result) . + (case w__1 of + TR_Failure (e) => sail2_state_monad$seqS (handle_mem_exception vaddr e) (sail2_state_monad$returnS RETIRE_FAIL) + | TR_Address (addr) => + (case (width, (( 32 : int):ii)) of + (BYTE, _) => sail2_state_monad$bindS + (mem_read Read addr (( 1 : int):ii) aq rl F : ( ( 8 words$word)MemoryOpResult) M) (\ (w__2 : ( 8 words$word) + MemoryOpResult) . + process_load rd vaddr w__2 is_unsigned) + | (HALF, _) => sail2_state_monad$bindS + (mem_read Read addr (( 2 : int):ii) aq rl F : ( ( 16 words$word)MemoryOpResult) M) (\ (w__4 : ( 16 words$word) + MemoryOpResult) . + process_load rd vaddr w__4 is_unsigned) + | (WORD, _) => sail2_state_monad$bindS + (mem_read Read addr (( 4 : int):ii) aq rl F : ( ( 32 words$word)MemoryOpResult) M) (\ (w__6 : ( 32 words$word) + MemoryOpResult) . + process_load rd vaddr w__6 is_unsigned) + ) + )) + ))))`; + + +(*val execute_ITYPE : mword ty12 -> mword ty5 -> mword ty5 -> iop -> M Retired*) + +val _ = Define ` + ((execute_ITYPE:(12)words$word ->(5)words$word ->(5)words$word -> iop ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rs1 rd op= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . + let (immext : xlenbits) = ((EXTS (( 32 : int):ii) imm : 32 words$word)) in + let (result : xlenbits) = + ((case op of + RISCV_ADDI => (add_vec rs1_val immext : 32 words$word) + | RISCV_SLTI => + (EXTZ (( 32 : int):ii) ((bool_to_bits ((zopz0zI_s rs1_val immext)) : 1 words$word)) : 32 words$word) + | RISCV_SLTIU => + (EXTZ (( 32 : int):ii) ((bool_to_bits ((zopz0zI_u rs1_val immext)) : 1 words$word)) : 32 words$word) + | RISCV_ANDI => (and_vec rs1_val immext : 32 words$word) + | RISCV_ORI => (or_vec rs1_val immext : 32 words$word) + | RISCV_XORI => (xor_vec rs1_val immext : 32 words$word) + )) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) result) (sail2_state_monad$returnS RETIRE_SUCCESS))))`; + + +(*val execute_ILLEGAL : mword ty32 -> M Retired*) + +val _ = Define ` + ((execute_ILLEGAL:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= (sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL)))`; + + +(*val execute_FENCE_TSO : mword ty4 -> mword ty4 -> M Retired*) + +val _ = Define ` + ((execute_FENCE_TSO:(4)words$word ->(4)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) pred succ= (sail2_state_monad$seqS + (case (pred, succ) of + (v__794, v__795) => + if ((((((((subrange_vec_dec v__794 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__795 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word))))))) then + barrier Barrier_RISCV_tso + else + sail2_state_monad$returnS (if ((((((((subrange_vec_dec v__794 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__795 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word))))))) then + () + else + let (_ : unit) = (print_endline "FIXME: unsupported fence") in + () ) + ) + (sail2_state_monad$returnS RETIRE_SUCCESS)))`; + + +(*val execute_FENCEI : unit -> Retired*) + +val _ = Define ` + ((execute_FENCEI:unit -> Retired) () = RETIRE_SUCCESS)`; + + +(*val execute_FENCE : mword ty4 -> mword ty4 -> M Retired*) + +val _ = Define ` + ((execute_FENCE:(4)words$word ->(4)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) pred succ= (sail2_state_monad$seqS + (case (pred, succ) of + (v__754, v__755) => + if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word))))))) then + barrier Barrier_RISCV_rw_rw + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word))))))) then + barrier Barrier_RISCV_r_rw + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word))))))) then + barrier Barrier_RISCV_r_r + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + barrier Barrier_RISCV_rw_w + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + barrier Barrier_RISCV_w_w + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word))))))) then + barrier Barrier_RISCV_w_rw + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word))))))) then + barrier Barrier_RISCV_rw_r + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word))))))) then + barrier Barrier_RISCV_r_w + else if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B1] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B0] : 2 words$word))))))) then + barrier Barrier_RISCV_w_r + else + sail2_state_monad$returnS (if ((((((((subrange_vec_dec v__754 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word)))) /\ (((((subrange_vec_dec v__755 (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B0;B0] : 2 words$word))))))) then + () + else + let (_ : unit) = (print_endline "FIXME: unsupported fence") in + () ) + ) + (sail2_state_monad$returnS RETIRE_SUCCESS)))`; + + +(*val execute_ECALL : unit -> M Retired*) + +val _ = Define ` + ((execute_ECALL:unit ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__0 : Privilege) . + let (t : sync_exception) = + (<| sync_exception_trap := + ((case w__0 of + User => E_U_EnvCall + | Supervisor => E_S_EnvCall + | Machine => E_M_EnvCall + )); + sync_exception_excinfo := NONE; + sync_exception_ext := NONE |>) in sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__1 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__2 : 32 words$word) . sail2_state_monad$bindS + (exception_handler w__1 (CTL_TRAP t) w__2 : ( 32 words$word) M) (\ (w__3 : 32 words$word) . sail2_state_monad$seqS + (set_next_pc w__3) (sail2_state_monad$returnS RETIRE_FAIL)))))))`; + + +(*val execute_EBREAK : unit -> M Retired*) + +val _ = Define ` + ((execute_EBREAK:unit ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . sail2_state_monad$seqS + (handle_mem_exception w__0 E_Breakpoint) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_DIVW : mword ty5 -> mword ty5 -> mword ty5 -> bool -> M Retired*) + +val _ = Define ` + ((execute_DIVW:(5)words$word ->(5)words$word ->(5)words$word -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd s= (sail2_state_monad$bindS + (haveMulDiv () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + let rs1_val = ((subrange_vec_dec w__1 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ (w__2 : 32 words$word) . + let rs2_val = ((subrange_vec_dec w__2 (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) in + let (rs1_int : ii) = (if s then integer_word$w2i rs1_val else lem$w2ui rs1_val) in + let (rs2_int : ii) = (if s then integer_word$w2i rs2_val else lem$w2ui rs2_val) in + let (q : ii) = (if (((rs2_int = (( 0 : int):ii)))) then ((( 0 : int)-( 1 : int)):ii) else hardware_quot rs1_int rs2_int) in + let (q' : ii) = + (if (((s /\ ((q > ((((pow2 (( 31 : int):ii))) - (( 1 : int):ii)))))))) then + (( 0 : int):ii) - ((pow0 (( 2 : int):ii) (( 31 : int):ii))) + else q) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((EXTS (( 32 : int):ii) ((to_bits (( 32 : int):ii) q' : 32 words$word)) : 32 words$word))) + (sail2_state_monad$returnS RETIRE_SUCCESS))) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_DIV : mword ty5 -> mword ty5 -> mword ty5 -> bool -> M Retired*) + +val _ = Define ` + ((execute_DIV:(5)words$word ->(5)words$word ->(5)words$word -> bool ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) rs2 rs1 rd s= (sail2_state_monad$bindS + (haveMulDiv () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ rs2_val . + let (rs1_int : ii) = (if s then integer_word$w2i rs1_val else lem$w2ui rs1_val) in + let (rs2_int : ii) = (if s then integer_word$w2i rs2_val else lem$w2ui rs2_val) in + let (q : ii) = (if (((rs2_int = (( 0 : int):ii)))) then ((( 0 : int)-( 1 : int)):ii) else hardware_quot rs1_int rs2_int) in + let (q' : ii) = (if (((s /\ ((q > xlen_max_signed))))) then xlen_min_signed else q) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) ((to_bits (( 32 : int):ii) q' : 32 words$word))) (sail2_state_monad$returnS RETIRE_SUCCESS))) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_C_NOP : unit -> Retired*) + +val _ = Define ` + ((execute_C_NOP:unit -> Retired) () = RETIRE_SUCCESS)`; + + +(*val execute_C_ILLEGAL : mword ty16 -> M Retired*) + +val _ = Define ` + ((execute_C_ILLEGAL:(16)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) s= (sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL)))`; + + +(*val execute_CSR : mword ty12 -> mword ty5 -> mword ty5 -> bool -> csrop -> M Retired*) + +val _ = Define ` + ((execute_CSR:(12)words$word ->(5)words$word ->(5)words$word -> bool -> csrop ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) csr rs1 rd is_imm op= (sail2_state_monad$bindS + (if is_imm then sail2_state_monad$returnS ((EXTZ (( 32 : int):ii) rs1 : 32 words$word)) + else (rX ((regidx_to_regno rs1)) : ( 32 words$word) M)) (\ (rs1_val : xlenbits) . + let (isWrite : bool) = + ((case op of + CSRRW => T + | _ => if is_imm then (((lem$w2ui rs1_val)) <> (( 0 : int):ii)) else (((lem$w2ui rs1)) <> (( 0 : int):ii)) + )) in sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__1 : Privilege) . sail2_state_monad$bindS + (check_CSR csr w__1 isWrite) (\ (w__2 : bool) . + if ((~ w__2)) then sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$bindS + (readCSR csr : ( 32 words$word) M) (\ csr_val . sail2_state_monad$seqS (sail2_state_monad$seqS + (if isWrite then + let (new_val : xlenbits) = + ((case op of + CSRRW => rs1_val + | CSRRS => (or_vec csr_val rs1_val : 32 words$word) + | CSRRC => (and_vec csr_val ((not_vec rs1_val : 32 words$word)) : 32 words$word) + )) in + writeCSR csr new_val + else sail2_state_monad$returnS () ) + (wX ((regidx_to_regno rd)) csr_val)) (sail2_state_monad$returnS RETIRE_SUCCESS)))))))`; + + +(*val execute_BTYPE : mword ty13 -> mword ty5 -> mword ty5 -> bop -> M Retired*) + +val _ = Define ` + ((execute_BTYPE:(13)words$word ->(5)words$word ->(5)words$word -> bop ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rs2 rs1 op= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ rs1_val . sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ rs2_val . + let (taken : bool) = + ((case op of + RISCV_BEQ => (rs1_val = rs2_val) + | RISCV_BNE => (rs1_val <> rs2_val) + | RISCV_BLT => zopz0zI_s rs1_val rs2_val + | RISCV_BGE => zopz0zKzJ_s rs1_val rs2_val + | RISCV_BLTU => zopz0zI_u rs1_val rs2_val + | RISCV_BGEU => zopz0zKzJ_u rs1_val rs2_val + )) in sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + let (t : xlenbits) = ((add_vec w__0 ((EXTS (( 32 : int):ii) imm : 32 words$word)) : 32 words$word)) in + if taken then + (case ((ext_control_check_pc t)) of + Ext_ControlAddr_Error (e) => + let (_ : unit) = (ext_handle_control_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_ControlAddr_OK (target) => sail2_state_monad$bindS + (sail2_state$and_boolS (sail2_state_monad$returnS ((bit_to_bool ((access_vec_dec target (( 1 : int):ii)))))) + ( sail2_state_monad$bindS(haveRVC () ) (\ (w__1 : bool) . sail2_state_monad$returnS ((~ w__1))))) (\ (w__2 : bool) . + if w__2 then sail2_state_monad$seqS (handle_mem_exception target E_Fetch_Addr_Align) (sail2_state_monad$returnS RETIRE_FAIL) + else sail2_state_monad$seqS (set_next_pc target) (sail2_state_monad$returnS RETIRE_SUCCESS)) + ) + else sail2_state_monad$returnS RETIRE_SUCCESS)))))`; + + +(*val execute_AMO : amoop -> bool -> bool -> mword ty5 -> mword ty5 -> word_width -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_AMO:amoop -> bool -> bool ->(5)words$word ->(5)words$word -> word_width ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) op aq rl rs2 rs1 width rd= (sail2_state_monad$bindS + (haveAtomics () ) (\ (w__0 : bool) . + if w__0 then sail2_state_monad$bindS + (ext_data_get_addr rs1 ((zeros_implicit (( 32 : int):ii) : 32 words$word)) ReadWrite width) (\ (w__1 : unit + Ext_DataAddr_Check) . + (case w__1 of + Ext_DataAddr_Error (e) => + let (_ : unit) = (ext_handle_data_check_error e) in + sail2_state_monad$returnS RETIRE_FAIL + | Ext_DataAddr_OK (vaddr) => sail2_state_monad$bindS + (translateAddr vaddr ReadWrite : ( (( 32 words$word), ExceptionType)TR_Result) M) (\ (w__2 : (( 32 words$word), ExceptionType) + TR_Result) . + (case w__2 of + TR_Failure (e) => sail2_state_monad$seqS (handle_mem_exception vaddr e) (sail2_state_monad$returnS RETIRE_FAIL) + | TR_Address (addr) => sail2_state_monad$bindS + (case (width, (( 32 : int):ii)) of + (WORD, _) => mem_write_ea addr (( 4 : int):ii) (((aq /\ rl))) rl T + | _ => internal_error "AMO expected WORD or DOUBLE" + ) (\ (eares : unit MemoryOpResult) . sail2_state_monad$bindS + (rX ((regidx_to_regno rs2)) : ( 32 words$word) M) (\ (rs2_val : xlenbits) . + (case eares of + MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + | MemValue (_) => sail2_state_monad$bindS + (case (width, (( 32 : int):ii)) of + (WORD, _) => sail2_state_monad$bindS + (mem_read ReadWrite addr (( 4 : int):ii) aq (((aq /\ rl))) T + : ( ( 32 words$word)MemoryOpResult) M) (\ (w__5 : ( 32 words$word) MemoryOpResult) . + sail2_state_monad$returnS ((extend_value F w__5 : ( 32 words$word) MemoryOpResult))) + | _ => + (internal_error "AMO expected WORD or DOUBLE" : ( ( 32 words$word)MemoryOpResult) M) + ) (\ (rval : xlenbits MemoryOpResult) . + (case rval of + MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + | MemValue (loaded) => + let (result : xlenbits) = + ((case op of + AMOSWAP => rs2_val + | AMOADD => (add_vec rs2_val loaded : 32 words$word) + | AMOXOR => (xor_vec rs2_val loaded : 32 words$word) + | AMOAND => (and_vec rs2_val loaded : 32 words$word) + | AMOOR => (or_vec rs2_val loaded : 32 words$word) + | AMOMIN => + (to_bits (( 32 : int):ii) ((int_min ((integer_word$w2i rs2_val)) ((integer_word$w2i loaded)))) : 32 words$word) + | AMOMAX => + (to_bits (( 32 : int):ii) ((int_max ((integer_word$w2i rs2_val)) ((integer_word$w2i loaded)))) : 32 words$word) + | AMOMINU => + (to_bits (( 32 : int):ii) ((int_min ((lem$w2ui rs2_val)) ((lem$w2ui loaded)))) : 32 words$word) + | AMOMAXU => + (to_bits (( 32 : int):ii) ((int_max ((lem$w2ui rs2_val)) ((lem$w2ui loaded)))) : 32 words$word) + )) in sail2_state_monad$bindS + (case (width, (( 32 : int):ii)) of + (WORD, _) => + mem_write_value addr (( 4 : int):ii) + ((subrange_vec_dec result (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) (((aq /\ rl))) rl + T + | _ => internal_error "AMO expected WORD or DOUBLE" + ) (\ (wval : bool MemoryOpResult) . + (case wval of + MemValue (T) => sail2_state_monad$seqS (wX ((regidx_to_regno rd)) loaded) (sail2_state_monad$returnS RETIRE_SUCCESS) + | MemValue (F) => internal_error "AMO got false from mem_write_value" + | MemException (e) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS RETIRE_FAIL) + )) + )) + ))) + )) + )) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS RETIRE_FAIL))))`; + + +(*val execute_ADDIW : mword ty12 -> mword ty5 -> mword ty5 -> M Retired*) + +val _ = Define ` + ((execute_ADDIW:(12)words$word ->(5)words$word ->(5)words$word ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) imm rs1 rd= (sail2_state_monad$bindS + (rX ((regidx_to_regno rs1)) : ( 32 words$word) M) (\ (w__0 : 32 words$word) . + let (result : xlenbits) = ((add_vec ((EXTS (( 32 : int):ii) imm : 32 words$word)) w__0 : 32 words$word)) in sail2_state_monad$seqS + (wX ((regidx_to_regno rd)) + ((EXTS (( 32 : int):ii) ((subrange_vec_dec result (( 31 : int):ii) (( 0 : int):ii) : 32 words$word)) : 32 words$word))) + (sail2_state_monad$returnS RETIRE_SUCCESS))))`; + + + val execute_defn = Hol_defn "execute" ` + ((execute:ast ->(regstate)sail2_state_monad$sequential_state ->(((Retired),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) merge_var= + ((case merge_var of + C_ADDI4SPN ((rdc, nzimm)) => + let (imm : 12 bits) = + ((concat_vec (vec_of_bits [B0;B0] : 2 words$word) + ((concat_vec nzimm (vec_of_bits [B0;B0] : 2 words$word) : 10 words$word)) + : 12 words$word)) in + let rd = ((creg2reg_idx rdc : 5 words$word)) in + execute (ITYPE (imm, sp, rd, RISCV_ADDI)) + | C_LW ((uimm, rsc, rdc)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0] : 2 words$word) : 7 words$word)) + : 12 words$word)) in + let rd = ((creg2reg_idx rdc : 5 words$word)) in + let rs = ((creg2reg_idx rsc : 5 words$word)) in + execute (LOAD (imm, rs, rd, F, WORD, F, F)) + | C_LD ((uimm, rsc, rdc)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0;B0] : 3 words$word) : 8 words$word)) + : 12 words$word)) in + let rd = ((creg2reg_idx rdc : 5 words$word)) in + let rs = ((creg2reg_idx rsc : 5 words$word)) in + execute (LOAD (imm, rs, rd, F, DOUBLE, F, F)) + | C_SW ((uimm, rsc1, rsc2)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0] : 2 words$word) : 7 words$word)) + : 12 words$word)) in + let rs1 = ((creg2reg_idx rsc1 : 5 words$word)) in + let rs2 = ((creg2reg_idx rsc2 : 5 words$word)) in + execute (STORE (imm, rs2, rs1, WORD, F, F)) + | C_SD ((uimm, rsc1, rsc2)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0;B0] : 3 words$word) : 8 words$word)) + : 12 words$word)) in + let rs1 = ((creg2reg_idx rsc1 : 5 words$word)) in + let rs2 = ((creg2reg_idx rsc2 : 5 words$word)) in + execute (STORE (imm, rs2, rs1, DOUBLE, F, F)) + | C_ADDI ((nzi, rsd)) => + let (imm : 12 bits) = ((EXTS (( 12 : int):ii) nzi : 12 words$word)) in + execute (ITYPE (imm, rsd, rsd, RISCV_ADDI)) + | C_JAL (imm) => + execute + (RISCV_JAL ((EXTS (( 21 : int):ii) ((concat_vec imm (vec_of_bits [B0] : 1 words$word) : 12 words$word)) + : 21 words$word), + ra)) + | C_ADDIW ((imm, rsd)) => execute (ADDIW ((EXTS (( 12 : int):ii) imm : 12 words$word), rsd, rsd)) + | C_LI ((imm, rd)) => + let (imm : 12 bits) = ((EXTS (( 12 : int):ii) imm : 12 words$word)) in + execute (ITYPE (imm, zreg, rd, RISCV_ADDI)) + | C_ADDI16SP (imm) => + let (imm : 12 bits) = + ((EXTS (( 12 : int):ii) ((concat_vec imm (vec_of_bits [B0;B0;B0;B0] : 4 words$word) : 10 words$word)) + : 12 words$word)) in + execute (ITYPE (imm, sp, sp, RISCV_ADDI)) + | C_LUI ((imm, rd)) => + let (res : 20 bits) = ((EXTS (( 20 : int):ii) imm : 20 words$word)) in + execute (UTYPE (res, rd, RISCV_LUI)) + | C_SRLI ((shamt, rsd)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + execute (SHIFTIOP (shamt, rsd, rsd, RISCV_SRLI)) + | C_SRAI ((shamt, rsd)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + execute (SHIFTIOP (shamt, rsd, rsd, RISCV_SRAI)) + | C_ANDI ((imm, rsd)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + execute (ITYPE ((EXTS (( 12 : int):ii) imm : 12 words$word), rsd, rsd, RISCV_ANDI)) + | C_SUB ((rsd, rs2)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + let rs2 = ((creg2reg_idx rs2 : 5 words$word)) in + execute (RTYPE (rs2, rsd, rsd, RISCV_SUB)) + | C_XOR ((rsd, rs2)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + let rs2 = ((creg2reg_idx rs2 : 5 words$word)) in + execute (RTYPE (rs2, rsd, rsd, RISCV_XOR)) + | C_OR ((rsd, rs2)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + let rs2 = ((creg2reg_idx rs2 : 5 words$word)) in + execute (RTYPE (rs2, rsd, rsd, RISCV_OR)) + | C_AND ((rsd, rs2)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + let rs2 = ((creg2reg_idx rs2 : 5 words$word)) in + execute (RTYPE (rs2, rsd, rsd, RISCV_AND)) + | C_SUBW ((rsd, rs2)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + let rs2 = ((creg2reg_idx rs2 : 5 words$word)) in + execute (RTYPEW (rs2, rsd, rsd, RISCV_SUBW)) + | C_ADDW ((rsd, rs2)) => + let rsd = ((creg2reg_idx rsd : 5 words$word)) in + let rs2 = ((creg2reg_idx rs2 : 5 words$word)) in + execute (RTYPEW (rs2, rsd, rsd, RISCV_ADDW)) + | C_J (imm) => + execute + (RISCV_JAL ((EXTS (( 21 : int):ii) ((concat_vec imm (vec_of_bits [B0] : 1 words$word) : 12 words$word)) + : 21 words$word), + zreg)) + | C_BEQZ ((imm, rs)) => + execute + (BTYPE ((EXTS (( 13 : int):ii) ((concat_vec imm (vec_of_bits [B0] : 1 words$word) : 9 words$word)) + : 13 words$word), + zreg, + (creg2reg_idx rs : 5 words$word), + RISCV_BEQ)) + | C_BNEZ ((imm, rs)) => + execute + (BTYPE ((EXTS (( 13 : int):ii) ((concat_vec imm (vec_of_bits [B0] : 1 words$word) : 9 words$word)) + : 13 words$word), + zreg, + (creg2reg_idx rs : 5 words$word), + RISCV_BNE)) + | C_SLLI ((shamt, rsd)) => execute (SHIFTIOP (shamt, rsd, rsd, RISCV_SLLI)) + | C_LWSP ((uimm, rd)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0] : 2 words$word) : 8 words$word)) + : 12 words$word)) in + execute (LOAD (imm, sp, rd, F, WORD, F, F)) + | C_LDSP ((uimm, rd)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0;B0] : 3 words$word) : 9 words$word)) + : 12 words$word)) in + execute (LOAD (imm, sp, rd, F, DOUBLE, F, F)) + | C_SWSP ((uimm, rs2)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0] : 2 words$word) : 8 words$word)) + : 12 words$word)) in + execute (STORE (imm, rs2, sp, WORD, F, F)) + | C_SDSP ((uimm, rs2)) => + let (imm : 12 bits) = + ((EXTZ (( 12 : int):ii) ((concat_vec uimm (vec_of_bits [B0;B0;B0] : 3 words$word) : 9 words$word)) + : 12 words$word)) in + execute (STORE (imm, rs2, sp, DOUBLE, F, F)) + | C_JR (rs1) => + execute (RISCV_JALR ((EXTZ (( 12 : int):ii) (vec_of_bits [B0] : 1 words$word) : 12 words$word), rs1, zreg)) + | C_JALR (rs1) => + execute (RISCV_JALR ((EXTZ (( 12 : int):ii) (vec_of_bits [B0] : 1 words$word) : 12 words$word), rs1, ra)) + | C_MV ((rd, rs2)) => execute (RTYPE (rs2, zreg, rd, RISCV_ADD)) + | C_EBREAK (() ) => execute (EBREAK () ) + | C_ADD ((rsd, rs2)) => execute (RTYPE (rs2, rsd, rsd, RISCV_ADD)) + | UTYPE ((imm, rd, op)) => execute_UTYPE imm rd op + | RISCV_JAL ((imm, rd)) => execute_RISCV_JAL imm rd + | BTYPE ((imm, rs2, rs1, op)) => execute_BTYPE imm rs2 rs1 op + | ITYPE ((imm, rs1, rd, op)) => execute_ITYPE imm rs1 rd op + | SHIFTIOP ((shamt, rs1, rd, op)) => execute_SHIFTIOP shamt rs1 rd op + | RTYPE ((rs2, rs1, rd, op)) => execute_RTYPE rs2 rs1 rd op + | LOAD ((imm, rs1, rd, is_unsigned, width, aq, rl)) => + execute_LOAD imm rs1 rd is_unsigned width aq rl + | STORE ((imm, rs2, rs1, width, aq, rl)) => execute_STORE imm rs2 rs1 width aq rl + | ADDIW ((imm, rs1, rd)) => execute_ADDIW imm rs1 rd + | SHIFTW ((shamt, rs1, rd, op)) => execute_SHIFTW shamt rs1 rd op + | RTYPEW ((rs2, rs1, rd, op)) => execute_RTYPEW rs2 rs1 rd op + | SHIFTIWOP ((shamt, rs1, rd, op)) => execute_SHIFTIWOP shamt rs1 rd op + | FENCE ((pred, succ)) => execute_FENCE pred succ + | FENCE_TSO ((pred, succ)) => execute_FENCE_TSO pred succ + | FENCEI (arg0) => sail2_state_monad$returnS ((execute_FENCEI arg0)) + | ECALL (arg0) => execute_ECALL arg0 + | MRET (arg0) => execute_MRET arg0 + | SRET (arg0) => execute_SRET arg0 + | EBREAK (arg0) => execute_EBREAK arg0 + | WFI (arg0) => execute_WFI arg0 + | SFENCE_VMA ((rs1, rs2)) => execute_SFENCE_VMA rs1 rs2 + | LOADRES ((aq, rl, rs1, width, rd)) => execute_LOADRES aq rl rs1 width rd + | STORECON ((aq, rl, rs2, rs1, width, rd)) => execute_STORECON aq rl rs2 rs1 width rd + | AMO ((op, aq, rl, rs2, rs1, width, rd)) => execute_AMO op aq rl rs2 rs1 width rd + | C_NOP (arg0) => sail2_state_monad$returnS ((execute_C_NOP arg0)) + | MUL ((rs2, rs1, rd, high, signed1, signed2)) => execute_MUL rs2 rs1 rd high signed1 signed2 + | DIV0 ((rs2, rs1, rd, s)) => execute_DIV rs2 rs1 rd s + | REM ((rs2, rs1, rd, s)) => execute_REM rs2 rs1 rd s + | MULW ((rs2, rs1, rd)) => execute_MULW rs2 rs1 rd + | DIVW ((rs2, rs1, rd, s)) => execute_DIVW rs2 rs1 rd s + | REMW ((rs2, rs1, rd, s)) => execute_REMW rs2 rs1 rd s + | CSR ((csr, rs1, rd, is_imm, op)) => execute_CSR csr rs1 rd is_imm op + | URET (arg0) => execute_URET arg0 + | RISCV_JALR ((imm, rs1, rd)) => execute_RISCV_JALR imm rs1 rd + | ILLEGAL (s) => execute_ILLEGAL s + | C_ILLEGAL (s) => execute_C_ILLEGAL s + )))`; + +val _ = Lib.with_flag (computeLib.auto_import_definitions, false) Defn.save_defn execute_defn; + +(*val assembly_forwards : ast -> M string*) + +val _ = Define ` + ((assembly_forwards:ast ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + ((case arg_ of + UTYPE ((imm, rd, op)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__0 : string) . + sail2_state_monad$returnS + ((string_append + ((utype_mnemonic_forwards op)) + ((string_append + ((spc_forwards () )) + ((string_append w__0 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + imm)) + ""))))))))))) + | RISCV_JAL ((imm, rd)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__1 : string) . + sail2_state_monad$returnS + ((string_append "jal" + ((string_append ((spc_forwards () )) + ((string_append w__1 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + imm)) ""))))))))))) + | RISCV_JALR ((imm, rs1, rd)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__2 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__3 : string) . + sail2_state_monad$returnS + (( + string_append + "jalr" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__2 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__3 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + imm)) + "")))))))))))))))) + | BTYPE ((imm, rs2, rs1, op)) => sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__4 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__5 : string) . + sail2_state_monad$returnS + (( + string_append + ( + ( + btype_mnemonic_forwards + op)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__4 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__5 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + imm)) + "")))))))))))))))) + | ITYPE ((imm, rs1, rd, op)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__6 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__7 : string) . + sail2_state_monad$returnS + ((string_append + ( + ( + itype_mnemonic_forwards + op)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__6 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__7 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + imm)) + "")))))))))))))))) + | SHIFTIOP ((shamt, rs1, rd, op)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__8 : string) . sail2_state_monad$bindS + ( + reg_name_forwards + rs1) + ( + \ (w__9 : string) . + sail2_state_monad$returnS + ( + ( + string_append + ( + ( + shiftiop_mnemonic_forwards + op)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__8 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__9 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + shamt)) + "")))))))))))))))) + | RTYPE ((rs2, rs1, rd, op)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__10 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__11 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__12 : string) . + sail2_state_monad$returnS + ( + ( + string_append + ( + ( + rtype_mnemonic_forwards + op)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__10 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__11 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__12 + ""))))))))))))))))) + | LOAD ((imm, rs1, rd, is_unsigned, size1, aq, rl)) => sail2_state_monad$bindS + (reg_name_forwards + rd) + (\ (w__13 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__14 : string) . + sail2_state_monad$returnS + ( + ( + string_append + "l" + ( + ( + string_append + ( + ( + size_mnemonic_forwards + size1)) + ( + ( + string_append + ( + ( + maybe_u_forwards + is_unsigned)) + ( + ( + string_append + ( + ( + maybe_aq_forwards + aq)) + ( + ( + string_append + ( + ( + maybe_rl_forwards + rl)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__13 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + imm)) + ( + ( + string_append + ( + ( + opt_spc_forwards + () )) + ( + ( + string_append + "(" + ( + ( + string_append + ( + ( + opt_spc_forwards + () )) + ( + ( + string_append + w__14 + ( + ( + string_append + ( + ( + opt_spc_forwards + () )) + ( + ( + string_append + ")" + "")))))))))))))))))))))))))))))))) + | STORE ((imm, rs2, rs1, size1, aq, rl)) => sail2_state_monad$bindS + (reg_name_forwards rs2) + (\ (w__15 : string) . + sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__16 : string) . + sail2_state_monad$returnS + ((string_append + "s" + ((string_append + ((size_mnemonic_forwards + size1)) + ((string_append + ( + ( + maybe_aq_forwards + aq)) + ( + ( + string_append + ( + ( + maybe_rl_forwards + rl)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__15 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + imm)) + ( + ( + string_append + ( + ( + opt_spc_forwards + () )) + ( + ( + string_append + "(" + ( + ( + string_append + ( + ( + opt_spc_forwards + () )) + ( + ( + string_append + w__16 + ( + ( + string_append + ( + ( + opt_spc_forwards + () )) + ( + ( + string_append + ")" + "")))))))))))))))))))))))))))))) + | ADDIW ((imm, rs1, rd)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__17 : string) . sail2_state_monad$bindS (reg_name_forwards rs1) + (\ (w__18 : string) . + sail2_state_monad$returnS + ((string_append "addiw" + ((string_append ((spc_forwards () )) + ((string_append w__17 + ((string_append + ((sep_forwards () )) + ((string_append w__18 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + imm)) + "")))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | SHIFTW ((shamt, rs1, rd, op)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__21 : string) . sail2_state_monad$bindS (reg_name_forwards rs1) + (\ (w__22 : string) . + sail2_state_monad$returnS + ((string_append + ((shiftw_mnemonic_forwards op)) + ((string_append ((spc_forwards () )) + ((string_append w__21 + ((string_append + ((sep_forwards () )) + ((string_append w__22 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + shamt)) + "")))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | RTYPEW ((rs2, rs1, rd, op)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__25 : string) . sail2_state_monad$bindS (reg_name_forwards rs1) + (\ (w__26 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__27 : string) . + sail2_state_monad$returnS + ((string_append + ((rtypew_mnemonic_forwards + op)) + ((string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__25 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__26 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__27 + ""))))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | SHIFTIWOP ((shamt, rs1, rd, op)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__30 : string) . sail2_state_monad$bindS (reg_name_forwards rs1) + (\ (w__31 : string) . + sail2_state_monad$returnS + ((string_append + ((shiftiwop_mnemonic_forwards op)) + ((string_append ((spc_forwards () )) + ((string_append w__30 + ((string_append + ((sep_forwards () )) + ((string_append w__31 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + shamt)) + "")))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | FENCE ((pred, succ)) => sail2_state_monad$bindS + (fence_bits_forwards pred) + (\ (w__34 : string) . sail2_state_monad$bindS + (fence_bits_forwards + succ) + (\ (w__35 : string) . + sail2_state_monad$returnS + ((string_append + "fence" + ((string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__34 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__35 + "")))))))))))) + | FENCE_TSO ((pred, succ)) => sail2_state_monad$bindS + (fence_bits_forwards pred) + (\ (w__36 : string) . sail2_state_monad$bindS + (fence_bits_forwards + succ) + (\ (w__37 : string) . + sail2_state_monad$returnS + ((string_append + "fence.tso" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__36 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__37 + "")))))))))))) + | FENCEI (() ) => sail2_state_monad$returnS "fence.i" + | ECALL (() ) => sail2_state_monad$returnS "ecall" + | MRET (() ) => sail2_state_monad$returnS "mret" + | SRET (() ) => sail2_state_monad$returnS "sret" + | EBREAK (() ) => sail2_state_monad$returnS "ebreak" + | WFI (() ) => sail2_state_monad$returnS "wfi" + | SFENCE_VMA ((rs1, rs2)) => sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__38 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__39 : string) . + sail2_state_monad$returnS + ((string_append + "sfence.vma" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__38 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__39 + "")))))))))))) + | LOADRES ((aq, rl, rs1, size1, rd)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__40 : string) . + sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__41 : string) . + sail2_state_monad$returnS + ((string_append + "lr." + ((string_append + ((size_mnemonic_forwards + size1)) + ((string_append + ((maybe_aq_forwards + aq)) + ((string_append + ( + ( + maybe_rl_forwards + rl)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__40 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__41 + "")))))))))))))))))) + | STORECON ((aq, rl, rs2, rs1, size1, rd)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__42 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__43 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__44 : string) . + sail2_state_monad$returnS + ((string_append + "sc." + ((string_append + ( + ( + size_mnemonic_forwards + size1)) + ( + ( + string_append + ( + ( + maybe_aq_forwards + aq)) + ( + ( + string_append + ( + ( + maybe_rl_forwards + rl)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__42 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__43 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__44 + ""))))))))))))))))))))))) + | AMO ((op, aq, rl, rs2, rs1, width, rd)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__45 : string) . + sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__46 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__47 : string) . + sail2_state_monad$returnS + ((string_append + ((amo_mnemonic_forwards + op)) + ((string_append + "." + ( + ( + string_append + ( + ( + size_mnemonic_forwards + width)) + ( + ( + string_append + ( + ( + maybe_aq_forwards + aq)) + ( + ( + string_append + ( + ( + maybe_rl_forwards + rl)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__45 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__46 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__47 + ""))))))))))))))))))))))))) + | C_NOP (() ) => sail2_state_monad$returnS "c.nop" + | C_ADDI4SPN ((rdc, nzimm)) => + if (((nzimm <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word)))) then + sail2_state_monad$bindS (creg_name_forwards rdc) + (\ (w__48 : string) . + sail2_state_monad$returnS + ((string_append "c.addi4spn" + ((string_append ((spc_forwards () )) + ((string_append w__48 + ((string_append ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + ((concat_vec nzimm + (vec_of_bits [B0;B0] : 2 words$word) + : 10 words$word)))) ""))))))))))) else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_LW ((uimm, rsc, rdc)) => sail2_state_monad$bindS + (creg_name_forwards rdc) + (\ (w__51 : string) . sail2_state_monad$bindS + (creg_name_forwards + rsc) + (\ (w__52 : string) . + sail2_state_monad$returnS + ((string_append + "c.lw" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__51 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__52 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + ( + ( + concat_vec + uimm + ( + vec_of_bits + [B0;B0] : 2 words$word) + : 7 words$word)))) + "")))))))))))))))) + | C_LD ((uimm, rsc, rdc)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (creg_name_forwards rdc) + (\ (w__53 : string) . sail2_state_monad$bindS + (creg_name_forwards rsc) + (\ (w__54 : string) . + sail2_state_monad$returnS + ((string_append "c.ld" + ((string_append ((spc_forwards () )) + ((string_append w__53 + ((string_append + ((sep_forwards () )) + ((string_append w__54 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + (( + concat_vec + uimm + ( + vec_of_bits + [B0;B0;B0] : 3 words$word) + : 8 words$word)))) + "")))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_SW ((uimm, rsc1, rsc2)) => sail2_state_monad$bindS + (creg_name_forwards rsc1) + (\ (w__57 : string) . sail2_state_monad$bindS + (creg_name_forwards + rsc2) + (\ (w__58 : string) . + sail2_state_monad$returnS + ((string_append + "c.sw" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__57 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__58 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + ( + ( + concat_vec + uimm + ( + vec_of_bits + [B0;B0] : 2 words$word) + : 7 words$word)))) + "")))))))))))))))) + | C_SD ((uimm, rsc1, rsc2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (creg_name_forwards rsc1) + (\ (w__59 : string) . sail2_state_monad$bindS + (creg_name_forwards rsc2) + (\ (w__60 : string) . + sail2_state_monad$returnS + ((string_append "c.sd" + ((string_append ((spc_forwards () )) + ((string_append w__59 + ((string_append + ((sep_forwards () )) + ((string_append w__60 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + (( + concat_vec + uimm + ( + vec_of_bits + [B0;B0;B0] : 3 words$word) + : 8 words$word)))) + "")))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_ADDI ((nzi, rsd)) => + if ((((((nzi <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ + (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))))) then + sail2_state_monad$bindS (reg_name_forwards rsd) + (\ (w__63 : string) . + sail2_state_monad$returnS + ((string_append "c.addi" + ((string_append ((spc_forwards () )) + ((string_append w__63 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits nzi)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_JAL (imm) => + if ((((( 32 : int): ii) = (( 32 : int): ii)))) then + sail2_state_monad$returnS + ((string_append "c.jal" + ((string_append ((spc_forwards () )) + ((string_append + ((decimal_string_of_bits + ((concat_vec imm (vec_of_bits [B0] : 1 words$word) : 12 words$word)))) + "")))))) else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_ADDIW ((imm, rsd)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rsd) + (\ (w__68 : string) . + sail2_state_monad$returnS + ((string_append "c.addiw" + ((string_append ((spc_forwards () )) + ((string_append w__68 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits imm)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_LI ((imm, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__71 : string) . + sail2_state_monad$returnS + ((string_append "c.li" + ((string_append ((spc_forwards () )) + ((string_append w__71 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits imm)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_ADDI16SP (imm) => + if (((imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) then + sail2_state_monad$returnS + ((string_append "c.addi16sp" + ((string_append ((spc_forwards () )) + ((string_append ((decimal_string_of_bits imm)) "")))))) else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_LUI ((imm, rd)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ + ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ + (((imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))))))))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__76 : string) . + sail2_state_monad$returnS + ((string_append "c.lui" + ((string_append ((spc_forwards () )) + ((string_append w__76 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits imm)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_SRLI ((shamt, rsd)) => + if (((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) then + sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__79 : string) . + sail2_state_monad$returnS + ((string_append "c.srli" + ((string_append ((spc_forwards () )) + ((string_append w__79 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits shamt)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_SRAI ((shamt, rsd)) => + if (((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) then + sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__82 : string) . + sail2_state_monad$returnS + ((string_append "c.srai" + ((string_append ((spc_forwards () )) + ((string_append w__82 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits shamt)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_ANDI ((imm, rsd)) => sail2_state_monad$bindS + (creg_name_forwards rsd) + (\ (w__85 : string) . + sail2_state_monad$returnS + ((string_append "c.andi" + ((string_append ((spc_forwards () )) + ((string_append w__85 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + imm)) ""))))))))))) + | C_SUB ((rsd, rs2)) => sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__86 : string) . sail2_state_monad$bindS + (creg_name_forwards + rs2) + (\ (w__87 : string) . + sail2_state_monad$returnS + ((string_append + "c.sub" + ((string_append + (( + spc_forwards + () )) + (( + string_append + w__86 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__87 + "")))))))))))) + | C_XOR ((rsd, rs2)) => sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__88 : string) . sail2_state_monad$bindS + (creg_name_forwards + rs2) + (\ (w__89 : string) . + sail2_state_monad$returnS + ((string_append + "c.xor" + ((string_append + (( + spc_forwards + () )) + (( + string_append + w__88 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__89 + "")))))))))))) + | C_OR ((rsd, rs2)) => sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__90 : string) . sail2_state_monad$bindS + (creg_name_forwards + rs2) + (\ (w__91 : string) . + sail2_state_monad$returnS + ((string_append + "c.or" + ((string_append + ((spc_forwards + () )) + ((string_append + w__90 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__91 + "")))))))))))) + | C_AND ((rsd, rs2)) => sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__92 : string) . sail2_state_monad$bindS + (creg_name_forwards + rs2) + (\ (w__93 : string) . + sail2_state_monad$returnS + ((string_append + "c.and" + ((string_append + (( + spc_forwards + () )) + (( + string_append + w__92 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__93 + "")))))))))))) + | C_SUBW ((rsd, rs2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__94 : string) . sail2_state_monad$bindS + (creg_name_forwards rs2) + (\ (w__95 : string) . + sail2_state_monad$returnS + ((string_append "c.subw" + ((string_append ((spc_forwards () )) + ((string_append w__94 + ((string_append + ((sep_forwards () )) + ((string_append w__95 "")))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_ADDW ((rsd, rs2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (creg_name_forwards rsd) + (\ (w__98 : string) . sail2_state_monad$bindS + (creg_name_forwards rs2) + (\ (w__99 : string) . + sail2_state_monad$returnS + ((string_append "c.addw" + ((string_append ((spc_forwards () )) + ((string_append w__98 + ((string_append + ((sep_forwards () )) + ((string_append w__99 "")))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_J (imm) => + sail2_state_monad$returnS + ((string_append "c.j" + ((string_append ((spc_forwards () )) + ((string_append ((decimal_string_of_bits imm)) "")))))) + | C_BEQZ ((imm, rs)) => sail2_state_monad$bindS (creg_name_forwards rs) + (\ (w__102 : string) . + sail2_state_monad$returnS + ((string_append "c.beqz" + ((string_append ((spc_forwards () )) + ((string_append w__102 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + imm)) ""))))))))))) + | C_BNEZ ((imm, rs)) => sail2_state_monad$bindS (creg_name_forwards rs) + (\ (w__103 : string) . + sail2_state_monad$returnS + ((string_append "c.bnez" + ((string_append ((spc_forwards () )) + ((string_append w__103 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + imm)) ""))))))))))) + | C_SLLI ((shamt, rsd)) => + if ((((((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ + (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))))) then + sail2_state_monad$bindS (reg_name_forwards rsd) + (\ (w__104 : string) . + sail2_state_monad$returnS + ((string_append "c.slli" + ((string_append ((spc_forwards () )) + ((string_append w__104 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits shamt)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_LWSP ((uimm, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__107 : string) . + sail2_state_monad$returnS + ((string_append "c.lwsp" + ((string_append ((spc_forwards () )) + ((string_append w__107 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits uimm)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_LDSP ((uimm, rd)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ + ((((( 32 : int): ii) = (( 64 : int): ii))))))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__110 : string) . + sail2_state_monad$returnS + ((string_append "c.ldsp" + ((string_append ((spc_forwards () )) + ((string_append w__110 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits uimm)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_SWSP ((uimm, rd)) => sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__113 : string) . + sail2_state_monad$returnS + ((string_append "c.swsp" + ((string_append ((spc_forwards () )) + ((string_append w__113 + ((string_append + ((sep_forwards () )) + ((string_append + ((decimal_string_of_bits + uimm)) ""))))))))))) + | C_SDSP ((uimm, rs2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rs2) + (\ (w__114 : string) . + sail2_state_monad$returnS + ((string_append "c.sdsp" + ((string_append ((spc_forwards () )) + ((string_append w__114 + ((string_append ((sep_forwards () )) + ((string_append ((decimal_string_of_bits uimm)) ""))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_JR (rs1) => + if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then + sail2_state_monad$bindS (reg_name_forwards rs1) + (\ (w__117 : string) . + sail2_state_monad$returnS + ((string_append "c.jr" + ((string_append ((spc_forwards () )) + ((string_append w__117 ""))))))) else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_JALR (rs1) => + if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then + sail2_state_monad$bindS (reg_name_forwards rs1) + (\ (w__120 : string) . + sail2_state_monad$returnS + ((string_append "c.jalr" + ((string_append ((spc_forwards () )) + ((string_append w__120 ""))))))) else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_MV ((rd, rs2)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ + (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__123 : string) . sail2_state_monad$bindS + (reg_name_forwards rs2) + (\ (w__124 : string) . + sail2_state_monad$returnS + ((string_append "c.mv" + ((string_append ((spc_forwards () )) + ((string_append w__123 + ((string_append + ((sep_forwards () )) + ((string_append w__124 "")))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | C_EBREAK (() ) => sail2_state_monad$returnS "c.ebreak" + | C_ADD ((rsd, rs2)) => + if ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ + (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + sail2_state_monad$bindS (reg_name_forwards rsd) + (\ (w__127 : string) . sail2_state_monad$bindS + (reg_name_forwards rs2) + (\ (w__128 : string) . + sail2_state_monad$returnS + ((string_append "c.add" + ((string_append ((spc_forwards () )) + ((string_append w__127 + ((string_append + ((sep_forwards () )) + ((string_append w__128 "")))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | MUL ((rs2, rs1, rd, high, signed1, signed2)) => sail2_state_monad$bindS + (reg_name_forwards + rd) + (\ (w__131 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__132 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__133 : string) . + sail2_state_monad$returnS + ((string_append + ( + ( + mul_mnemonic_forwards + (high, signed1, signed2))) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__131 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__132 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__133 + ""))))))))))))))))) + | DIV0 ((rs2, rs1, rd, s)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__134 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__135 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__136 : string) . + sail2_state_monad$returnS + ( + ( + string_append + "div" + ( + ( + string_append + ( + ( + maybe_not_u_forwards + s)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__134 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__135 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__136 + ""))))))))))))))))))) + | REM ((rs2, rs1, rd, s)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__137 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__138 : string) . + sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__139 : string) . + sail2_state_monad$returnS + ( + ( + string_append + "rem" + ( + ( + string_append + ( + ( + maybe_not_u_forwards + s)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__137 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__138 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__139 + ""))))))))))))))))))) + | MULW ((rs2, rs1, rd)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__140 : string) . sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__141 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__142 : string) . + sail2_state_monad$returnS + ((string_append + "mulw" + ((string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__140 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__141 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__142 + ""))))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | DIVW ((rs2, rs1, rd, s)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__145 : string) . sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__146 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__147 : string) . + sail2_state_monad$returnS + ((string_append + "div" + ((string_append + ( + ( + maybe_not_u_forwards + s)) + ( + ( + string_append + "w" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__145 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__146 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__147 + ""))))))))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | REMW ((rs2, rs1, rd, s)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then + sail2_state_monad$bindS (reg_name_forwards rd) + (\ (w__150 : string) . sail2_state_monad$bindS + (reg_name_forwards rs1) + (\ (w__151 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs2) + (\ (w__152 : string) . + sail2_state_monad$returnS + ((string_append + "rem" + ((string_append + ( + ( + maybe_not_u_forwards + s)) + ( + ( + string_append + "w" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__150 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__151 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__152 + ""))))))))))))))))))))) + else + sail2_state_monad$seqS + (sail2_state_monad$assert_expS F + "Pattern match failure at unknown location") + (sail2_state_monad$exitS () ) + | CSR ((csr, rs1, rd, T, op)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__155 : string) . sail2_state_monad$bindS + (csr_name_map_forwards + csr) + (\ (w__156 : string) . + sail2_state_monad$returnS + ( + ( + string_append + ( + ( + csr_mnemonic_forwards + op)) + ( + ( + string_append + "i" + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__155 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + ( + ( + decimal_string_of_bits + rs1)) + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__156 + "")))))))))))))))))) + | CSR ((csr, rs1, rd, F, op)) => sail2_state_monad$bindS + (reg_name_forwards rd) + (\ (w__157 : string) . sail2_state_monad$bindS + (reg_name_forwards + rs1) + (\ (w__158 : string) . + sail2_state_monad$bindS + ( + csr_name_map_forwards + csr) + ( + \ (w__159 : string) . + sail2_state_monad$returnS + ( + ( + string_append + ( + ( + csr_mnemonic_forwards + op)) + ( + ( + string_append + ( + ( + spc_forwards + () )) + ( + ( + string_append + w__157 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__158 + ( + ( + string_append + ( + ( + sep_forwards + () )) + ( + ( + string_append + w__159 + ""))))))))))))))))) + | URET (() ) => sail2_state_monad$returnS "uret" + | ILLEGAL (s) => + sail2_state_monad$returnS + ((string_append "illegal" + ((string_append ((spc_forwards () )) + ((string_append ((decimal_string_of_bits s)) "")))))) + | C_ILLEGAL (s) => + sail2_state_monad$returnS + ((string_append "c.illegal" + ((string_append ((spc_forwards () )) + ((string_append ((decimal_string_of_bits s)) "")))))) + )))`; + + +(*val assembly_backwards : string -> M ast*) + +(*val _s1677_ : string -> maybe (mword ty16)*) + +val _ = Define ` + ((s1677_:string ->((16)words$word)option) s1678_0= + (let s1679_0 = s1678_0 in + if ((string_startswith s1679_0 "c.illegal")) then + (case ((string_drop s1679_0 ((string_length "c.illegal")))) of + s1680_0 => + (case ((spc_matches_prefix0 s1680_0)) of + SOME ((() , s1681_0)) => + (case ((string_drop s1680_0 s1681_0)) of + s1682_0 => + (case ((hex_bits_16_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1682_0 : (( 16 words$word # ii)) option)) of + SOME ((s, s1683_0)) => + let p0_ = (string_drop s1682_0 s1683_0) in + if (((p0_ = ""))) then SOME s else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1669_ : string -> maybe (mword ty32)*) + +val _ = Define ` + ((s1669_:string ->((32)words$word)option) s1670_0= + (let s1671_0 = s1670_0 in + if ((string_startswith s1671_0 "illegal")) then + (case ((string_drop s1671_0 ((string_length "illegal")))) of + s1672_0 => + (case ((spc_matches_prefix0 s1672_0)) of + SOME ((() , s1673_0)) => + (case ((string_drop s1672_0 s1673_0)) of + s1674_0 => + (case ((hex_bits_32_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1674_0 : (( 32 words$word # ii)) option)) of + SOME ((s, s1675_0)) => + let p0_ = (string_drop s1674_0 s1675_0) in + if (((p0_ = ""))) then SOME s else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1652_ : string -> maybe ((csrop * mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s1652_:string ->(csrop#(5)words$word#(5)words$word#(12)words$word)option) s1653_0= + ((case s1653_0 of + s1654_0 => + (case ((csr_mnemonic_matches_prefix s1654_0)) of + SOME ((op, s1655_0)) => + (case ((string_drop s1654_0 s1655_0)) of + s1656_0 => + (case ((spc_matches_prefix0 s1656_0)) of + SOME ((() , s1657_0)) => + (case ((string_drop s1656_0 s1657_0)) of + s1658_0 => + (case ((reg_name_matches_prefix s1658_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1659_0)) => + (case ((string_drop s1658_0 s1659_0)) of + s1660_0 => + (case ((sep_matches_prefix s1660_0)) of + SOME ((() , s1661_0)) => + (case ((string_drop s1660_0 s1661_0)) of + s1662_0 => + (case ((reg_name_matches_prefix s1662_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1663_0)) => + (case ((string_drop s1662_0 s1663_0)) of + s1664_0 => + (case ((sep_matches_prefix s1664_0)) of + SOME ((() , s1665_0)) => + (case ((string_drop s1664_0 s1665_0)) of + s1666_0 => + (case ((csr_name_map_matches_prefix s1666_0 + : (( 12 words$word # ii)) option)) of + SOME ((csr, s1667_0)) => + let p0_ = (string_drop s1666_0 s1667_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, csr) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1634_ : string -> maybe ((csrop * mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s1634_:string ->(csrop#(5)words$word#(5)words$word#(12)words$word)option) s1635_0= + ((case s1635_0 of + s1636_0 => + (case ((csr_mnemonic_matches_prefix s1636_0)) of + SOME ((op, s1637_0)) => + let s1638_0 = (string_drop s1636_0 s1637_0) in + if ((string_startswith s1638_0 "i")) then + (case ((string_drop s1638_0 ((string_length "i")))) of + s1639_0 => + (case ((spc_matches_prefix0 s1639_0)) of + SOME ((() , s1640_0)) => + (case ((string_drop s1639_0 s1640_0)) of + s1641_0 => + (case ((reg_name_matches_prefix s1641_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1642_0)) => + (case ((string_drop s1641_0 s1642_0)) of + s1643_0 => + (case ((sep_matches_prefix s1643_0)) of + SOME ((() , s1644_0)) => + (case ((string_drop s1643_0 s1644_0)) of + s1645_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1645_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1646_0)) => + (case ((string_drop s1645_0 s1646_0)) of + s1647_0 => + (case ((sep_matches_prefix s1647_0)) of + SOME ((() , s1648_0)) => + (case ((string_drop s1647_0 s1648_0)) of + s1649_0 => + (case ((csr_name_map_matches_prefix s1649_0 + : (( 12 words$word # ii)) option)) of + SOME ((csr, s1650_0)) => + let p0_ = (string_drop s1649_0 s1650_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, csr) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +(*val _s1615_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1615_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s1616_0= + (let s1617_0 = s1616_0 in + if ((string_startswith s1617_0 "rem")) then + (case ((string_drop s1617_0 ((string_length "rem")))) of + s1618_0 => + (case ((maybe_not_u_matches_prefix s1618_0)) of + SOME ((s, s1619_0)) => + let s1620_0 = (string_drop s1618_0 s1619_0) in + if ((string_startswith s1620_0 "w")) then + (case ((string_drop s1620_0 ((string_length "w")))) of + s1621_0 => + (case ((spc_matches_prefix0 s1621_0)) of + SOME ((() , s1622_0)) => + (case ((string_drop s1621_0 s1622_0)) of + s1623_0 => + (case ((reg_name_matches_prefix s1623_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1624_0)) => + (case ((string_drop s1623_0 s1624_0)) of + s1625_0 => + (case ((sep_matches_prefix s1625_0)) of + SOME ((() , s1626_0)) => + (case ((string_drop s1625_0 s1626_0)) of + s1627_0 => + (case ((reg_name_matches_prefix s1627_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1628_0)) => + (case ((string_drop s1627_0 s1628_0)) of + s1629_0 => + (case ((sep_matches_prefix s1629_0)) of + SOME ((() , s1630_0)) => + (case ((string_drop s1629_0 s1630_0)) of + s1631_0 => + (case ((reg_name_matches_prefix s1631_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1632_0)) => + let p0_ = (string_drop s1631_0 s1632_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1596_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1596_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s1597_0= + (let s1598_0 = s1597_0 in + if ((string_startswith s1598_0 "div")) then + (case ((string_drop s1598_0 ((string_length "div")))) of + s1599_0 => + (case ((maybe_not_u_matches_prefix s1599_0)) of + SOME ((s, s1600_0)) => + let s1601_0 = (string_drop s1599_0 s1600_0) in + if ((string_startswith s1601_0 "w")) then + (case ((string_drop s1601_0 ((string_length "w")))) of + s1602_0 => + (case ((spc_matches_prefix0 s1602_0)) of + SOME ((() , s1603_0)) => + (case ((string_drop s1602_0 s1603_0)) of + s1604_0 => + (case ((reg_name_matches_prefix s1604_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1605_0)) => + (case ((string_drop s1604_0 s1605_0)) of + s1606_0 => + (case ((sep_matches_prefix s1606_0)) of + SOME ((() , s1607_0)) => + (case ((string_drop s1606_0 s1607_0)) of + s1608_0 => + (case ((reg_name_matches_prefix s1608_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1609_0)) => + (case ((string_drop s1608_0 s1609_0)) of + s1610_0 => + (case ((sep_matches_prefix s1610_0)) of + SOME ((() , s1611_0)) => + (case ((string_drop s1610_0 s1611_0)) of + s1612_0 => + (case ((reg_name_matches_prefix s1612_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1613_0)) => + let p0_ = (string_drop s1612_0 s1613_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1580_ : string -> maybe ((mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1580_:string ->((5)words$word#(5)words$word#(5)words$word)option) s1581_0= + (let s1582_0 = s1581_0 in + if ((string_startswith s1582_0 "mulw")) then + (case ((string_drop s1582_0 ((string_length "mulw")))) of + s1583_0 => + (case ((spc_matches_prefix0 s1583_0)) of + SOME ((() , s1584_0)) => + (case ((string_drop s1583_0 s1584_0)) of + s1585_0 => + (case ((reg_name_matches_prefix s1585_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1586_0)) => + (case ((string_drop s1585_0 s1586_0)) of + s1587_0 => + (case ((sep_matches_prefix s1587_0)) of + SOME ((() , s1588_0)) => + (case ((string_drop s1587_0 s1588_0)) of + s1589_0 => + (case ((reg_name_matches_prefix s1589_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1590_0)) => + (case ((string_drop s1589_0 s1590_0)) of + s1591_0 => + (case ((sep_matches_prefix s1591_0)) of + SOME ((() , s1592_0)) => + (case ((string_drop s1591_0 s1592_0)) of + s1593_0 => + (case ((reg_name_matches_prefix s1593_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1594_0)) => + let p0_ = (string_drop s1593_0 s1594_0) in + if (((p0_ = ""))) then SOME (rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1562_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1562_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s1563_0= + (let s1564_0 = s1563_0 in + if ((string_startswith s1564_0 "rem")) then + (case ((string_drop s1564_0 ((string_length "rem")))) of + s1565_0 => + (case ((maybe_not_u_matches_prefix s1565_0)) of + SOME ((s, s1566_0)) => + (case ((string_drop s1565_0 s1566_0)) of + s1567_0 => + (case ((spc_matches_prefix0 s1567_0)) of + SOME ((() , s1568_0)) => + (case ((string_drop s1567_0 s1568_0)) of + s1569_0 => + (case ((reg_name_matches_prefix s1569_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1570_0)) => + (case ((string_drop s1569_0 s1570_0)) of + s1571_0 => + (case ((sep_matches_prefix s1571_0)) of + SOME ((() , s1572_0)) => + (case ((string_drop s1571_0 s1572_0)) of + s1573_0 => + (case ((reg_name_matches_prefix s1573_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1574_0)) => + (case ((string_drop s1573_0 s1574_0)) of + s1575_0 => + (case ((sep_matches_prefix s1575_0)) of + SOME ((() , s1576_0)) => + (case ((string_drop s1575_0 s1576_0)) of + s1577_0 => + (case ((reg_name_matches_prefix s1577_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1578_0)) => + let p0_ = (string_drop s1577_0 s1578_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1544_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1544_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s1545_0= + (let s1546_0 = s1545_0 in + if ((string_startswith s1546_0 "div")) then + (case ((string_drop s1546_0 ((string_length "div")))) of + s1547_0 => + (case ((maybe_not_u_matches_prefix s1547_0)) of + SOME ((s, s1548_0)) => + (case ((string_drop s1547_0 s1548_0)) of + s1549_0 => + (case ((spc_matches_prefix0 s1549_0)) of + SOME ((() , s1550_0)) => + (case ((string_drop s1549_0 s1550_0)) of + s1551_0 => + (case ((reg_name_matches_prefix s1551_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1552_0)) => + (case ((string_drop s1551_0 s1552_0)) of + s1553_0 => + (case ((sep_matches_prefix s1553_0)) of + SOME ((() , s1554_0)) => + (case ((string_drop s1553_0 s1554_0)) of + s1555_0 => + (case ((reg_name_matches_prefix s1555_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1556_0)) => + (case ((string_drop s1555_0 s1556_0)) of + s1557_0 => + (case ((sep_matches_prefix s1557_0)) of + SOME ((() , s1558_0)) => + (case ((string_drop s1557_0 s1558_0)) of + s1559_0 => + (case ((reg_name_matches_prefix s1559_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1560_0)) => + let p0_ = (string_drop s1559_0 s1560_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1527_ : string -> maybe ((bool * bool * bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1527_:string ->(bool#bool#bool#(5)words$word#(5)words$word#(5)words$word)option) s1528_0= + ((case s1528_0 of + s1529_0 => + (case ((mul_mnemonic_matches_prefix s1529_0)) of + SOME (((high, signed1, signed2), s1530_0)) => + (case ((string_drop s1529_0 s1530_0)) of + s1531_0 => + (case ((spc_matches_prefix0 s1531_0)) of + SOME ((() , s1532_0)) => + (case ((string_drop s1531_0 s1532_0)) of + s1533_0 => + (case ((reg_name_matches_prefix s1533_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1534_0)) => + (case ((string_drop s1533_0 s1534_0)) of + s1535_0 => + (case ((sep_matches_prefix s1535_0)) of + SOME ((() , s1536_0)) => + (case ((string_drop s1535_0 s1536_0)) of + s1537_0 => + (case ((reg_name_matches_prefix s1537_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1538_0)) => + (case ((string_drop s1537_0 s1538_0)) of + s1539_0 => + (case ((sep_matches_prefix s1539_0)) of + SOME ((() , s1540_0)) => + (case ((string_drop s1539_0 s1540_0)) of + s1541_0 => + (case ((reg_name_matches_prefix s1541_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1542_0)) => + let p0_ = (string_drop s1541_0 s1542_0) in + if (((p0_ = ""))) then SOME (high, signed1, signed2, rd, rs1, rs2) else + NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1515_ : string -> maybe ((mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1515_:string ->((5)words$word#(5)words$word)option) s1516_0= + (let s1517_0 = s1516_0 in + if ((string_startswith s1517_0 "c.add")) then + (case ((string_drop s1517_0 ((string_length "c.add")))) of + s1518_0 => + (case ((spc_matches_prefix0 s1518_0)) of + SOME ((() , s1519_0)) => + (case ((string_drop s1518_0 s1519_0)) of + s1520_0 => + (case ((reg_name_matches_prefix s1520_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s1521_0)) => + (case ((string_drop s1520_0 s1521_0)) of + s1522_0 => + (case ((sep_matches_prefix s1522_0)) of + SOME ((() , s1523_0)) => + (case ((string_drop s1522_0 s1523_0)) of + s1524_0 => + (case ((reg_name_matches_prefix s1524_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1525_0)) => + let p0_ = (string_drop s1524_0 s1525_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1503_ : string -> maybe ((mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1503_:string ->((5)words$word#(5)words$word)option) s1504_0= + (let s1505_0 = s1504_0 in + if ((string_startswith s1505_0 "c.mv")) then + (case ((string_drop s1505_0 ((string_length "c.mv")))) of + s1506_0 => + (case ((spc_matches_prefix0 s1506_0)) of + SOME ((() , s1507_0)) => + (case ((string_drop s1506_0 s1507_0)) of + s1508_0 => + (case ((reg_name_matches_prefix s1508_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1509_0)) => + (case ((string_drop s1508_0 s1509_0)) of + s1510_0 => + (case ((sep_matches_prefix s1510_0)) of + SOME ((() , s1511_0)) => + (case ((string_drop s1510_0 s1511_0)) of + s1512_0 => + (case ((reg_name_matches_prefix s1512_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1513_0)) => + let p0_ = (string_drop s1512_0 s1513_0) in + if (((p0_ = ""))) then SOME (rd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1495_ : string -> maybe (mword ty5)*) + +val _ = Define ` + ((s1495_:string ->((5)words$word)option) s1496_0= + (let s1497_0 = s1496_0 in + if ((string_startswith s1497_0 "c.jalr")) then + (case ((string_drop s1497_0 ((string_length "c.jalr")))) of + s1498_0 => + (case ((spc_matches_prefix0 s1498_0)) of + SOME ((() , s1499_0)) => + (case ((string_drop s1498_0 s1499_0)) of + s1500_0 => + (case ((reg_name_matches_prefix s1500_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1501_0)) => + let p0_ = (string_drop s1500_0 s1501_0) in + if (((p0_ = ""))) then SOME rs1 else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1487_ : string -> maybe (mword ty5)*) + +val _ = Define ` + ((s1487_:string ->((5)words$word)option) s1488_0= + (let s1489_0 = s1488_0 in + if ((string_startswith s1489_0 "c.jr")) then + (case ((string_drop s1489_0 ((string_length "c.jr")))) of + s1490_0 => + (case ((spc_matches_prefix0 s1490_0)) of + SOME ((() , s1491_0)) => + (case ((string_drop s1490_0 s1491_0)) of + s1492_0 => + (case ((reg_name_matches_prefix s1492_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1493_0)) => + let p0_ = (string_drop s1492_0 s1493_0) in + if (((p0_ = ""))) then SOME rs1 else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1475_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1475_:string ->((5)words$word#(6)words$word)option) s1476_0= + (let s1477_0 = s1476_0 in + if ((string_startswith s1477_0 "c.sdsp")) then + (case ((string_drop s1477_0 ((string_length "c.sdsp")))) of + s1478_0 => + (case ((spc_matches_prefix0 s1478_0)) of + SOME ((() , s1479_0)) => + (case ((string_drop s1478_0 s1479_0)) of + s1480_0 => + (case ((reg_name_matches_prefix s1480_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1481_0)) => + (case ((string_drop s1480_0 s1481_0)) of + s1482_0 => + (case ((sep_matches_prefix s1482_0)) of + SOME ((() , s1483_0)) => + (case ((string_drop s1482_0 s1483_0)) of + s1484_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1484_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s1485_0)) => + let p0_ = (string_drop s1484_0 s1485_0) in + if (((p0_ = ""))) then SOME (rs2, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1463_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1463_:string ->((5)words$word#(6)words$word)option) s1464_0= + (let s1465_0 = s1464_0 in + if ((string_startswith s1465_0 "c.swsp")) then + (case ((string_drop s1465_0 ((string_length "c.swsp")))) of + s1466_0 => + (case ((spc_matches_prefix0 s1466_0)) of + SOME ((() , s1467_0)) => + (case ((string_drop s1466_0 s1467_0)) of + s1468_0 => + (case ((reg_name_matches_prefix s1468_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1469_0)) => + (case ((string_drop s1468_0 s1469_0)) of + s1470_0 => + (case ((sep_matches_prefix s1470_0)) of + SOME ((() , s1471_0)) => + (case ((string_drop s1470_0 s1471_0)) of + s1472_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1472_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s1473_0)) => + let p0_ = (string_drop s1472_0 s1473_0) in + if (((p0_ = ""))) then SOME (rd, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1451_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1451_:string ->((5)words$word#(6)words$word)option) s1452_0= + (let s1453_0 = s1452_0 in + if ((string_startswith s1453_0 "c.ldsp")) then + (case ((string_drop s1453_0 ((string_length "c.ldsp")))) of + s1454_0 => + (case ((spc_matches_prefix0 s1454_0)) of + SOME ((() , s1455_0)) => + (case ((string_drop s1454_0 s1455_0)) of + s1456_0 => + (case ((reg_name_matches_prefix s1456_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1457_0)) => + (case ((string_drop s1456_0 s1457_0)) of + s1458_0 => + (case ((sep_matches_prefix s1458_0)) of + SOME ((() , s1459_0)) => + (case ((string_drop s1458_0 s1459_0)) of + s1460_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1460_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s1461_0)) => + let p0_ = (string_drop s1460_0 s1461_0) in + if (((p0_ = ""))) then SOME (rd, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1439_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1439_:string ->((5)words$word#(6)words$word)option) s1440_0= + (let s1441_0 = s1440_0 in + if ((string_startswith s1441_0 "c.lwsp")) then + (case ((string_drop s1441_0 ((string_length "c.lwsp")))) of + s1442_0 => + (case ((spc_matches_prefix0 s1442_0)) of + SOME ((() , s1443_0)) => + (case ((string_drop s1442_0 s1443_0)) of + s1444_0 => + (case ((reg_name_matches_prefix s1444_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1445_0)) => + (case ((string_drop s1444_0 s1445_0)) of + s1446_0 => + (case ((sep_matches_prefix s1446_0)) of + SOME ((() , s1447_0)) => + (case ((string_drop s1446_0 s1447_0)) of + s1448_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1448_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s1449_0)) => + let p0_ = (string_drop s1448_0 s1449_0) in + if (((p0_ = ""))) then SOME (rd, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1427_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1427_:string ->((5)words$word#(6)words$word)option) s1428_0= + (let s1429_0 = s1428_0 in + if ((string_startswith s1429_0 "c.slli")) then + (case ((string_drop s1429_0 ((string_length "c.slli")))) of + s1430_0 => + (case ((spc_matches_prefix0 s1430_0)) of + SOME ((() , s1431_0)) => + (case ((string_drop s1430_0 s1431_0)) of + s1432_0 => + (case ((reg_name_matches_prefix s1432_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s1433_0)) => + (case ((string_drop s1432_0 s1433_0)) of + s1434_0 => + (case ((sep_matches_prefix s1434_0)) of + SOME ((() , s1435_0)) => + (case ((string_drop s1434_0 s1435_0)) of + s1436_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1436_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s1437_0)) => + let p0_ = (string_drop s1436_0 s1437_0) in + if (((p0_ = ""))) then SOME (rsd, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1415_ : string -> maybe ((mword ty3 * mword ty8))*) + +val _ = Define ` + ((s1415_:string ->((3)words$word#(8)words$word)option) s1416_0= + (let s1417_0 = s1416_0 in + if ((string_startswith s1417_0 "c.bnez")) then + (case ((string_drop s1417_0 ((string_length "c.bnez")))) of + s1418_0 => + (case ((spc_matches_prefix0 s1418_0)) of + SOME ((() , s1419_0)) => + (case ((string_drop s1418_0 s1419_0)) of + s1420_0 => + (case ((creg_name_matches_prefix s1420_0 : (( 3 words$word # ii)) option)) of + SOME ((rs, s1421_0)) => + (case ((string_drop s1420_0 s1421_0)) of + s1422_0 => + (case ((sep_matches_prefix s1422_0)) of + SOME ((() , s1423_0)) => + (case ((string_drop s1422_0 s1423_0)) of + s1424_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1424_0 : (( 8 words$word # ii)) option)) of + SOME ((imm, s1425_0)) => + let p0_ = (string_drop s1424_0 s1425_0) in + if (((p0_ = ""))) then SOME (rs, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1403_ : string -> maybe ((mword ty3 * mword ty8))*) + +val _ = Define ` + ((s1403_:string ->((3)words$word#(8)words$word)option) s1404_0= + (let s1405_0 = s1404_0 in + if ((string_startswith s1405_0 "c.beqz")) then + (case ((string_drop s1405_0 ((string_length "c.beqz")))) of + s1406_0 => + (case ((spc_matches_prefix0 s1406_0)) of + SOME ((() , s1407_0)) => + (case ((string_drop s1406_0 s1407_0)) of + s1408_0 => + (case ((creg_name_matches_prefix s1408_0 : (( 3 words$word # ii)) option)) of + SOME ((rs, s1409_0)) => + (case ((string_drop s1408_0 s1409_0)) of + s1410_0 => + (case ((sep_matches_prefix s1410_0)) of + SOME ((() , s1411_0)) => + (case ((string_drop s1410_0 s1411_0)) of + s1412_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1412_0 : (( 8 words$word # ii)) option)) of + SOME ((imm, s1413_0)) => + let p0_ = (string_drop s1412_0 s1413_0) in + if (((p0_ = ""))) then SOME (rs, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1395_ : string -> maybe (mword ty11)*) + +val _ = Define ` + ((s1395_:string ->((11)words$word)option) s1396_0= + (let s1397_0 = s1396_0 in + if ((string_startswith s1397_0 "c.j")) then + (case ((string_drop s1397_0 ((string_length "c.j")))) of + s1398_0 => + (case ((spc_matches_prefix0 s1398_0)) of + SOME ((() , s1399_0)) => + (case ((string_drop s1398_0 s1399_0)) of + s1400_0 => + (case ((hex_bits_11_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1400_0 : (( 11 words$word # ii)) option)) of + SOME ((imm, s1401_0)) => + let p0_ = (string_drop s1400_0 s1401_0) in + if (((p0_ = ""))) then SOME imm else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1383_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s1383_:string ->((3)words$word#(3)words$word)option) s1384_0= + (let s1385_0 = s1384_0 in + if ((string_startswith s1385_0 "c.addw")) then + (case ((string_drop s1385_0 ((string_length "c.addw")))) of + s1386_0 => + (case ((spc_matches_prefix0 s1386_0)) of + SOME ((() , s1387_0)) => + (case ((string_drop s1386_0 s1387_0)) of + s1388_0 => + (case ((creg_name_matches_prefix s1388_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1389_0)) => + (case ((string_drop s1388_0 s1389_0)) of + s1390_0 => + (case ((sep_matches_prefix s1390_0)) of + SOME ((() , s1391_0)) => + (case ((string_drop s1390_0 s1391_0)) of + s1392_0 => + (case ((creg_name_matches_prefix s1392_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s1393_0)) => + let p0_ = (string_drop s1392_0 s1393_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1371_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s1371_:string ->((3)words$word#(3)words$word)option) s1372_0= + (let s1373_0 = s1372_0 in + if ((string_startswith s1373_0 "c.subw")) then + (case ((string_drop s1373_0 ((string_length "c.subw")))) of + s1374_0 => + (case ((spc_matches_prefix0 s1374_0)) of + SOME ((() , s1375_0)) => + (case ((string_drop s1374_0 s1375_0)) of + s1376_0 => + (case ((creg_name_matches_prefix s1376_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1377_0)) => + (case ((string_drop s1376_0 s1377_0)) of + s1378_0 => + (case ((sep_matches_prefix s1378_0)) of + SOME ((() , s1379_0)) => + (case ((string_drop s1378_0 s1379_0)) of + s1380_0 => + (case ((creg_name_matches_prefix s1380_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s1381_0)) => + let p0_ = (string_drop s1380_0 s1381_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1359_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s1359_:string ->((3)words$word#(3)words$word)option) s1360_0= + (let s1361_0 = s1360_0 in + if ((string_startswith s1361_0 "c.and")) then + (case ((string_drop s1361_0 ((string_length "c.and")))) of + s1362_0 => + (case ((spc_matches_prefix0 s1362_0)) of + SOME ((() , s1363_0)) => + (case ((string_drop s1362_0 s1363_0)) of + s1364_0 => + (case ((creg_name_matches_prefix s1364_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1365_0)) => + (case ((string_drop s1364_0 s1365_0)) of + s1366_0 => + (case ((sep_matches_prefix s1366_0)) of + SOME ((() , s1367_0)) => + (case ((string_drop s1366_0 s1367_0)) of + s1368_0 => + (case ((creg_name_matches_prefix s1368_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s1369_0)) => + let p0_ = (string_drop s1368_0 s1369_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1347_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s1347_:string ->((3)words$word#(3)words$word)option) s1348_0= + (let s1349_0 = s1348_0 in + if ((string_startswith s1349_0 "c.or")) then + (case ((string_drop s1349_0 ((string_length "c.or")))) of + s1350_0 => + (case ((spc_matches_prefix0 s1350_0)) of + SOME ((() , s1351_0)) => + (case ((string_drop s1350_0 s1351_0)) of + s1352_0 => + (case ((creg_name_matches_prefix s1352_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1353_0)) => + (case ((string_drop s1352_0 s1353_0)) of + s1354_0 => + (case ((sep_matches_prefix s1354_0)) of + SOME ((() , s1355_0)) => + (case ((string_drop s1354_0 s1355_0)) of + s1356_0 => + (case ((creg_name_matches_prefix s1356_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s1357_0)) => + let p0_ = (string_drop s1356_0 s1357_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1335_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s1335_:string ->((3)words$word#(3)words$word)option) s1336_0= + (let s1337_0 = s1336_0 in + if ((string_startswith s1337_0 "c.xor")) then + (case ((string_drop s1337_0 ((string_length "c.xor")))) of + s1338_0 => + (case ((spc_matches_prefix0 s1338_0)) of + SOME ((() , s1339_0)) => + (case ((string_drop s1338_0 s1339_0)) of + s1340_0 => + (case ((creg_name_matches_prefix s1340_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1341_0)) => + (case ((string_drop s1340_0 s1341_0)) of + s1342_0 => + (case ((sep_matches_prefix s1342_0)) of + SOME ((() , s1343_0)) => + (case ((string_drop s1342_0 s1343_0)) of + s1344_0 => + (case ((creg_name_matches_prefix s1344_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s1345_0)) => + let p0_ = (string_drop s1344_0 s1345_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1323_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s1323_:string ->((3)words$word#(3)words$word)option) s1324_0= + (let s1325_0 = s1324_0 in + if ((string_startswith s1325_0 "c.sub")) then + (case ((string_drop s1325_0 ((string_length "c.sub")))) of + s1326_0 => + (case ((spc_matches_prefix0 s1326_0)) of + SOME ((() , s1327_0)) => + (case ((string_drop s1326_0 s1327_0)) of + s1328_0 => + (case ((creg_name_matches_prefix s1328_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1329_0)) => + (case ((string_drop s1328_0 s1329_0)) of + s1330_0 => + (case ((sep_matches_prefix s1330_0)) of + SOME ((() , s1331_0)) => + (case ((string_drop s1330_0 s1331_0)) of + s1332_0 => + (case ((creg_name_matches_prefix s1332_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s1333_0)) => + let p0_ = (string_drop s1332_0 s1333_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1311_ : string -> maybe ((mword ty3 * mword ty6))*) + +val _ = Define ` + ((s1311_:string ->((3)words$word#(6)words$word)option) s1312_0= + (let s1313_0 = s1312_0 in + if ((string_startswith s1313_0 "c.andi")) then + (case ((string_drop s1313_0 ((string_length "c.andi")))) of + s1314_0 => + (case ((spc_matches_prefix0 s1314_0)) of + SOME ((() , s1315_0)) => + (case ((string_drop s1314_0 s1315_0)) of + s1316_0 => + (case ((creg_name_matches_prefix s1316_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1317_0)) => + (case ((string_drop s1316_0 s1317_0)) of + s1318_0 => + (case ((sep_matches_prefix s1318_0)) of + SOME ((() , s1319_0)) => + (case ((string_drop s1318_0 s1319_0)) of + s1320_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1320_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s1321_0)) => + let p0_ = (string_drop s1320_0 s1321_0) in + if (((p0_ = ""))) then SOME (rsd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1299_ : string -> maybe ((mword ty3 * mword ty6))*) + +val _ = Define ` + ((s1299_:string ->((3)words$word#(6)words$word)option) s1300_0= + (let s1301_0 = s1300_0 in + if ((string_startswith s1301_0 "c.srai")) then + (case ((string_drop s1301_0 ((string_length "c.srai")))) of + s1302_0 => + (case ((spc_matches_prefix0 s1302_0)) of + SOME ((() , s1303_0)) => + (case ((string_drop s1302_0 s1303_0)) of + s1304_0 => + (case ((creg_name_matches_prefix s1304_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1305_0)) => + (case ((string_drop s1304_0 s1305_0)) of + s1306_0 => + (case ((sep_matches_prefix s1306_0)) of + SOME ((() , s1307_0)) => + (case ((string_drop s1306_0 s1307_0)) of + s1308_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1308_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s1309_0)) => + let p0_ = (string_drop s1308_0 s1309_0) in + if (((p0_ = ""))) then SOME (rsd, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1287_ : string -> maybe ((mword ty3 * mword ty6))*) + +val _ = Define ` + ((s1287_:string ->((3)words$word#(6)words$word)option) s1288_0= + (let s1289_0 = s1288_0 in + if ((string_startswith s1289_0 "c.srli")) then + (case ((string_drop s1289_0 ((string_length "c.srli")))) of + s1290_0 => + (case ((spc_matches_prefix0 s1290_0)) of + SOME ((() , s1291_0)) => + (case ((string_drop s1290_0 s1291_0)) of + s1292_0 => + (case ((creg_name_matches_prefix s1292_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s1293_0)) => + (case ((string_drop s1292_0 s1293_0)) of + s1294_0 => + (case ((sep_matches_prefix s1294_0)) of + SOME ((() , s1295_0)) => + (case ((string_drop s1294_0 s1295_0)) of + s1296_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1296_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s1297_0)) => + let p0_ = (string_drop s1296_0 s1297_0) in + if (((p0_ = ""))) then SOME (rsd, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1275_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1275_:string ->((5)words$word#(6)words$word)option) s1276_0= + (let s1277_0 = s1276_0 in + if ((string_startswith s1277_0 "c.lui")) then + (case ((string_drop s1277_0 ((string_length "c.lui")))) of + s1278_0 => + (case ((spc_matches_prefix0 s1278_0)) of + SOME ((() , s1279_0)) => + (case ((string_drop s1278_0 s1279_0)) of + s1280_0 => + (case ((reg_name_matches_prefix s1280_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1281_0)) => + (case ((string_drop s1280_0 s1281_0)) of + s1282_0 => + (case ((sep_matches_prefix s1282_0)) of + SOME ((() , s1283_0)) => + (case ((string_drop s1282_0 s1283_0)) of + s1284_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1284_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s1285_0)) => + let p0_ = (string_drop s1284_0 s1285_0) in + if (((p0_ = ""))) then SOME (rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1267_ : string -> maybe (mword ty6)*) + +val _ = Define ` + ((s1267_:string ->((6)words$word)option) s1268_0= + (let s1269_0 = s1268_0 in + if ((string_startswith s1269_0 "c.addi16sp")) then + (case ((string_drop s1269_0 ((string_length "c.addi16sp")))) of + s1270_0 => + (case ((spc_matches_prefix0 s1270_0)) of + SOME ((() , s1271_0)) => + (case ((string_drop s1270_0 s1271_0)) of + s1272_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1272_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s1273_0)) => + let p0_ = (string_drop s1272_0 s1273_0) in + if (((p0_ = ""))) then SOME imm else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1255_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1255_:string ->((5)words$word#(6)words$word)option) s1256_0= + (let s1257_0 = s1256_0 in + if ((string_startswith s1257_0 "c.li")) then + (case ((string_drop s1257_0 ((string_length "c.li")))) of + s1258_0 => + (case ((spc_matches_prefix0 s1258_0)) of + SOME ((() , s1259_0)) => + (case ((string_drop s1258_0 s1259_0)) of + s1260_0 => + (case ((reg_name_matches_prefix s1260_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1261_0)) => + (case ((string_drop s1260_0 s1261_0)) of + s1262_0 => + (case ((sep_matches_prefix s1262_0)) of + SOME ((() , s1263_0)) => + (case ((string_drop s1262_0 s1263_0)) of + s1264_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1264_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s1265_0)) => + let p0_ = (string_drop s1264_0 s1265_0) in + if (((p0_ = ""))) then SOME (rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1243_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1243_:string ->((5)words$word#(6)words$word)option) s1244_0= + (let s1245_0 = s1244_0 in + if ((string_startswith s1245_0 "c.addiw")) then + (case ((string_drop s1245_0 ((string_length "c.addiw")))) of + s1246_0 => + (case ((spc_matches_prefix0 s1246_0)) of + SOME ((() , s1247_0)) => + (case ((string_drop s1246_0 s1247_0)) of + s1248_0 => + (case ((reg_name_matches_prefix s1248_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s1249_0)) => + (case ((string_drop s1248_0 s1249_0)) of + s1250_0 => + (case ((sep_matches_prefix s1250_0)) of + SOME ((() , s1251_0)) => + (case ((string_drop s1250_0 s1251_0)) of + s1252_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1252_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s1253_0)) => + let p0_ = (string_drop s1252_0 s1253_0) in + if (((p0_ = ""))) then SOME (rsd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1235_ : string -> maybe (mword ty11)*) + +val _ = Define ` + ((s1235_:string ->((11)words$word)option) s1236_0= + (let s1237_0 = s1236_0 in + if ((string_startswith s1237_0 "c.jal")) then + (case ((string_drop s1237_0 ((string_length "c.jal")))) of + s1238_0 => + (case ((spc_matches_prefix0 s1238_0)) of + SOME ((() , s1239_0)) => + (case ((string_drop s1238_0 s1239_0)) of + s1240_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1240_0 : (( 12 words$word # ii)) option)) of + SOME ((v__802, s1241_0)) => + if (((((subrange_vec_dec v__802 (( 0 : int): ii) (( 0 : int): ii) : 1 words$word)) + = (vec_of_bits [B0] : 1 words$word)))) then + let (imm : 11 words$word) = ((subrange_vec_dec v__802 (( 11 : int): ii) + (( 1 : int): ii) : 11 words$word)) in + let (imm : 11 words$word) = ((subrange_vec_dec v__802 (( 11 : int): ii) + (( 1 : int): ii) : 11 words$word)) in + let p0_ = (string_drop s1240_0 s1241_0) in + if (((p0_ = ""))) then SOME imm else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1223_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1223_:string ->((5)words$word#(6)words$word)option) s1224_0= + (let s1225_0 = s1224_0 in + if ((string_startswith s1225_0 "c.addi")) then + (case ((string_drop s1225_0 ((string_length "c.addi")))) of + s1226_0 => + (case ((spc_matches_prefix0 s1226_0)) of + SOME ((() , s1227_0)) => + (case ((string_drop s1226_0 s1227_0)) of + s1228_0 => + (case ((reg_name_matches_prefix s1228_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s1229_0)) => + (case ((string_drop s1228_0 s1229_0)) of + s1230_0 => + (case ((sep_matches_prefix s1230_0)) of + SOME ((() , s1231_0)) => + (case ((string_drop s1230_0 s1231_0)) of + s1232_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1232_0 : (( 6 words$word # ii)) option)) of + SOME ((nzi, s1233_0)) => + let p0_ = (string_drop s1232_0 s1233_0) in + if (((p0_ = ""))) then SOME (rsd, nzi) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1207_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s1207_:string ->((3)words$word#(3)words$word#(5)words$word)option) s1208_0= + (let s1209_0 = s1208_0 in + if ((string_startswith s1209_0 "c.sd")) then + (case ((string_drop s1209_0 ((string_length "c.sd")))) of + s1210_0 => + (case ((spc_matches_prefix0 s1210_0)) of + SOME ((() , s1211_0)) => + (case ((string_drop s1210_0 s1211_0)) of + s1212_0 => + (case ((creg_name_matches_prefix s1212_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc1, s1213_0)) => + (case ((string_drop s1212_0 s1213_0)) of + s1214_0 => + (case ((sep_matches_prefix s1214_0)) of + SOME ((() , s1215_0)) => + (case ((string_drop s1214_0 s1215_0)) of + s1216_0 => + (case ((creg_name_matches_prefix s1216_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc2, s1217_0)) => + (case ((string_drop s1216_0 s1217_0)) of + s1218_0 => + (case ((sep_matches_prefix s1218_0)) of + SOME ((() , s1219_0)) => + (case ((string_drop s1218_0 s1219_0)) of + s1220_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1220_0 + : (( 8 words$word # ii)) option)) of + SOME ((v__804, s1221_0)) => + if (((((subrange_vec_dec v__804 (( 2 : int): ii) (( 0 : int): ii) : 3 words$word)) + = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__804 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__804 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s1220_0 s1221_0) in + if (((p0_ = ""))) then SOME (rsc1, rsc2, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1191_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s1191_:string ->((3)words$word#(3)words$word#(5)words$word)option) s1192_0= + (let s1193_0 = s1192_0 in + if ((string_startswith s1193_0 "c.sw")) then + (case ((string_drop s1193_0 ((string_length "c.sw")))) of + s1194_0 => + (case ((spc_matches_prefix0 s1194_0)) of + SOME ((() , s1195_0)) => + (case ((string_drop s1194_0 s1195_0)) of + s1196_0 => + (case ((creg_name_matches_prefix s1196_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc1, s1197_0)) => + (case ((string_drop s1196_0 s1197_0)) of + s1198_0 => + (case ((sep_matches_prefix s1198_0)) of + SOME ((() , s1199_0)) => + (case ((string_drop s1198_0 s1199_0)) of + s1200_0 => + (case ((creg_name_matches_prefix s1200_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc2, s1201_0)) => + (case ((string_drop s1200_0 s1201_0)) of + s1202_0 => + (case ((sep_matches_prefix s1202_0)) of + SOME ((() , s1203_0)) => + (case ((string_drop s1202_0 s1203_0)) of + s1204_0 => + (case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1204_0 + : (( 7 words$word # ii)) option)) of + SOME ((v__806, s1205_0)) => + if (((((subrange_vec_dec v__806 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__806 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__806 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s1204_0 s1205_0) in + if (((p0_ = ""))) then SOME (rsc1, rsc2, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1175_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s1175_:string ->((3)words$word#(3)words$word#(5)words$word)option) s1176_0= + (let s1177_0 = s1176_0 in + if ((string_startswith s1177_0 "c.ld")) then + (case ((string_drop s1177_0 ((string_length "c.ld")))) of + s1178_0 => + (case ((spc_matches_prefix0 s1178_0)) of + SOME ((() , s1179_0)) => + (case ((string_drop s1178_0 s1179_0)) of + s1180_0 => + (case ((creg_name_matches_prefix s1180_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s1181_0)) => + (case ((string_drop s1180_0 s1181_0)) of + s1182_0 => + (case ((sep_matches_prefix s1182_0)) of + SOME ((() , s1183_0)) => + (case ((string_drop s1182_0 s1183_0)) of + s1184_0 => + (case ((creg_name_matches_prefix s1184_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc, s1185_0)) => + (case ((string_drop s1184_0 s1185_0)) of + s1186_0 => + (case ((sep_matches_prefix s1186_0)) of + SOME ((() , s1187_0)) => + (case ((string_drop s1186_0 s1187_0)) of + s1188_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1188_0 + : (( 8 words$word # ii)) option)) of + SOME ((v__808, s1189_0)) => + if (((((subrange_vec_dec v__808 (( 2 : int): ii) (( 0 : int): ii) : 3 words$word)) + = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__808 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__808 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s1188_0 s1189_0) in + if (((p0_ = ""))) then SOME (rdc, rsc, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1159_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s1159_:string ->((3)words$word#(3)words$word#(5)words$word)option) s1160_0= + (let s1161_0 = s1160_0 in + if ((string_startswith s1161_0 "c.lw")) then + (case ((string_drop s1161_0 ((string_length "c.lw")))) of + s1162_0 => + (case ((spc_matches_prefix0 s1162_0)) of + SOME ((() , s1163_0)) => + (case ((string_drop s1162_0 s1163_0)) of + s1164_0 => + (case ((creg_name_matches_prefix s1164_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s1165_0)) => + (case ((string_drop s1164_0 s1165_0)) of + s1166_0 => + (case ((sep_matches_prefix s1166_0)) of + SOME ((() , s1167_0)) => + (case ((string_drop s1166_0 s1167_0)) of + s1168_0 => + (case ((creg_name_matches_prefix s1168_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc, s1169_0)) => + (case ((string_drop s1168_0 s1169_0)) of + s1170_0 => + (case ((sep_matches_prefix s1170_0)) of + SOME ((() , s1171_0)) => + (case ((string_drop s1170_0 s1171_0)) of + s1172_0 => + (case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1172_0 + : (( 7 words$word # ii)) option)) of + SOME ((v__810, s1173_0)) => + if (((((subrange_vec_dec v__810 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__810 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__810 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s1172_0 s1173_0) in + if (((p0_ = ""))) then SOME (rdc, rsc, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1147_ : string -> maybe ((mword ty3 * mword ty8))*) + +val _ = Define ` + ((s1147_:string ->((3)words$word#(8)words$word)option) s1148_0= + (let s1149_0 = s1148_0 in + if ((string_startswith s1149_0 "c.addi4spn")) then + (case ((string_drop s1149_0 ((string_length "c.addi4spn")))) of + s1150_0 => + (case ((spc_matches_prefix0 s1150_0)) of + SOME ((() , s1151_0)) => + (case ((string_drop s1150_0 s1151_0)) of + s1152_0 => + (case ((creg_name_matches_prefix s1152_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s1153_0)) => + (case ((string_drop s1152_0 s1153_0)) of + s1154_0 => + (case ((sep_matches_prefix s1154_0)) of + SOME ((() , s1155_0)) => + (case ((string_drop s1154_0 s1155_0)) of + s1156_0 => + (case ((hex_bits_10_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1156_0 : (( 10 words$word # ii)) option)) of + SOME ((v__812, s1157_0)) => + if (((((subrange_vec_dec v__812 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (nzimm : 8 words$word) = + ((subrange_vec_dec v__812 (( 9 : int): ii) (( 2 : int): ii) : 8 words$word)) in + let (nzimm : 8 words$word) = + ((subrange_vec_dec v__812 (( 9 : int): ii) (( 2 : int): ii) : 8 words$word)) in + let p0_ = (string_drop s1156_0 s1157_0) in + if (((p0_ = ""))) then SOME (rdc, nzimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1123_ : string -> maybe ((amoop * word_width * bool * bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1123_:string ->(amoop#word_width#bool#bool#(5)words$word#(5)words$word#(5)words$word)option) s1124_0= + ((case s1124_0 of + s1125_0 => + (case ((amo_mnemonic_matches_prefix s1125_0)) of + SOME ((op, s1126_0)) => + let s1127_0 = (string_drop s1125_0 s1126_0) in + if ((string_startswith s1127_0 ".")) then + (case ((string_drop s1127_0 ((string_length ".")))) of + s1128_0 => + (case ((size_mnemonic_matches_prefix s1128_0)) of + SOME ((width, s1129_0)) => + (case ((string_drop s1128_0 s1129_0)) of + s1130_0 => + (case ((maybe_aq_matches_prefix s1130_0)) of + SOME ((aq, s1131_0)) => + (case ((string_drop s1130_0 s1131_0)) of + s1132_0 => + (case ((maybe_rl_matches_prefix s1132_0)) of + SOME ((rl, s1133_0)) => + (case ((string_drop s1132_0 s1133_0)) of + s1134_0 => + (case ((spc_matches_prefix0 s1134_0)) of + SOME ((() , s1135_0)) => + (case ((string_drop s1134_0 s1135_0)) of + s1136_0 => + (case ((reg_name_matches_prefix s1136_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1137_0)) => + (case ((string_drop s1136_0 s1137_0)) of + s1138_0 => + (case ((sep_matches_prefix s1138_0)) of + SOME ((() , s1139_0)) => + (case ((string_drop s1138_0 s1139_0)) of + s1140_0 => + (case ((reg_name_matches_prefix s1140_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1141_0)) => + (case ((string_drop s1140_0 s1141_0)) of + s1142_0 => + (case ((sep_matches_prefix s1142_0)) of + SOME ((() , s1143_0)) => + (case ((string_drop s1142_0 s1143_0)) of + s1144_0 => + (case ((reg_name_matches_prefix s1144_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1145_0)) => + let p0_ = (string_drop s1144_0 s1145_0) in + if (((p0_ = ""))) then SOME (op, width, aq, rl, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +(*val _s1101_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1101_:string ->(word_width#bool#bool#(5)words$word#(5)words$word#(5)words$word)option) s1102_0= + (let s1103_0 = s1102_0 in + if ((string_startswith s1103_0 "sc.")) then + (case ((string_drop s1103_0 ((string_length "sc.")))) of + s1104_0 => + (case ((size_mnemonic_matches_prefix s1104_0)) of + SOME ((size1, s1105_0)) => + (case ((string_drop s1104_0 s1105_0)) of + s1106_0 => + (case ((maybe_aq_matches_prefix s1106_0)) of + SOME ((aq, s1107_0)) => + (case ((string_drop s1106_0 s1107_0)) of + s1108_0 => + (case ((maybe_rl_matches_prefix s1108_0)) of + SOME ((rl, s1109_0)) => + (case ((string_drop s1108_0 s1109_0)) of + s1110_0 => + (case ((spc_matches_prefix0 s1110_0)) of + SOME ((() , s1111_0)) => + (case ((string_drop s1110_0 s1111_0)) of + s1112_0 => + (case ((reg_name_matches_prefix s1112_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1113_0)) => + (case ((string_drop s1112_0 s1113_0)) of + s1114_0 => + (case ((sep_matches_prefix s1114_0)) of + SOME ((() , s1115_0)) => + (case ((string_drop s1114_0 s1115_0)) of + s1116_0 => + (case ((reg_name_matches_prefix s1116_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1117_0)) => + (case ((string_drop s1116_0 s1117_0)) of + s1118_0 => + (case ((sep_matches_prefix s1118_0)) of + SOME ((() , s1119_0)) => + (case ((string_drop s1118_0 s1119_0)) of + s1120_0 => + (case ((reg_name_matches_prefix s1120_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1121_0)) => + let p0_ = (string_drop s1120_0 s1121_0) in + if (((p0_ = ""))) then SOME (size1, aq, rl, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1083_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1083_:string ->(word_width#bool#bool#(5)words$word#(5)words$word)option) s1084_0= + (let s1085_0 = s1084_0 in + if ((string_startswith s1085_0 "lr.")) then + (case ((string_drop s1085_0 ((string_length "lr.")))) of + s1086_0 => + (case ((size_mnemonic_matches_prefix s1086_0)) of + SOME ((size1, s1087_0)) => + (case ((string_drop s1086_0 s1087_0)) of + s1088_0 => + (case ((maybe_aq_matches_prefix s1088_0)) of + SOME ((aq, s1089_0)) => + (case ((string_drop s1088_0 s1089_0)) of + s1090_0 => + (case ((maybe_rl_matches_prefix s1090_0)) of + SOME ((rl, s1091_0)) => + (case ((string_drop s1090_0 s1091_0)) of + s1092_0 => + (case ((spc_matches_prefix0 s1092_0)) of + SOME ((() , s1093_0)) => + (case ((string_drop s1092_0 s1093_0)) of + s1094_0 => + (case ((reg_name_matches_prefix s1094_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1095_0)) => + (case ((string_drop s1094_0 s1095_0)) of + s1096_0 => + (case ((sep_matches_prefix s1096_0)) of + SOME ((() , s1097_0)) => + (case ((string_drop s1096_0 s1097_0)) of + s1098_0 => + (case ((reg_name_matches_prefix s1098_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1099_0)) => + let p0_ = (string_drop s1098_0 s1099_0) in + if (((p0_ = ""))) then SOME (size1, aq, rl, rd, rs1) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1071_ : string -> maybe ((mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1071_:string ->((5)words$word#(5)words$word)option) s1072_0= + (let s1073_0 = s1072_0 in + if ((string_startswith s1073_0 "sfence.vma")) then + (case ((string_drop s1073_0 ((string_length "sfence.vma")))) of + s1074_0 => + (case ((spc_matches_prefix0 s1074_0)) of + SOME ((() , s1075_0)) => + (case ((string_drop s1074_0 s1075_0)) of + s1076_0 => + (case ((reg_name_matches_prefix s1076_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1077_0)) => + (case ((string_drop s1076_0 s1077_0)) of + s1078_0 => + (case ((sep_matches_prefix s1078_0)) of + SOME ((() , s1079_0)) => + (case ((string_drop s1078_0 s1079_0)) of + s1080_0 => + (case ((reg_name_matches_prefix s1080_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1081_0)) => + let p0_ = (string_drop s1080_0 s1081_0) in + if (((p0_ = ""))) then SOME (rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1059_ : string -> maybe ((mword ty4 * mword ty4))*) + +val _ = Define ` + ((s1059_:string ->((4)words$word#(4)words$word)option) s1060_0= + (let s1061_0 = s1060_0 in + if ((string_startswith s1061_0 "fence.tso")) then + (case ((string_drop s1061_0 ((string_length "fence.tso")))) of + s1062_0 => + (case ((spc_matches_prefix0 s1062_0)) of + SOME ((() , s1063_0)) => + (case ((string_drop s1062_0 s1063_0)) of + s1064_0 => + (case ((fence_bits_matches_prefix s1064_0 : (( 4 words$word # ii)) option)) of + SOME ((pred, s1065_0)) => + (case ((string_drop s1064_0 s1065_0)) of + s1066_0 => + (case ((sep_matches_prefix s1066_0)) of + SOME ((() , s1067_0)) => + (case ((string_drop s1066_0 s1067_0)) of + s1068_0 => + (case ((fence_bits_matches_prefix s1068_0 : (( 4 words$word # ii)) option)) of + SOME ((succ, s1069_0)) => + let p0_ = (string_drop s1068_0 s1069_0) in + if (((p0_ = ""))) then SOME (pred, succ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1047_ : string -> maybe ((mword ty4 * mword ty4))*) + +val _ = Define ` + ((s1047_:string ->((4)words$word#(4)words$word)option) s1048_0= + (let s1049_0 = s1048_0 in + if ((string_startswith s1049_0 "fence")) then + (case ((string_drop s1049_0 ((string_length "fence")))) of + s1050_0 => + (case ((spc_matches_prefix0 s1050_0)) of + SOME ((() , s1051_0)) => + (case ((string_drop s1050_0 s1051_0)) of + s1052_0 => + (case ((fence_bits_matches_prefix s1052_0 : (( 4 words$word # ii)) option)) of + SOME ((pred, s1053_0)) => + (case ((string_drop s1052_0 s1053_0)) of + s1054_0 => + (case ((sep_matches_prefix s1054_0)) of + SOME ((() , s1055_0)) => + (case ((string_drop s1054_0 s1055_0)) of + s1056_0 => + (case ((fence_bits_matches_prefix s1056_0 : (( 4 words$word # ii)) option)) of + SOME ((succ, s1057_0)) => + let p0_ = (string_drop s1056_0 s1057_0) in + if (((p0_ = ""))) then SOME (pred, succ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1030_ : string -> maybe ((sopw * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1030_:string ->(sopw#(5)words$word#(5)words$word#(5)words$word)option) s1031_0= + ((case s1031_0 of + s1032_0 => + (case ((shiftiwop_mnemonic_matches_prefix s1032_0)) of + SOME ((op, s1033_0)) => + (case ((string_drop s1032_0 s1033_0)) of + s1034_0 => + (case ((spc_matches_prefix0 s1034_0)) of + SOME ((() , s1035_0)) => + (case ((string_drop s1034_0 s1035_0)) of + s1036_0 => + (case ((reg_name_matches_prefix s1036_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1037_0)) => + (case ((string_drop s1036_0 s1037_0)) of + s1038_0 => + (case ((sep_matches_prefix s1038_0)) of + SOME ((() , s1039_0)) => + (case ((string_drop s1038_0 s1039_0)) of + s1040_0 => + (case ((reg_name_matches_prefix s1040_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1041_0)) => + (case ((string_drop s1040_0 s1041_0)) of + s1042_0 => + (case ((sep_matches_prefix s1042_0)) of + SOME ((() , s1043_0)) => + (case ((string_drop s1042_0 s1043_0)) of + s1044_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1044_0 : (( 5 words$word # ii)) option)) of + SOME ((shamt, s1045_0)) => + let p0_ = (string_drop s1044_0 s1045_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1013_ : string -> maybe ((ropw * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1013_:string ->(ropw#(5)words$word#(5)words$word#(5)words$word)option) s1014_0= + ((case s1014_0 of + s1015_0 => + (case ((rtypew_mnemonic_matches_prefix s1015_0)) of + SOME ((op, s1016_0)) => + (case ((string_drop s1015_0 s1016_0)) of + s1017_0 => + (case ((spc_matches_prefix0 s1017_0)) of + SOME ((() , s1018_0)) => + (case ((string_drop s1017_0 s1018_0)) of + s1019_0 => + (case ((reg_name_matches_prefix s1019_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1020_0)) => + (case ((string_drop s1019_0 s1020_0)) of + s1021_0 => + (case ((sep_matches_prefix s1021_0)) of + SOME ((() , s1022_0)) => + (case ((string_drop s1021_0 s1022_0)) of + s1023_0 => + (case ((reg_name_matches_prefix s1023_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1024_0)) => + (case ((string_drop s1023_0 s1024_0)) of + s1025_0 => + (case ((sep_matches_prefix s1025_0)) of + SOME ((() , s1026_0)) => + (case ((string_drop s1025_0 s1026_0)) of + s1027_0 => + (case ((reg_name_matches_prefix s1027_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1028_0)) => + let p0_ = (string_drop s1027_0 s1028_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s996_ : string -> maybe ((sop * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s996_:string ->(sop#(5)words$word#(5)words$word#(5)words$word)option) s997_0= + ((case s997_0 of + s998_0 => + (case ((shiftw_mnemonic_matches_prefix s998_0)) of + SOME ((op, s999_0)) => + (case ((string_drop s998_0 s999_0)) of + s1000_0 => + (case ((spc_matches_prefix0 s1000_0)) of + SOME ((() , s1001_0)) => + (case ((string_drop s1000_0 s1001_0)) of + s1002_0 => + (case ((reg_name_matches_prefix s1002_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1003_0)) => + (case ((string_drop s1002_0 s1003_0)) of + s1004_0 => + (case ((sep_matches_prefix s1004_0)) of + SOME ((() , s1005_0)) => + (case ((string_drop s1004_0 s1005_0)) of + s1006_0 => + (case ((reg_name_matches_prefix s1006_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1007_0)) => + (case ((string_drop s1006_0 s1007_0)) of + s1008_0 => + (case ((sep_matches_prefix s1008_0)) of + SOME ((() , s1009_0)) => + (case ((string_drop s1008_0 s1009_0)) of + s1010_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1010_0 : (( 5 words$word # ii)) option)) of + SOME ((shamt, s1011_0)) => + let p0_ = (string_drop s1010_0 s1011_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s980_ : string -> maybe ((mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s980_:string ->((5)words$word#(5)words$word#(12)words$word)option) s981_0= + (let s982_0 = s981_0 in + if ((string_startswith s982_0 "addiw")) then + (case ((string_drop s982_0 ((string_length "addiw")))) of + s983_0 => + (case ((spc_matches_prefix0 s983_0)) of + SOME ((() , s984_0)) => + (case ((string_drop s983_0 s984_0)) of + s985_0 => + (case ((reg_name_matches_prefix s985_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s986_0)) => + (case ((string_drop s985_0 s986_0)) of + s987_0 => + (case ((sep_matches_prefix s987_0)) of + SOME ((() , s988_0)) => + (case ((string_drop s987_0 s988_0)) of + s989_0 => + (case ((reg_name_matches_prefix s989_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s990_0)) => + (case ((string_drop s989_0 s990_0)) of + s991_0 => + (case ((sep_matches_prefix s991_0)) of + SOME ((() , s992_0)) => + (case ((string_drop s991_0 s992_0)) of + s993_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s993_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s994_0)) => + let p0_ = (string_drop s993_0 s994_0) in + if (((p0_ = ""))) then SOME (rd, rs1, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s952_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty12 * mword ty5))*) + +val _ = Define ` + ((s952_:string ->(word_width#bool#bool#(5)words$word#(12)words$word#(5)words$word)option) s953_0= + (let s954_0 = s953_0 in + if ((string_startswith s954_0 "s")) then + (case ((string_drop s954_0 ((string_length "s")))) of + s955_0 => + (case ((size_mnemonic_matches_prefix s955_0)) of + SOME ((size1, s956_0)) => + (case ((string_drop s955_0 s956_0)) of + s957_0 => + (case ((maybe_aq_matches_prefix s957_0)) of + SOME ((aq, s958_0)) => + (case ((string_drop s957_0 s958_0)) of + s959_0 => + (case ((maybe_rl_matches_prefix s959_0)) of + SOME ((rl, s960_0)) => + (case ((string_drop s959_0 s960_0)) of + s961_0 => + (case ((spc_matches_prefix0 s961_0)) of + SOME ((() , s962_0)) => + (case ((string_drop s961_0 s962_0)) of + s963_0 => + (case ((reg_name_matches_prefix s963_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s964_0)) => + (case ((string_drop s963_0 s964_0)) of + s965_0 => + (case ((sep_matches_prefix s965_0)) of + SOME ((() , s966_0)) => + (case ((string_drop s965_0 s966_0)) of + s967_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s967_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s968_0)) => + (case ((string_drop s967_0 s968_0)) of + s969_0 => + (case ((opt_spc_matches_prefix0 s969_0)) of + SOME ((() , s970_0)) => + let s971_0 = (string_drop s969_0 s970_0) in + if ((string_startswith s971_0 "(")) then + (case ((string_drop s971_0 ((string_length "(")))) of + s972_0 => + (case ((opt_spc_matches_prefix0 s972_0)) of + SOME ((() , s973_0)) => + (case ((string_drop s972_0 s973_0)) of + s974_0 => + (case ((reg_name_matches_prefix s974_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s975_0)) => + (case ((string_drop s974_0 s975_0)) of + s976_0 => + (case ((opt_spc_matches_prefix0 s976_0)) of + SOME ((() , s977_0)) => + let s978_0 = (string_drop s976_0 s977_0) in + if ((string_startswith s978_0 ")")) then + let p0_ = (string_drop s978_0 ((string_length ")"))) in + if (((p0_ = ""))) then SOME (size1, aq, rl, rs2, imm, rs1) else NONE + else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s922_ : string -> maybe ((word_width * bool * bool * bool * mword ty5 * mword ty12 * mword ty5))*) + +val _ = Define ` + ((s922_:string ->(word_width#bool#bool#bool#(5)words$word#(12)words$word#(5)words$word)option) s923_0= + (let s924_0 = s923_0 in + if ((string_startswith s924_0 "l")) then + (case ((string_drop s924_0 ((string_length "l")))) of + s925_0 => + (case ((size_mnemonic_matches_prefix s925_0)) of + SOME ((size1, s926_0)) => + (case ((string_drop s925_0 s926_0)) of + s927_0 => + (case ((maybe_u_matches_prefix s927_0)) of + SOME ((is_unsigned, s928_0)) => + (case ((string_drop s927_0 s928_0)) of + s929_0 => + (case ((maybe_aq_matches_prefix s929_0)) of + SOME ((aq, s930_0)) => + (case ((string_drop s929_0 s930_0)) of + s931_0 => + (case ((maybe_rl_matches_prefix s931_0)) of + SOME ((rl, s932_0)) => + (case ((string_drop s931_0 s932_0)) of + s933_0 => + (case ((spc_matches_prefix0 s933_0)) of + SOME ((() , s934_0)) => + (case ((string_drop s933_0 s934_0)) of + s935_0 => + (case ((reg_name_matches_prefix s935_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s936_0)) => + (case ((string_drop s935_0 s936_0)) of + s937_0 => + (case ((sep_matches_prefix s937_0)) of + SOME ((() , s938_0)) => + (case ((string_drop s937_0 s938_0)) of + s939_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s939_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s940_0)) => + (case ((string_drop s939_0 s940_0)) of + s941_0 => + (case ((opt_spc_matches_prefix0 s941_0)) of + SOME ((() , s942_0)) => + let s943_0 = (string_drop s941_0 s942_0) in + if ((string_startswith s943_0 "(")) then + (case ((string_drop s943_0 ((string_length "(")))) of + s944_0 => + (case ((opt_spc_matches_prefix0 s944_0)) of + SOME ((() , s945_0)) => + (case ((string_drop s944_0 s945_0)) of + s946_0 => + (case ((reg_name_matches_prefix s946_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s947_0)) => + (case ((string_drop s946_0 s947_0)) of + s948_0 => + (case ((opt_spc_matches_prefix0 s948_0)) of + SOME ((() , s949_0)) => + let s950_0 = (string_drop s948_0 s949_0) in + if ((string_startswith s950_0 ")")) then + let p0_ = (string_drop s950_0 ((string_length ")"))) in + if (((p0_ = ""))) then SOME (size1, is_unsigned, aq, rl, rd, imm, rs1) + else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s905_ : string -> maybe ((rop * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s905_:string ->(rop#(5)words$word#(5)words$word#(5)words$word)option) s906_0= + ((case s906_0 of + s907_0 => + (case ((rtype_mnemonic_matches_prefix s907_0)) of + SOME ((op, s908_0)) => + (case ((string_drop s907_0 s908_0)) of + s909_0 => + (case ((spc_matches_prefix0 s909_0)) of + SOME ((() , s910_0)) => + (case ((string_drop s909_0 s910_0)) of + s911_0 => + (case ((reg_name_matches_prefix s911_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s912_0)) => + (case ((string_drop s911_0 s912_0)) of + s913_0 => + (case ((sep_matches_prefix s913_0)) of + SOME ((() , s914_0)) => + (case ((string_drop s913_0 s914_0)) of + s915_0 => + (case ((reg_name_matches_prefix s915_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s916_0)) => + (case ((string_drop s915_0 s916_0)) of + s917_0 => + (case ((sep_matches_prefix s917_0)) of + SOME ((() , s918_0)) => + (case ((string_drop s917_0 s918_0)) of + s919_0 => + (case ((reg_name_matches_prefix s919_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s920_0)) => + let p0_ = (string_drop s919_0 s920_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s888_ : string -> maybe ((sop * mword ty5 * mword ty5 * mword ty6))*) + +val _ = Define ` + ((s888_:string ->(sop#(5)words$word#(5)words$word#(6)words$word)option) s889_0= + ((case s889_0 of + s890_0 => + (case ((shiftiop_mnemonic_matches_prefix s890_0)) of + SOME ((op, s891_0)) => + (case ((string_drop s890_0 s891_0)) of + s892_0 => + (case ((spc_matches_prefix0 s892_0)) of + SOME ((() , s893_0)) => + (case ((string_drop s892_0 s893_0)) of + s894_0 => + (case ((reg_name_matches_prefix s894_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s895_0)) => + (case ((string_drop s894_0 s895_0)) of + s896_0 => + (case ((sep_matches_prefix s896_0)) of + SOME ((() , s897_0)) => + (case ((string_drop s896_0 s897_0)) of + s898_0 => + (case ((reg_name_matches_prefix s898_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s899_0)) => + (case ((string_drop s898_0 s899_0)) of + s900_0 => + (case ((sep_matches_prefix s900_0)) of + SOME ((() , s901_0)) => + (case ((string_drop s900_0 s901_0)) of + s902_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s902_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s903_0)) => + let p0_ = (string_drop s902_0 s903_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s871_ : string -> maybe ((iop * mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s871_:string ->(iop#(5)words$word#(5)words$word#(12)words$word)option) s872_0= + ((case s872_0 of + s873_0 => + (case ((itype_mnemonic_matches_prefix s873_0)) of + SOME ((op, s874_0)) => + (case ((string_drop s873_0 s874_0)) of + s875_0 => + (case ((spc_matches_prefix0 s875_0)) of + SOME ((() , s876_0)) => + (case ((string_drop s875_0 s876_0)) of + s877_0 => + (case ((reg_name_matches_prefix s877_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s878_0)) => + (case ((string_drop s877_0 s878_0)) of + s879_0 => + (case ((sep_matches_prefix s879_0)) of + SOME ((() , s880_0)) => + (case ((string_drop s879_0 s880_0)) of + s881_0 => + (case ((reg_name_matches_prefix s881_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s882_0)) => + (case ((string_drop s881_0 s882_0)) of + s883_0 => + (case ((sep_matches_prefix s883_0)) of + SOME ((() , s884_0)) => + (case ((string_drop s883_0 s884_0)) of + s885_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s885_0 : (( 12 words$word # ii)) option)) of + SOME ((imm, s886_0)) => + let p0_ = (string_drop s885_0 s886_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s854_ : string -> maybe ((bop * mword ty5 * mword ty5 * mword ty13))*) + +val _ = Define ` + ((s854_:string ->(bop#(5)words$word#(5)words$word#(13)words$word)option) s855_0= + ((case s855_0 of + s856_0 => + (case ((btype_mnemonic_matches_prefix s856_0)) of + SOME ((op, s857_0)) => + (case ((string_drop s856_0 s857_0)) of + s858_0 => + (case ((spc_matches_prefix0 s858_0)) of + SOME ((() , s859_0)) => + (case ((string_drop s858_0 s859_0)) of + s860_0 => + (case ((reg_name_matches_prefix s860_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s861_0)) => + (case ((string_drop s860_0 s861_0)) of + s862_0 => + (case ((sep_matches_prefix s862_0)) of + SOME ((() , s863_0)) => + (case ((string_drop s862_0 s863_0)) of + s864_0 => + (case ((reg_name_matches_prefix s864_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s865_0)) => + (case ((string_drop s864_0 s865_0)) of + s866_0 => + (case ((sep_matches_prefix s866_0)) of + SOME ((() , s867_0)) => + (case ((string_drop s866_0 s867_0)) of + s868_0 => + (case ((hex_bits_13_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s868_0 : (( 13 words$word # ii)) option)) of + SOME ((imm, s869_0)) => + let p0_ = (string_drop s868_0 s869_0) in + if (((p0_ = ""))) then SOME (op, rs1, rs2, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s838_ : string -> maybe ((mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s838_:string ->((5)words$word#(5)words$word#(12)words$word)option) s839_0= + (let s840_0 = s839_0 in + if ((string_startswith s840_0 "jalr")) then + (case ((string_drop s840_0 ((string_length "jalr")))) of + s841_0 => + (case ((spc_matches_prefix0 s841_0)) of + SOME ((() , s842_0)) => + (case ((string_drop s841_0 s842_0)) of + s843_0 => + (case ((reg_name_matches_prefix s843_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s844_0)) => + (case ((string_drop s843_0 s844_0)) of + s845_0 => + (case ((sep_matches_prefix s845_0)) of + SOME ((() , s846_0)) => + (case ((string_drop s845_0 s846_0)) of + s847_0 => + (case ((reg_name_matches_prefix s847_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s848_0)) => + (case ((string_drop s847_0 s848_0)) of + s849_0 => + (case ((sep_matches_prefix s849_0)) of + SOME ((() , s850_0)) => + (case ((string_drop s849_0 s850_0)) of + s851_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s851_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s852_0)) => + let p0_ = (string_drop s851_0 s852_0) in + if (((p0_ = ""))) then SOME (rd, rs1, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s826_ : string -> maybe ((mword ty5 * mword ty21))*) + +val _ = Define ` + ((s826_:string ->((5)words$word#(21)words$word)option) s827_0= + (let s828_0 = s827_0 in + if ((string_startswith s828_0 "jal")) then + (case ((string_drop s828_0 ((string_length "jal")))) of + s829_0 => + (case ((spc_matches_prefix0 s829_0)) of + SOME ((() , s830_0)) => + (case ((string_drop s829_0 s830_0)) of + s831_0 => + (case ((reg_name_matches_prefix s831_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s832_0)) => + (case ((string_drop s831_0 s832_0)) of + s833_0 => + (case ((sep_matches_prefix s833_0)) of + SOME ((() , s834_0)) => + (case ((string_drop s833_0 s834_0)) of + s835_0 => + (case ((hex_bits_21_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s835_0 : (( 21 words$word # ii)) option)) of + SOME ((imm, s836_0)) => + let p0_ = (string_drop s835_0 s836_0) in + if (((p0_ = ""))) then SOME (rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s813_ : string -> maybe ((uop * mword ty5 * mword ty20))*) + +val _ = Define ` + ((s813_:string ->(uop#(5)words$word#(20)words$word)option) s814_0= + ((case s814_0 of + s815_0 => + (case ((utype_mnemonic_matches_prefix s815_0)) of + SOME ((op, s816_0)) => + (case ((string_drop s815_0 s816_0)) of + s817_0 => + (case ((spc_matches_prefix0 s817_0)) of + SOME ((() , s818_0)) => + (case ((string_drop s817_0 s818_0)) of + s819_0 => + (case ((reg_name_matches_prefix s819_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s820_0)) => + (case ((string_drop s819_0 s820_0)) of + s821_0 => + (case ((sep_matches_prefix s821_0)) of + SOME ((() , s822_0)) => + (case ((string_drop s821_0 s822_0)) of + s823_0 => + (case ((hex_bits_20_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s823_0 : (( 20 words$word # ii)) option)) of + SOME ((imm, s824_0)) => + let p0_ = (string_drop s823_0 s824_0) in + if (((p0_ = ""))) then SOME (op, rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((assembly_backwards:string ->(regstate)sail2_state_monad$sequential_state ->(((ast),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) arg_= + (let s825_0 = arg_ in + if ((case ((s813_ s825_0 : ((uop # 5 words$word # 20 words$word))option)) of + SOME ((op, rd, imm)) => T + | _ => F + )) then (case (s813_ s825_0 : (( uop # 5 words$word # 20 words$word)) option) of + (SOME ((op, rd, imm))) => + sail2_state_monad$returnS (UTYPE (imm, rd, op)) + ) + else if ((case ((s826_ s825_0 : (( 5 words$word # 21 words$word))option)) of + SOME ((rd, imm)) => T + | _ => F + )) then (case (s826_ s825_0 : (( 5 words$word # 21 words$word)) option) of + (SOME ((rd, imm))) => + sail2_state_monad$returnS (RISCV_JAL (imm, rd)) + ) + else if ((case ((s838_ s825_0 : (( 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((rd, rs1, imm)) => T + | _ => F + )) then (case (s838_ s825_0 : (( 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((rd, rs1, imm))) => + sail2_state_monad$returnS (RISCV_JALR (imm, rs1, rd)) + ) + else if ((case ((s854_ s825_0 : ((bop # 5 words$word # 5 words$word # 13 words$word))option)) of + SOME ((op, rs1, rs2, imm)) => T + | _ => F + )) then (case + (s854_ s825_0 : (( bop # 5 words$word # 5 words$word # 13 words$word)) option) of + (SOME ((op, rs1, rs2, imm))) => + sail2_state_monad$returnS (BTYPE (imm, rs2, rs1, op)) + ) + else if ((case ((s871_ s825_0 : ((iop # 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((op, rd, rs1, imm)) => T + | _ => F + )) then (case + (s871_ s825_0 : (( iop # 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((op, rd, rs1, imm))) => + sail2_state_monad$returnS (ITYPE (imm, rs1, rd, op)) + ) + else if ((case ((s888_ s825_0 : ((sop # 5 words$word # 5 words$word # 6 words$word))option)) of + SOME ((op, rd, rs1, shamt)) => T + | _ => F + )) then (case + (s888_ s825_0 : (( sop # 5 words$word # 5 words$word # 6 words$word)) option) of + (SOME ((op, rd, rs1, shamt))) => + sail2_state_monad$returnS (SHIFTIOP (shamt, rs1, rd, op)) + ) + else if ((case ((s905_ s825_0 : ((rop # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s905_ s825_0 : (( rop # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, rs2))) => + sail2_state_monad$returnS (RTYPE (rs2, rs1, rd, op)) + ) + else if ((case ((s922_ s825_0 + : ((word_width # bool # bool # bool # 5 words$word # 12 words$word # 5 words$word))option)) of + SOME ((size1, is_unsigned, aq, rl, rd, imm, rs1)) => T + | _ => F + )) then (case + (s922_ s825_0 + : (( word_width # bool # bool # bool # 5 words$word # 12 words$word # 5 words$word)) option) of + (SOME ((size1, is_unsigned, aq, rl, rd, imm, rs1))) => + sail2_state_monad$returnS (LOAD (imm, rs1, rd, is_unsigned, size1, aq, rl)) + ) + else if ((case ((s952_ s825_0 + : ((word_width # bool # bool # 5 words$word # 12 words$word # 5 words$word))option)) of + SOME ((size1, aq, rl, rs2, imm, rs1)) => T + | _ => F + )) then (case + (s952_ s825_0 : (( word_width # bool # bool # 5 words$word # 12 words$word # 5 words$word)) option) of + (SOME ((size1, aq, rl, rs2, imm, rs1))) => + sail2_state_monad$returnS (STORE (imm, rs2, rs1, size1, aq, rl)) + ) + else if ((case ((s980_ s825_0 : (( 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((rd, rs1, imm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s980_ s825_0 : (( 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((rd, rs1, imm))) => + sail2_state_monad$returnS (ADDIW (imm, rs1, rd)) + ) + else if ((case ((s996_ s825_0 : ((sop # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, shamt)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s996_ s825_0 : (( sop # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, shamt))) => + sail2_state_monad$returnS (SHIFTW (shamt, rs1, rd, op)) + ) + else if ((case ((s1013_ s825_0 : ((ropw # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1013_ s825_0 : (( ropw # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, rs2))) => + sail2_state_monad$returnS (RTYPEW (rs2, rs1, rd, op)) + ) + else if ((case ((s1030_ s825_0 : ((sopw # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, shamt)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1030_ s825_0 : (( sopw # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, shamt))) => + sail2_state_monad$returnS (SHIFTIWOP (shamt, rs1, rd, op)) + ) + else if ((case ((s1047_ s825_0 : (( 4 words$word # 4 words$word))option)) of + SOME ((pred, succ)) => T + | _ => F + )) then (case (s1047_ s825_0 : (( 4 words$word # 4 words$word)) option) of + (SOME ((pred, succ))) => + sail2_state_monad$returnS (FENCE (pred, succ)) + ) + else if ((case ((s1059_ s825_0 : (( 4 words$word # 4 words$word))option)) of + SOME ((pred, succ)) => T + | _ => F + )) then (case (s1059_ s825_0 : (( 4 words$word # 4 words$word)) option) of + (SOME ((pred, succ))) => + sail2_state_monad$returnS (FENCE_TSO (pred, succ)) + ) + else if (((s825_0 = "fence.i"))) then sail2_state_monad$returnS (FENCEI () ) + else if (((s825_0 = "ecall"))) then sail2_state_monad$returnS (ECALL () ) + else if (((s825_0 = "mret"))) then sail2_state_monad$returnS (MRET () ) + else if (((s825_0 = "sret"))) then sail2_state_monad$returnS (SRET () ) + else if (((s825_0 = "ebreak"))) then sail2_state_monad$returnS (EBREAK () ) + else if (((s825_0 = "wfi"))) then sail2_state_monad$returnS (WFI () ) + else if ((case ((s1071_ s825_0 : (( 5 words$word # 5 words$word))option)) of + SOME ((rs1, rs2)) => T + | _ => F + )) then (case (s1071_ s825_0 : (( 5 words$word # 5 words$word)) option) of + (SOME ((rs1, rs2))) => + sail2_state_monad$returnS (SFENCE_VMA (rs1, rs2)) + ) + else if ((case ((s1083_ s825_0 : ((word_width # bool # bool # 5 words$word # 5 words$word))option)) of + SOME ((size1, aq, rl, rd, rs1)) => T + | _ => F + )) then (case + (s1083_ s825_0 : (( word_width # bool # bool # 5 words$word # 5 words$word)) option) of + (SOME ((size1, aq, rl, rd, rs1))) => + sail2_state_monad$returnS (LOADRES (aq, rl, rs1, size1, rd)) + ) + else if ((case ((s1101_ s825_0 + : ((word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((size1, aq, rl, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1101_ s825_0 : (( word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((size1, aq, rl, rd, rs1, rs2))) => + sail2_state_monad$returnS (STORECON (aq, rl, rs2, rs1, size1, rd)) + ) + else if ((case ((s1123_ s825_0 + : ((amoop # word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, width, aq, rl, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1123_ s825_0 + : (( amoop # word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, width, aq, rl, rd, rs1, rs2))) => + sail2_state_monad$returnS (AMO (op, aq, rl, rs2, rs1, width, rd)) + ) + else if (((s825_0 = "c.nop"))) then sail2_state_monad$returnS (C_NOP () ) + else if ((case ((s1147_ s825_0 : (( 3 words$word # 8 words$word))option)) of + SOME ((rdc, nzimm)) => (nzimm <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word)) + | _ => F + )) then (case (s1147_ s825_0 : (( 3 words$word # 8 words$word)) option) of + (SOME ((rdc, nzimm))) => + sail2_state_monad$returnS (C_ADDI4SPN (rdc, nzimm)) + ) + else if ((case ((s1159_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rdc, rsc, uimm)) => T + | _ => F + )) then (case (s1159_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rdc, rsc, uimm))) => + sail2_state_monad$returnS (C_LW (uimm, rsc, rdc)) + ) + else if ((case ((s1175_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rdc, rsc, uimm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s1175_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rdc, rsc, uimm))) => + sail2_state_monad$returnS (C_LD (uimm, rsc, rdc)) + ) + else if ((case ((s1191_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rsc1, rsc2, uimm)) => T + | _ => F + )) then (case + (s1191_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rsc1, rsc2, uimm))) => + sail2_state_monad$returnS (C_SW (uimm, rsc1, rsc2)) + ) + else if ((case ((s1207_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rsc1, rsc2, uimm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1207_ s825_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rsc1, rsc2, uimm))) => + sail2_state_monad$returnS (C_SD (uimm, rsc1, rsc2)) + ) + else if ((case ((s1223_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rsd, nzi)) => + ((((nzi <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s1223_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rsd, nzi))) => + sail2_state_monad$returnS (C_ADDI (nzi, rsd)) + ) + else if ((case ((s1235_ s825_0 : ( 11 words$word)option)) of + SOME (imm) => ((( 32 : int):ii) = (( 32 : int):ii)) + | _ => F + )) then (case (s1235_ s825_0 : ( 11 words$word) option) of + (SOME (imm)) => + sail2_state_monad$returnS (C_JAL imm) + ) + else if ((case ((s1243_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rsd, imm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s1243_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rsd, imm))) => + sail2_state_monad$returnS (C_ADDIW (imm, rsd)) + ) + else if ((case ((s1255_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, imm)) => (((regidx_to_regno rd)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s1255_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, imm))) => + sail2_state_monad$returnS (C_LI (imm, rd)) + ) + else if ((case ((s1267_ s825_0 : ( 6 words$word)option)) of + SOME (imm) => (imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s1267_ s825_0 : ( 6 words$word) option) of + (SOME (imm)) => + sail2_state_monad$returnS (C_ADDI16SP imm) + ) + else if ((case ((s1275_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, imm)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ (((imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))))))) + | _ => F + )) then (case (s1275_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, imm))) => + sail2_state_monad$returnS (C_LUI (imm, rd)) + ) + else if ((case ((s1287_ s825_0 : (( 3 words$word # 6 words$word))option)) of + SOME ((rsd, shamt)) => (shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s1287_ s825_0 : (( 3 words$word # 6 words$word)) option) of + (SOME ((rsd, shamt))) => + sail2_state_monad$returnS (C_SRLI (shamt, rsd)) + ) + else if ((case ((s1299_ s825_0 : (( 3 words$word # 6 words$word))option)) of + SOME ((rsd, shamt)) => (shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s1299_ s825_0 : (( 3 words$word # 6 words$word)) option) of + (SOME ((rsd, shamt))) => + sail2_state_monad$returnS (C_SRAI (shamt, rsd)) + ) + else if ((case ((s1311_ s825_0 : (( 3 words$word # 6 words$word))option)) of + SOME ((rsd, imm)) => T + | _ => F + )) then (case (s1311_ s825_0 : (( 3 words$word # 6 words$word)) option) of + (SOME ((rsd, imm))) => + sail2_state_monad$returnS (C_ANDI (imm, rsd)) + ) + else if ((case ((s1323_ s825_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s1323_ s825_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + sail2_state_monad$returnS (C_SUB (rsd, rs2)) + ) + else if ((case ((s1335_ s825_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s1335_ s825_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + sail2_state_monad$returnS (C_XOR (rsd, rs2)) + ) + else if ((case ((s1347_ s825_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s1347_ s825_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + sail2_state_monad$returnS (C_OR (rsd, rs2)) + ) + else if ((case ((s1359_ s825_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s1359_ s825_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + sail2_state_monad$returnS (C_AND (rsd, rs2)) + ) + else if ((case ((s1371_ s825_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s1371_ s825_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + sail2_state_monad$returnS (C_SUBW (rsd, rs2)) + ) + else if ((case ((s1383_ s825_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s1383_ s825_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + sail2_state_monad$returnS (C_ADDW (rsd, rs2)) + ) + else if ((case ((s1395_ s825_0 : ( 11 words$word)option)) of + SOME (imm) => T + | _ => F + )) then (case (s1395_ s825_0 : ( 11 words$word) option) of + (SOME (imm)) => + sail2_state_monad$returnS (C_J imm) + ) + else if ((case ((s1403_ s825_0 : (( 3 words$word # 8 words$word))option)) of + SOME ((rs, imm)) => T + | _ => F + )) then (case (s1403_ s825_0 : (( 3 words$word # 8 words$word)) option) of + (SOME ((rs, imm))) => + sail2_state_monad$returnS (C_BEQZ (imm, rs)) + ) + else if ((case ((s1415_ s825_0 : (( 3 words$word # 8 words$word))option)) of + SOME ((rs, imm)) => T + | _ => F + )) then (case (s1415_ s825_0 : (( 3 words$word # 8 words$word)) option) of + (SOME ((rs, imm))) => + sail2_state_monad$returnS (C_BNEZ (imm, rs)) + ) + else if ((case ((s1427_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rsd, shamt)) => + ((((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s1427_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rsd, shamt))) => + sail2_state_monad$returnS (C_SLLI (shamt, rsd)) + ) + else if ((case ((s1439_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, uimm)) => (((regidx_to_regno rd)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s1439_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, uimm))) => + sail2_state_monad$returnS (C_LWSP (uimm, rd)) + ) + else if ((case ((s1451_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, uimm)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii))))) + | _ => F + )) then (case (s1451_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, uimm))) => + sail2_state_monad$returnS (C_LDSP (uimm, rd)) + ) + else if ((case ((s1463_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, uimm)) => T + | _ => F + )) then (case (s1463_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, uimm))) => + sail2_state_monad$returnS (C_SWSP (uimm, rd)) + ) + else if ((case ((s1475_ s825_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rs2, uimm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s1475_ s825_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rs2, uimm))) => + sail2_state_monad$returnS (C_SDSP (uimm, rs2)) + ) + else if ((case ((s1487_ s825_0 : ( 5 words$word)option)) of + SOME (rs1) => (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s1487_ s825_0 : ( 5 words$word) option) of + (SOME (rs1)) => + sail2_state_monad$returnS (C_JR rs1) + ) + else if ((case ((s1495_ s825_0 : ( 5 words$word)option)) of + SOME (rs1) => (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s1495_ s825_0 : ( 5 words$word) option) of + (SOME (rs1)) => + sail2_state_monad$returnS (C_JALR rs1) + ) + else if ((case ((s1503_ s825_0 : (( 5 words$word # 5 words$word))option)) of + SOME ((rd, rs2)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s1503_ s825_0 : (( 5 words$word # 5 words$word)) option) of + (SOME ((rd, rs2))) => + sail2_state_monad$returnS (C_MV (rd, rs2)) + ) + else if (((s825_0 = "c.ebreak"))) then sail2_state_monad$returnS (C_EBREAK () ) + else if ((case ((s1515_ s825_0 : (( 5 words$word # 5 words$word))option)) of + SOME ((rsd, rs2)) => + ((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s1515_ s825_0 : (( 5 words$word # 5 words$word)) option) of + (SOME ((rsd, rs2))) => + sail2_state_monad$returnS (C_ADD (rsd, rs2)) + ) + else if ((case ((s1527_ s825_0 + : ((bool # bool # bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((high, signed1, signed2, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1527_ s825_0 : (( bool # bool # bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((high, signed1, signed2, rd, rs1, rs2))) => + sail2_state_monad$returnS (MUL (rs2, rs1, rd, high, signed1, signed2)) + ) + else if ((case ((s1544_ s825_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1544_ s825_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + sail2_state_monad$returnS (DIV0 (rs2, rs1, rd, s)) + ) + else if ((case ((s1562_ s825_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1562_ s825_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + sail2_state_monad$returnS (REM (rs2, rs1, rd, s)) + ) + else if ((case ((s1580_ s825_0 : (( 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s1580_ s825_0 : (( 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((rd, rs1, rs2))) => + sail2_state_monad$returnS (MULW (rs2, rs1, rd)) + ) + else if ((case ((s1596_ s825_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1596_ s825_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + sail2_state_monad$returnS (DIVW (rs2, rs1, rd, s)) + ) + else if ((case ((s1615_ s825_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1615_ s825_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + sail2_state_monad$returnS (REMW (rs2, rs1, rd, s)) + ) + else if ((case ((s1634_ s825_0 : ((csrop # 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((op, rd, rs1, csr)) => T + | _ => F + )) then (case + (s1634_ s825_0 : (( csrop # 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((op, rd, rs1, csr))) => + sail2_state_monad$returnS (CSR (csr, rs1, rd, T, op)) + ) + else if ((case ((s1652_ s825_0 : ((csrop # 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((op, rd, rs1, csr)) => T + | _ => F + )) then (case + (s1652_ s825_0 : (( csrop # 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((op, rd, rs1, csr))) => + sail2_state_monad$returnS (CSR (csr, rs1, rd, F, op)) + ) + else if (((s825_0 = "uret"))) then sail2_state_monad$returnS (URET () ) + else if ((case ((s1669_ s825_0 : ( 32 words$word)option)) of SOME (s) => T | _ => F )) + then (case (s1669_ s825_0 : ( 32 words$word) option) of + (SOME (s)) => + sail2_state_monad$returnS (ILLEGAL s) + ) + else if ((case ((s1677_ s825_0 : ( 16 words$word)option)) of SOME (s) => T | _ => F )) + then (case (s1677_ s825_0 : ( 16 words$word) option) of + (SOME (s)) => + sail2_state_monad$returnS (C_ILLEGAL s) + ) + else sail2_state_monad$seqS (sail2_state_monad$assert_expS F "Pattern match failure at unknown location") (sail2_state_monad$exitS () )))`; + + +(*val assembly_forwards_matches : ast -> bool*) + +val _ = Define ` + ((assembly_forwards_matches:ast -> bool) arg_= + ((case arg_ of + UTYPE ((imm, rd, op)) => T + | RISCV_JAL ((imm, rd)) => T + | RISCV_JALR ((imm, rs1, rd)) => T + | BTYPE ((imm, rs2, rs1, op)) => T + | ITYPE ((imm, rs1, rd, op)) => T + | SHIFTIOP ((shamt, rs1, rd, op)) => T + | RTYPE ((rs2, rs1, rd, op)) => T + | LOAD ((imm, rs1, rd, is_unsigned, size1, aq, rl)) => T + | STORE ((imm, rs2, rs1, size1, aq, rl)) => T + | ADDIW ((imm, rs1, rd)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | SHIFTW ((shamt, rs1, rd, op)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | RTYPEW ((rs2, rs1, rd, op)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | SHIFTIWOP ((shamt, rs1, rd, op)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | FENCE ((pred, succ)) => T + | FENCE_TSO ((pred, succ)) => T + | FENCEI (() ) => T + | ECALL (() ) => T + | MRET (() ) => T + | SRET (() ) => T + | EBREAK (() ) => T + | WFI (() ) => T + | SFENCE_VMA ((rs1, rs2)) => T + | LOADRES ((aq, rl, rs1, size1, rd)) => T + | STORECON ((aq, rl, rs2, rs1, size1, rd)) => T + | AMO ((op, aq, rl, rs2, rs1, width, rd)) => T + | C_NOP (() ) => T + | C_ADDI4SPN ((rdc, nzimm)) => + if (((nzimm <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word)))) then + T else F + | C_LW ((uimm, rsc, rdc)) => T + | C_LD ((uimm, rsc, rdc)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | C_SW ((uimm, rsc1, rsc2)) => T + | C_SD ((uimm, rsc1, rsc2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | C_ADDI ((nzi, rsd)) => + if ((((((nzi <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ + (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))))) then + T else F + | C_JAL (imm) => + if ((((( 32 : int): ii) = (( 32 : int): ii)))) then T else F + | C_ADDIW ((imm, rsd)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | C_LI ((imm, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then T else F + | C_ADDI16SP (imm) => + if (((imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) then + T else F + | C_LUI ((imm, rd)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ + ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ + (((imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))))))))) then + T else F + | C_SRLI ((shamt, rsd)) => + if (((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) then + T else F + | C_SRAI ((shamt, rsd)) => + if (((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) then + T else F + | C_ANDI ((imm, rsd)) => T + | C_SUB ((rsd, rs2)) => T + | C_XOR ((rsd, rs2)) => T + | C_OR ((rsd, rs2)) => T + | C_AND ((rsd, rs2)) => T + | C_SUBW ((rsd, rs2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | C_ADDW ((rsd, rs2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | C_J (imm) => T + | C_BEQZ ((imm, rs)) => T + | C_BNEZ ((imm, rs)) => T + | C_SLLI ((shamt, rsd)) => + if ((((((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ + (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))))) then + T else F + | C_LWSP ((uimm, rd)) => + if (((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) then T else F + | C_LDSP ((uimm, rd)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ + ((((( 32 : int): ii) = (( 64 : int): ii))))))) then T else + F + | C_SWSP ((uimm, rd)) => T + | C_SDSP ((uimm, rs2)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | C_JR (rs1) => + if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then T else F + | C_JALR (rs1) => + if (((((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))))) then T else F + | C_MV ((rd, rs2)) => + if ((((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ + (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + T else F + | C_EBREAK (() ) => T + | C_ADD ((rsd, rs2)) => + if ((((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ + (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))))) then + T else F + | MUL ((rs2, rs1, rd, high, signed1, signed2)) => T + | DIV0 ((rs2, rs1, rd, s)) => T + | REM ((rs2, rs1, rd, s)) => T + | MULW ((rs2, rs1, rd)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | DIVW ((rs2, rs1, rd, s)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | REMW ((rs2, rs1, rd, s)) => + if ((((( 32 : int): ii) = (( 64 : int): ii)))) then T else F + | CSR ((csr, rs1, rd, T, op)) => T + | CSR ((csr, rs1, rd, F, op)) => T + | URET (() ) => T + | ILLEGAL (s) => T + | C_ILLEGAL (s) => T + )))`; + + +(*val assembly_backwards_matches : string -> bool*) + +(*val _s2549_ : string -> maybe (mword ty16)*) + +val _ = Define ` + ((s2549_:string ->((16)words$word)option) s2550_0= + (let s2551_0 = s2550_0 in + if ((string_startswith s2551_0 "c.illegal")) then + (case ((string_drop s2551_0 ((string_length "c.illegal")))) of + s2552_0 => + (case ((spc_matches_prefix0 s2552_0)) of + SOME ((() , s2553_0)) => + (case ((string_drop s2552_0 s2553_0)) of + s2554_0 => + (case ((hex_bits_16_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2554_0 : (( 16 words$word # ii)) option)) of + SOME ((s, s2555_0)) => + let p0_ = (string_drop s2554_0 s2555_0) in + if (((p0_ = ""))) then SOME s else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2541_ : string -> maybe (mword ty32)*) + +val _ = Define ` + ((s2541_:string ->((32)words$word)option) s2542_0= + (let s2543_0 = s2542_0 in + if ((string_startswith s2543_0 "illegal")) then + (case ((string_drop s2543_0 ((string_length "illegal")))) of + s2544_0 => + (case ((spc_matches_prefix0 s2544_0)) of + SOME ((() , s2545_0)) => + (case ((string_drop s2544_0 s2545_0)) of + s2546_0 => + (case ((hex_bits_32_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2546_0 : (( 32 words$word # ii)) option)) of + SOME ((s, s2547_0)) => + let p0_ = (string_drop s2546_0 s2547_0) in + if (((p0_ = ""))) then SOME s else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2524_ : string -> maybe ((csrop * mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s2524_:string ->(csrop#(5)words$word#(5)words$word#(12)words$word)option) s2525_0= + ((case s2525_0 of + s2526_0 => + (case ((csr_mnemonic_matches_prefix s2526_0)) of + SOME ((op, s2527_0)) => + (case ((string_drop s2526_0 s2527_0)) of + s2528_0 => + (case ((spc_matches_prefix0 s2528_0)) of + SOME ((() , s2529_0)) => + (case ((string_drop s2528_0 s2529_0)) of + s2530_0 => + (case ((reg_name_matches_prefix s2530_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2531_0)) => + (case ((string_drop s2530_0 s2531_0)) of + s2532_0 => + (case ((sep_matches_prefix s2532_0)) of + SOME ((() , s2533_0)) => + (case ((string_drop s2532_0 s2533_0)) of + s2534_0 => + (case ((reg_name_matches_prefix s2534_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2535_0)) => + (case ((string_drop s2534_0 s2535_0)) of + s2536_0 => + (case ((sep_matches_prefix s2536_0)) of + SOME ((() , s2537_0)) => + (case ((string_drop s2536_0 s2537_0)) of + s2538_0 => + (case ((csr_name_map_matches_prefix s2538_0 + : (( 12 words$word # ii)) option)) of + SOME ((csr, s2539_0)) => + let p0_ = (string_drop s2538_0 s2539_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, csr) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2506_ : string -> maybe ((csrop * mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s2506_:string ->(csrop#(5)words$word#(5)words$word#(12)words$word)option) s2507_0= + ((case s2507_0 of + s2508_0 => + (case ((csr_mnemonic_matches_prefix s2508_0)) of + SOME ((op, s2509_0)) => + let s2510_0 = (string_drop s2508_0 s2509_0) in + if ((string_startswith s2510_0 "i")) then + (case ((string_drop s2510_0 ((string_length "i")))) of + s2511_0 => + (case ((spc_matches_prefix0 s2511_0)) of + SOME ((() , s2512_0)) => + (case ((string_drop s2511_0 s2512_0)) of + s2513_0 => + (case ((reg_name_matches_prefix s2513_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2514_0)) => + (case ((string_drop s2513_0 s2514_0)) of + s2515_0 => + (case ((sep_matches_prefix s2515_0)) of + SOME ((() , s2516_0)) => + (case ((string_drop s2515_0 s2516_0)) of + s2517_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s2517_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2518_0)) => + (case ((string_drop s2517_0 s2518_0)) of + s2519_0 => + (case ((sep_matches_prefix s2519_0)) of + SOME ((() , s2520_0)) => + (case ((string_drop s2519_0 s2520_0)) of + s2521_0 => + (case ((csr_name_map_matches_prefix s2521_0 + : (( 12 words$word # ii)) option)) of + SOME ((csr, s2522_0)) => + let p0_ = (string_drop s2521_0 s2522_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, csr) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +(*val _s2487_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2487_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s2488_0= + (let s2489_0 = s2488_0 in + if ((string_startswith s2489_0 "rem")) then + (case ((string_drop s2489_0 ((string_length "rem")))) of + s2490_0 => + (case ((maybe_not_u_matches_prefix s2490_0)) of + SOME ((s, s2491_0)) => + let s2492_0 = (string_drop s2490_0 s2491_0) in + if ((string_startswith s2492_0 "w")) then + (case ((string_drop s2492_0 ((string_length "w")))) of + s2493_0 => + (case ((spc_matches_prefix0 s2493_0)) of + SOME ((() , s2494_0)) => + (case ((string_drop s2493_0 s2494_0)) of + s2495_0 => + (case ((reg_name_matches_prefix s2495_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2496_0)) => + (case ((string_drop s2495_0 s2496_0)) of + s2497_0 => + (case ((sep_matches_prefix s2497_0)) of + SOME ((() , s2498_0)) => + (case ((string_drop s2497_0 s2498_0)) of + s2499_0 => + (case ((reg_name_matches_prefix s2499_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2500_0)) => + (case ((string_drop s2499_0 s2500_0)) of + s2501_0 => + (case ((sep_matches_prefix s2501_0)) of + SOME ((() , s2502_0)) => + (case ((string_drop s2501_0 s2502_0)) of + s2503_0 => + (case ((reg_name_matches_prefix s2503_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2504_0)) => + let p0_ = (string_drop s2503_0 s2504_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2468_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2468_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s2469_0= + (let s2470_0 = s2469_0 in + if ((string_startswith s2470_0 "div")) then + (case ((string_drop s2470_0 ((string_length "div")))) of + s2471_0 => + (case ((maybe_not_u_matches_prefix s2471_0)) of + SOME ((s, s2472_0)) => + let s2473_0 = (string_drop s2471_0 s2472_0) in + if ((string_startswith s2473_0 "w")) then + (case ((string_drop s2473_0 ((string_length "w")))) of + s2474_0 => + (case ((spc_matches_prefix0 s2474_0)) of + SOME ((() , s2475_0)) => + (case ((string_drop s2474_0 s2475_0)) of + s2476_0 => + (case ((reg_name_matches_prefix s2476_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2477_0)) => + (case ((string_drop s2476_0 s2477_0)) of + s2478_0 => + (case ((sep_matches_prefix s2478_0)) of + SOME ((() , s2479_0)) => + (case ((string_drop s2478_0 s2479_0)) of + s2480_0 => + (case ((reg_name_matches_prefix s2480_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2481_0)) => + (case ((string_drop s2480_0 s2481_0)) of + s2482_0 => + (case ((sep_matches_prefix s2482_0)) of + SOME ((() , s2483_0)) => + (case ((string_drop s2482_0 s2483_0)) of + s2484_0 => + (case ((reg_name_matches_prefix s2484_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2485_0)) => + let p0_ = (string_drop s2484_0 s2485_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2452_ : string -> maybe ((mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2452_:string ->((5)words$word#(5)words$word#(5)words$word)option) s2453_0= + (let s2454_0 = s2453_0 in + if ((string_startswith s2454_0 "mulw")) then + (case ((string_drop s2454_0 ((string_length "mulw")))) of + s2455_0 => + (case ((spc_matches_prefix0 s2455_0)) of + SOME ((() , s2456_0)) => + (case ((string_drop s2455_0 s2456_0)) of + s2457_0 => + (case ((reg_name_matches_prefix s2457_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2458_0)) => + (case ((string_drop s2457_0 s2458_0)) of + s2459_0 => + (case ((sep_matches_prefix s2459_0)) of + SOME ((() , s2460_0)) => + (case ((string_drop s2459_0 s2460_0)) of + s2461_0 => + (case ((reg_name_matches_prefix s2461_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2462_0)) => + (case ((string_drop s2461_0 s2462_0)) of + s2463_0 => + (case ((sep_matches_prefix s2463_0)) of + SOME ((() , s2464_0)) => + (case ((string_drop s2463_0 s2464_0)) of + s2465_0 => + (case ((reg_name_matches_prefix s2465_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2466_0)) => + let p0_ = (string_drop s2465_0 s2466_0) in + if (((p0_ = ""))) then SOME (rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2434_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2434_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s2435_0= + (let s2436_0 = s2435_0 in + if ((string_startswith s2436_0 "rem")) then + (case ((string_drop s2436_0 ((string_length "rem")))) of + s2437_0 => + (case ((maybe_not_u_matches_prefix s2437_0)) of + SOME ((s, s2438_0)) => + (case ((string_drop s2437_0 s2438_0)) of + s2439_0 => + (case ((spc_matches_prefix0 s2439_0)) of + SOME ((() , s2440_0)) => + (case ((string_drop s2439_0 s2440_0)) of + s2441_0 => + (case ((reg_name_matches_prefix s2441_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2442_0)) => + (case ((string_drop s2441_0 s2442_0)) of + s2443_0 => + (case ((sep_matches_prefix s2443_0)) of + SOME ((() , s2444_0)) => + (case ((string_drop s2443_0 s2444_0)) of + s2445_0 => + (case ((reg_name_matches_prefix s2445_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2446_0)) => + (case ((string_drop s2445_0 s2446_0)) of + s2447_0 => + (case ((sep_matches_prefix s2447_0)) of + SOME ((() , s2448_0)) => + (case ((string_drop s2447_0 s2448_0)) of + s2449_0 => + (case ((reg_name_matches_prefix s2449_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2450_0)) => + let p0_ = (string_drop s2449_0 s2450_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2416_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2416_:string ->(bool#(5)words$word#(5)words$word#(5)words$word)option) s2417_0= + (let s2418_0 = s2417_0 in + if ((string_startswith s2418_0 "div")) then + (case ((string_drop s2418_0 ((string_length "div")))) of + s2419_0 => + (case ((maybe_not_u_matches_prefix s2419_0)) of + SOME ((s, s2420_0)) => + (case ((string_drop s2419_0 s2420_0)) of + s2421_0 => + (case ((spc_matches_prefix0 s2421_0)) of + SOME ((() , s2422_0)) => + (case ((string_drop s2421_0 s2422_0)) of + s2423_0 => + (case ((reg_name_matches_prefix s2423_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2424_0)) => + (case ((string_drop s2423_0 s2424_0)) of + s2425_0 => + (case ((sep_matches_prefix s2425_0)) of + SOME ((() , s2426_0)) => + (case ((string_drop s2425_0 s2426_0)) of + s2427_0 => + (case ((reg_name_matches_prefix s2427_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2428_0)) => + (case ((string_drop s2427_0 s2428_0)) of + s2429_0 => + (case ((sep_matches_prefix s2429_0)) of + SOME ((() , s2430_0)) => + (case ((string_drop s2429_0 s2430_0)) of + s2431_0 => + (case ((reg_name_matches_prefix s2431_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2432_0)) => + let p0_ = (string_drop s2431_0 s2432_0) in + if (((p0_ = ""))) then SOME (s, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2399_ : string -> maybe ((bool * bool * bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2399_:string ->(bool#bool#bool#(5)words$word#(5)words$word#(5)words$word)option) s2400_0= + ((case s2400_0 of + s2401_0 => + (case ((mul_mnemonic_matches_prefix s2401_0)) of + SOME (((high, signed1, signed2), s2402_0)) => + (case ((string_drop s2401_0 s2402_0)) of + s2403_0 => + (case ((spc_matches_prefix0 s2403_0)) of + SOME ((() , s2404_0)) => + (case ((string_drop s2403_0 s2404_0)) of + s2405_0 => + (case ((reg_name_matches_prefix s2405_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2406_0)) => + (case ((string_drop s2405_0 s2406_0)) of + s2407_0 => + (case ((sep_matches_prefix s2407_0)) of + SOME ((() , s2408_0)) => + (case ((string_drop s2407_0 s2408_0)) of + s2409_0 => + (case ((reg_name_matches_prefix s2409_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2410_0)) => + (case ((string_drop s2409_0 s2410_0)) of + s2411_0 => + (case ((sep_matches_prefix s2411_0)) of + SOME ((() , s2412_0)) => + (case ((string_drop s2411_0 s2412_0)) of + s2413_0 => + (case ((reg_name_matches_prefix s2413_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2414_0)) => + let p0_ = (string_drop s2413_0 s2414_0) in + if (((p0_ = ""))) then SOME (high, signed1, signed2, rd, rs1, rs2) else + NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2387_ : string -> maybe ((mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2387_:string ->((5)words$word#(5)words$word)option) s2388_0= + (let s2389_0 = s2388_0 in + if ((string_startswith s2389_0 "c.add")) then + (case ((string_drop s2389_0 ((string_length "c.add")))) of + s2390_0 => + (case ((spc_matches_prefix0 s2390_0)) of + SOME ((() , s2391_0)) => + (case ((string_drop s2390_0 s2391_0)) of + s2392_0 => + (case ((reg_name_matches_prefix s2392_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s2393_0)) => + (case ((string_drop s2392_0 s2393_0)) of + s2394_0 => + (case ((sep_matches_prefix s2394_0)) of + SOME ((() , s2395_0)) => + (case ((string_drop s2394_0 s2395_0)) of + s2396_0 => + (case ((reg_name_matches_prefix s2396_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2397_0)) => + let p0_ = (string_drop s2396_0 s2397_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2375_ : string -> maybe ((mword ty5 * mword ty5))*) + +val _ = Define ` + ((s2375_:string ->((5)words$word#(5)words$word)option) s2376_0= + (let s2377_0 = s2376_0 in + if ((string_startswith s2377_0 "c.mv")) then + (case ((string_drop s2377_0 ((string_length "c.mv")))) of + s2378_0 => + (case ((spc_matches_prefix0 s2378_0)) of + SOME ((() , s2379_0)) => + (case ((string_drop s2378_0 s2379_0)) of + s2380_0 => + (case ((reg_name_matches_prefix s2380_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2381_0)) => + (case ((string_drop s2380_0 s2381_0)) of + s2382_0 => + (case ((sep_matches_prefix s2382_0)) of + SOME ((() , s2383_0)) => + (case ((string_drop s2382_0 s2383_0)) of + s2384_0 => + (case ((reg_name_matches_prefix s2384_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2385_0)) => + let p0_ = (string_drop s2384_0 s2385_0) in + if (((p0_ = ""))) then SOME (rd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2367_ : string -> maybe (mword ty5)*) + +val _ = Define ` + ((s2367_:string ->((5)words$word)option) s2368_0= + (let s2369_0 = s2368_0 in + if ((string_startswith s2369_0 "c.jalr")) then + (case ((string_drop s2369_0 ((string_length "c.jalr")))) of + s2370_0 => + (case ((spc_matches_prefix0 s2370_0)) of + SOME ((() , s2371_0)) => + (case ((string_drop s2370_0 s2371_0)) of + s2372_0 => + (case ((reg_name_matches_prefix s2372_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2373_0)) => + let p0_ = (string_drop s2372_0 s2373_0) in + if (((p0_ = ""))) then SOME rs1 else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2359_ : string -> maybe (mword ty5)*) + +val _ = Define ` + ((s2359_:string ->((5)words$word)option) s2360_0= + (let s2361_0 = s2360_0 in + if ((string_startswith s2361_0 "c.jr")) then + (case ((string_drop s2361_0 ((string_length "c.jr")))) of + s2362_0 => + (case ((spc_matches_prefix0 s2362_0)) of + SOME ((() , s2363_0)) => + (case ((string_drop s2362_0 s2363_0)) of + s2364_0 => + (case ((reg_name_matches_prefix s2364_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2365_0)) => + let p0_ = (string_drop s2364_0 s2365_0) in + if (((p0_ = ""))) then SOME rs1 else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2347_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2347_:string ->((5)words$word#(6)words$word)option) s2348_0= + (let s2349_0 = s2348_0 in + if ((string_startswith s2349_0 "c.sdsp")) then + (case ((string_drop s2349_0 ((string_length "c.sdsp")))) of + s2350_0 => + (case ((spc_matches_prefix0 s2350_0)) of + SOME ((() , s2351_0)) => + (case ((string_drop s2350_0 s2351_0)) of + s2352_0 => + (case ((reg_name_matches_prefix s2352_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2353_0)) => + (case ((string_drop s2352_0 s2353_0)) of + s2354_0 => + (case ((sep_matches_prefix s2354_0)) of + SOME ((() , s2355_0)) => + (case ((string_drop s2354_0 s2355_0)) of + s2356_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2356_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s2357_0)) => + let p0_ = (string_drop s2356_0 s2357_0) in + if (((p0_ = ""))) then SOME (rs2, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2335_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2335_:string ->((5)words$word#(6)words$word)option) s2336_0= + (let s2337_0 = s2336_0 in + if ((string_startswith s2337_0 "c.swsp")) then + (case ((string_drop s2337_0 ((string_length "c.swsp")))) of + s2338_0 => + (case ((spc_matches_prefix0 s2338_0)) of + SOME ((() , s2339_0)) => + (case ((string_drop s2338_0 s2339_0)) of + s2340_0 => + (case ((reg_name_matches_prefix s2340_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2341_0)) => + (case ((string_drop s2340_0 s2341_0)) of + s2342_0 => + (case ((sep_matches_prefix s2342_0)) of + SOME ((() , s2343_0)) => + (case ((string_drop s2342_0 s2343_0)) of + s2344_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2344_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s2345_0)) => + let p0_ = (string_drop s2344_0 s2345_0) in + if (((p0_ = ""))) then SOME (rd, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2323_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2323_:string ->((5)words$word#(6)words$word)option) s2324_0= + (let s2325_0 = s2324_0 in + if ((string_startswith s2325_0 "c.ldsp")) then + (case ((string_drop s2325_0 ((string_length "c.ldsp")))) of + s2326_0 => + (case ((spc_matches_prefix0 s2326_0)) of + SOME ((() , s2327_0)) => + (case ((string_drop s2326_0 s2327_0)) of + s2328_0 => + (case ((reg_name_matches_prefix s2328_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2329_0)) => + (case ((string_drop s2328_0 s2329_0)) of + s2330_0 => + (case ((sep_matches_prefix s2330_0)) of + SOME ((() , s2331_0)) => + (case ((string_drop s2330_0 s2331_0)) of + s2332_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2332_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s2333_0)) => + let p0_ = (string_drop s2332_0 s2333_0) in + if (((p0_ = ""))) then SOME (rd, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2311_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2311_:string ->((5)words$word#(6)words$word)option) s2312_0= + (let s2313_0 = s2312_0 in + if ((string_startswith s2313_0 "c.lwsp")) then + (case ((string_drop s2313_0 ((string_length "c.lwsp")))) of + s2314_0 => + (case ((spc_matches_prefix0 s2314_0)) of + SOME ((() , s2315_0)) => + (case ((string_drop s2314_0 s2315_0)) of + s2316_0 => + (case ((reg_name_matches_prefix s2316_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2317_0)) => + (case ((string_drop s2316_0 s2317_0)) of + s2318_0 => + (case ((sep_matches_prefix s2318_0)) of + SOME ((() , s2319_0)) => + (case ((string_drop s2318_0 s2319_0)) of + s2320_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2320_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s2321_0)) => + let p0_ = (string_drop s2320_0 s2321_0) in + if (((p0_ = ""))) then SOME (rd, uimm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2299_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2299_:string ->((5)words$word#(6)words$word)option) s2300_0= + (let s2301_0 = s2300_0 in + if ((string_startswith s2301_0 "c.slli")) then + (case ((string_drop s2301_0 ((string_length "c.slli")))) of + s2302_0 => + (case ((spc_matches_prefix0 s2302_0)) of + SOME ((() , s2303_0)) => + (case ((string_drop s2302_0 s2303_0)) of + s2304_0 => + (case ((reg_name_matches_prefix s2304_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s2305_0)) => + (case ((string_drop s2304_0 s2305_0)) of + s2306_0 => + (case ((sep_matches_prefix s2306_0)) of + SOME ((() , s2307_0)) => + (case ((string_drop s2306_0 s2307_0)) of + s2308_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2308_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s2309_0)) => + let p0_ = (string_drop s2308_0 s2309_0) in + if (((p0_ = ""))) then SOME (rsd, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2287_ : string -> maybe ((mword ty3 * mword ty8))*) + +val _ = Define ` + ((s2287_:string ->((3)words$word#(8)words$word)option) s2288_0= + (let s2289_0 = s2288_0 in + if ((string_startswith s2289_0 "c.bnez")) then + (case ((string_drop s2289_0 ((string_length "c.bnez")))) of + s2290_0 => + (case ((spc_matches_prefix0 s2290_0)) of + SOME ((() , s2291_0)) => + (case ((string_drop s2290_0 s2291_0)) of + s2292_0 => + (case ((creg_name_matches_prefix s2292_0 : (( 3 words$word # ii)) option)) of + SOME ((rs, s2293_0)) => + (case ((string_drop s2292_0 s2293_0)) of + s2294_0 => + (case ((sep_matches_prefix s2294_0)) of + SOME ((() , s2295_0)) => + (case ((string_drop s2294_0 s2295_0)) of + s2296_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2296_0 : (( 8 words$word # ii)) option)) of + SOME ((imm, s2297_0)) => + let p0_ = (string_drop s2296_0 s2297_0) in + if (((p0_ = ""))) then SOME (rs, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2275_ : string -> maybe ((mword ty3 * mword ty8))*) + +val _ = Define ` + ((s2275_:string ->((3)words$word#(8)words$word)option) s2276_0= + (let s2277_0 = s2276_0 in + if ((string_startswith s2277_0 "c.beqz")) then + (case ((string_drop s2277_0 ((string_length "c.beqz")))) of + s2278_0 => + (case ((spc_matches_prefix0 s2278_0)) of + SOME ((() , s2279_0)) => + (case ((string_drop s2278_0 s2279_0)) of + s2280_0 => + (case ((creg_name_matches_prefix s2280_0 : (( 3 words$word # ii)) option)) of + SOME ((rs, s2281_0)) => + (case ((string_drop s2280_0 s2281_0)) of + s2282_0 => + (case ((sep_matches_prefix s2282_0)) of + SOME ((() , s2283_0)) => + (case ((string_drop s2282_0 s2283_0)) of + s2284_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2284_0 : (( 8 words$word # ii)) option)) of + SOME ((imm, s2285_0)) => + let p0_ = (string_drop s2284_0 s2285_0) in + if (((p0_ = ""))) then SOME (rs, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2267_ : string -> maybe (mword ty11)*) + +val _ = Define ` + ((s2267_:string ->((11)words$word)option) s2268_0= + (let s2269_0 = s2268_0 in + if ((string_startswith s2269_0 "c.j")) then + (case ((string_drop s2269_0 ((string_length "c.j")))) of + s2270_0 => + (case ((spc_matches_prefix0 s2270_0)) of + SOME ((() , s2271_0)) => + (case ((string_drop s2270_0 s2271_0)) of + s2272_0 => + (case ((hex_bits_11_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2272_0 : (( 11 words$word # ii)) option)) of + SOME ((imm, s2273_0)) => + let p0_ = (string_drop s2272_0 s2273_0) in + if (((p0_ = ""))) then SOME imm else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2255_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s2255_:string ->((3)words$word#(3)words$word)option) s2256_0= + (let s2257_0 = s2256_0 in + if ((string_startswith s2257_0 "c.addw")) then + (case ((string_drop s2257_0 ((string_length "c.addw")))) of + s2258_0 => + (case ((spc_matches_prefix0 s2258_0)) of + SOME ((() , s2259_0)) => + (case ((string_drop s2258_0 s2259_0)) of + s2260_0 => + (case ((creg_name_matches_prefix s2260_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2261_0)) => + (case ((string_drop s2260_0 s2261_0)) of + s2262_0 => + (case ((sep_matches_prefix s2262_0)) of + SOME ((() , s2263_0)) => + (case ((string_drop s2262_0 s2263_0)) of + s2264_0 => + (case ((creg_name_matches_prefix s2264_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s2265_0)) => + let p0_ = (string_drop s2264_0 s2265_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2243_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s2243_:string ->((3)words$word#(3)words$word)option) s2244_0= + (let s2245_0 = s2244_0 in + if ((string_startswith s2245_0 "c.subw")) then + (case ((string_drop s2245_0 ((string_length "c.subw")))) of + s2246_0 => + (case ((spc_matches_prefix0 s2246_0)) of + SOME ((() , s2247_0)) => + (case ((string_drop s2246_0 s2247_0)) of + s2248_0 => + (case ((creg_name_matches_prefix s2248_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2249_0)) => + (case ((string_drop s2248_0 s2249_0)) of + s2250_0 => + (case ((sep_matches_prefix s2250_0)) of + SOME ((() , s2251_0)) => + (case ((string_drop s2250_0 s2251_0)) of + s2252_0 => + (case ((creg_name_matches_prefix s2252_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s2253_0)) => + let p0_ = (string_drop s2252_0 s2253_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2231_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s2231_:string ->((3)words$word#(3)words$word)option) s2232_0= + (let s2233_0 = s2232_0 in + if ((string_startswith s2233_0 "c.and")) then + (case ((string_drop s2233_0 ((string_length "c.and")))) of + s2234_0 => + (case ((spc_matches_prefix0 s2234_0)) of + SOME ((() , s2235_0)) => + (case ((string_drop s2234_0 s2235_0)) of + s2236_0 => + (case ((creg_name_matches_prefix s2236_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2237_0)) => + (case ((string_drop s2236_0 s2237_0)) of + s2238_0 => + (case ((sep_matches_prefix s2238_0)) of + SOME ((() , s2239_0)) => + (case ((string_drop s2238_0 s2239_0)) of + s2240_0 => + (case ((creg_name_matches_prefix s2240_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s2241_0)) => + let p0_ = (string_drop s2240_0 s2241_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2219_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s2219_:string ->((3)words$word#(3)words$word)option) s2220_0= + (let s2221_0 = s2220_0 in + if ((string_startswith s2221_0 "c.or")) then + (case ((string_drop s2221_0 ((string_length "c.or")))) of + s2222_0 => + (case ((spc_matches_prefix0 s2222_0)) of + SOME ((() , s2223_0)) => + (case ((string_drop s2222_0 s2223_0)) of + s2224_0 => + (case ((creg_name_matches_prefix s2224_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2225_0)) => + (case ((string_drop s2224_0 s2225_0)) of + s2226_0 => + (case ((sep_matches_prefix s2226_0)) of + SOME ((() , s2227_0)) => + (case ((string_drop s2226_0 s2227_0)) of + s2228_0 => + (case ((creg_name_matches_prefix s2228_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s2229_0)) => + let p0_ = (string_drop s2228_0 s2229_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2207_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s2207_:string ->((3)words$word#(3)words$word)option) s2208_0= + (let s2209_0 = s2208_0 in + if ((string_startswith s2209_0 "c.xor")) then + (case ((string_drop s2209_0 ((string_length "c.xor")))) of + s2210_0 => + (case ((spc_matches_prefix0 s2210_0)) of + SOME ((() , s2211_0)) => + (case ((string_drop s2210_0 s2211_0)) of + s2212_0 => + (case ((creg_name_matches_prefix s2212_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2213_0)) => + (case ((string_drop s2212_0 s2213_0)) of + s2214_0 => + (case ((sep_matches_prefix s2214_0)) of + SOME ((() , s2215_0)) => + (case ((string_drop s2214_0 s2215_0)) of + s2216_0 => + (case ((creg_name_matches_prefix s2216_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s2217_0)) => + let p0_ = (string_drop s2216_0 s2217_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2195_ : string -> maybe ((mword ty3 * mword ty3))*) + +val _ = Define ` + ((s2195_:string ->((3)words$word#(3)words$word)option) s2196_0= + (let s2197_0 = s2196_0 in + if ((string_startswith s2197_0 "c.sub")) then + (case ((string_drop s2197_0 ((string_length "c.sub")))) of + s2198_0 => + (case ((spc_matches_prefix0 s2198_0)) of + SOME ((() , s2199_0)) => + (case ((string_drop s2198_0 s2199_0)) of + s2200_0 => + (case ((creg_name_matches_prefix s2200_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2201_0)) => + (case ((string_drop s2200_0 s2201_0)) of + s2202_0 => + (case ((sep_matches_prefix s2202_0)) of + SOME ((() , s2203_0)) => + (case ((string_drop s2202_0 s2203_0)) of + s2204_0 => + (case ((creg_name_matches_prefix s2204_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s2205_0)) => + let p0_ = (string_drop s2204_0 s2205_0) in + if (((p0_ = ""))) then SOME (rsd, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2183_ : string -> maybe ((mword ty3 * mword ty6))*) + +val _ = Define ` + ((s2183_:string ->((3)words$word#(6)words$word)option) s2184_0= + (let s2185_0 = s2184_0 in + if ((string_startswith s2185_0 "c.andi")) then + (case ((string_drop s2185_0 ((string_length "c.andi")))) of + s2186_0 => + (case ((spc_matches_prefix0 s2186_0)) of + SOME ((() , s2187_0)) => + (case ((string_drop s2186_0 s2187_0)) of + s2188_0 => + (case ((creg_name_matches_prefix s2188_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2189_0)) => + (case ((string_drop s2188_0 s2189_0)) of + s2190_0 => + (case ((sep_matches_prefix s2190_0)) of + SOME ((() , s2191_0)) => + (case ((string_drop s2190_0 s2191_0)) of + s2192_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2192_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s2193_0)) => + let p0_ = (string_drop s2192_0 s2193_0) in + if (((p0_ = ""))) then SOME (rsd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2171_ : string -> maybe ((mword ty3 * mword ty6))*) + +val _ = Define ` + ((s2171_:string ->((3)words$word#(6)words$word)option) s2172_0= + (let s2173_0 = s2172_0 in + if ((string_startswith s2173_0 "c.srai")) then + (case ((string_drop s2173_0 ((string_length "c.srai")))) of + s2174_0 => + (case ((spc_matches_prefix0 s2174_0)) of + SOME ((() , s2175_0)) => + (case ((string_drop s2174_0 s2175_0)) of + s2176_0 => + (case ((creg_name_matches_prefix s2176_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2177_0)) => + (case ((string_drop s2176_0 s2177_0)) of + s2178_0 => + (case ((sep_matches_prefix s2178_0)) of + SOME ((() , s2179_0)) => + (case ((string_drop s2178_0 s2179_0)) of + s2180_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2180_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s2181_0)) => + let p0_ = (string_drop s2180_0 s2181_0) in + if (((p0_ = ""))) then SOME (rsd, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2159_ : string -> maybe ((mword ty3 * mword ty6))*) + +val _ = Define ` + ((s2159_:string ->((3)words$word#(6)words$word)option) s2160_0= + (let s2161_0 = s2160_0 in + if ((string_startswith s2161_0 "c.srli")) then + (case ((string_drop s2161_0 ((string_length "c.srli")))) of + s2162_0 => + (case ((spc_matches_prefix0 s2162_0)) of + SOME ((() , s2163_0)) => + (case ((string_drop s2162_0 s2163_0)) of + s2164_0 => + (case ((creg_name_matches_prefix s2164_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s2165_0)) => + (case ((string_drop s2164_0 s2165_0)) of + s2166_0 => + (case ((sep_matches_prefix s2166_0)) of + SOME ((() , s2167_0)) => + (case ((string_drop s2166_0 s2167_0)) of + s2168_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2168_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s2169_0)) => + let p0_ = (string_drop s2168_0 s2169_0) in + if (((p0_ = ""))) then SOME (rsd, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2147_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2147_:string ->((5)words$word#(6)words$word)option) s2148_0= + (let s2149_0 = s2148_0 in + if ((string_startswith s2149_0 "c.lui")) then + (case ((string_drop s2149_0 ((string_length "c.lui")))) of + s2150_0 => + (case ((spc_matches_prefix0 s2150_0)) of + SOME ((() , s2151_0)) => + (case ((string_drop s2150_0 s2151_0)) of + s2152_0 => + (case ((reg_name_matches_prefix s2152_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2153_0)) => + (case ((string_drop s2152_0 s2153_0)) of + s2154_0 => + (case ((sep_matches_prefix s2154_0)) of + SOME ((() , s2155_0)) => + (case ((string_drop s2154_0 s2155_0)) of + s2156_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2156_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s2157_0)) => + let p0_ = (string_drop s2156_0 s2157_0) in + if (((p0_ = ""))) then SOME (rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2139_ : string -> maybe (mword ty6)*) + +val _ = Define ` + ((s2139_:string ->((6)words$word)option) s2140_0= + (let s2141_0 = s2140_0 in + if ((string_startswith s2141_0 "c.addi16sp")) then + (case ((string_drop s2141_0 ((string_length "c.addi16sp")))) of + s2142_0 => + (case ((spc_matches_prefix0 s2142_0)) of + SOME ((() , s2143_0)) => + (case ((string_drop s2142_0 s2143_0)) of + s2144_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2144_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s2145_0)) => + let p0_ = (string_drop s2144_0 s2145_0) in + if (((p0_ = ""))) then SOME imm else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2127_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2127_:string ->((5)words$word#(6)words$word)option) s2128_0= + (let s2129_0 = s2128_0 in + if ((string_startswith s2129_0 "c.li")) then + (case ((string_drop s2129_0 ((string_length "c.li")))) of + s2130_0 => + (case ((spc_matches_prefix0 s2130_0)) of + SOME ((() , s2131_0)) => + (case ((string_drop s2130_0 s2131_0)) of + s2132_0 => + (case ((reg_name_matches_prefix s2132_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2133_0)) => + (case ((string_drop s2132_0 s2133_0)) of + s2134_0 => + (case ((sep_matches_prefix s2134_0)) of + SOME ((() , s2135_0)) => + (case ((string_drop s2134_0 s2135_0)) of + s2136_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2136_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s2137_0)) => + let p0_ = (string_drop s2136_0 s2137_0) in + if (((p0_ = ""))) then SOME (rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2115_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2115_:string ->((5)words$word#(6)words$word)option) s2116_0= + (let s2117_0 = s2116_0 in + if ((string_startswith s2117_0 "c.addiw")) then + (case ((string_drop s2117_0 ((string_length "c.addiw")))) of + s2118_0 => + (case ((spc_matches_prefix0 s2118_0)) of + SOME ((() , s2119_0)) => + (case ((string_drop s2118_0 s2119_0)) of + s2120_0 => + (case ((reg_name_matches_prefix s2120_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s2121_0)) => + (case ((string_drop s2120_0 s2121_0)) of + s2122_0 => + (case ((sep_matches_prefix s2122_0)) of + SOME ((() , s2123_0)) => + (case ((string_drop s2122_0 s2123_0)) of + s2124_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2124_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s2125_0)) => + let p0_ = (string_drop s2124_0 s2125_0) in + if (((p0_ = ""))) then SOME (rsd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2107_ : string -> maybe (mword ty11)*) + +val _ = Define ` + ((s2107_:string ->((11)words$word)option) s2108_0= + (let s2109_0 = s2108_0 in + if ((string_startswith s2109_0 "c.jal")) then + (case ((string_drop s2109_0 ((string_length "c.jal")))) of + s2110_0 => + (case ((spc_matches_prefix0 s2110_0)) of + SOME ((() , s2111_0)) => + (case ((string_drop s2110_0 s2111_0)) of + s2112_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2112_0 : (( 12 words$word # ii)) option)) of + SOME ((v__814, s2113_0)) => + if (((((subrange_vec_dec v__814 (( 0 : int): ii) (( 0 : int): ii) : 1 words$word)) + = (vec_of_bits [B0] : 1 words$word)))) then + let (imm : 11 words$word) = ((subrange_vec_dec v__814 (( 11 : int): ii) + (( 1 : int): ii) : 11 words$word)) in + let (imm : 11 words$word) = ((subrange_vec_dec v__814 (( 11 : int): ii) + (( 1 : int): ii) : 11 words$word)) in + let p0_ = (string_drop s2112_0 s2113_0) in + if (((p0_ = ""))) then SOME imm else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2095_ : string -> maybe ((mword ty5 * mword ty6))*) + +val _ = Define ` + ((s2095_:string ->((5)words$word#(6)words$word)option) s2096_0= + (let s2097_0 = s2096_0 in + if ((string_startswith s2097_0 "c.addi")) then + (case ((string_drop s2097_0 ((string_length "c.addi")))) of + s2098_0 => + (case ((spc_matches_prefix0 s2098_0)) of + SOME ((() , s2099_0)) => + (case ((string_drop s2098_0 s2099_0)) of + s2100_0 => + (case ((reg_name_matches_prefix s2100_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s2101_0)) => + (case ((string_drop s2100_0 s2101_0)) of + s2102_0 => + (case ((sep_matches_prefix s2102_0)) of + SOME ((() , s2103_0)) => + (case ((string_drop s2102_0 s2103_0)) of + s2104_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2104_0 : (( 6 words$word # ii)) option)) of + SOME ((nzi, s2105_0)) => + let p0_ = (string_drop s2104_0 s2105_0) in + if (((p0_ = ""))) then SOME (rsd, nzi) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2079_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s2079_:string ->((3)words$word#(3)words$word#(5)words$word)option) s2080_0= + (let s2081_0 = s2080_0 in + if ((string_startswith s2081_0 "c.sd")) then + (case ((string_drop s2081_0 ((string_length "c.sd")))) of + s2082_0 => + (case ((spc_matches_prefix0 s2082_0)) of + SOME ((() , s2083_0)) => + (case ((string_drop s2082_0 s2083_0)) of + s2084_0 => + (case ((creg_name_matches_prefix s2084_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc1, s2085_0)) => + (case ((string_drop s2084_0 s2085_0)) of + s2086_0 => + (case ((sep_matches_prefix s2086_0)) of + SOME ((() , s2087_0)) => + (case ((string_drop s2086_0 s2087_0)) of + s2088_0 => + (case ((creg_name_matches_prefix s2088_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc2, s2089_0)) => + (case ((string_drop s2088_0 s2089_0)) of + s2090_0 => + (case ((sep_matches_prefix s2090_0)) of + SOME ((() , s2091_0)) => + (case ((string_drop s2090_0 s2091_0)) of + s2092_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2092_0 + : (( 8 words$word # ii)) option)) of + SOME ((v__816, s2093_0)) => + if (((((subrange_vec_dec v__816 (( 2 : int): ii) (( 0 : int): ii) : 3 words$word)) + = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__816 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__816 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s2092_0 s2093_0) in + if (((p0_ = ""))) then SOME (rsc1, rsc2, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2063_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s2063_:string ->((3)words$word#(3)words$word#(5)words$word)option) s2064_0= + (let s2065_0 = s2064_0 in + if ((string_startswith s2065_0 "c.sw")) then + (case ((string_drop s2065_0 ((string_length "c.sw")))) of + s2066_0 => + (case ((spc_matches_prefix0 s2066_0)) of + SOME ((() , s2067_0)) => + (case ((string_drop s2066_0 s2067_0)) of + s2068_0 => + (case ((creg_name_matches_prefix s2068_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc1, s2069_0)) => + (case ((string_drop s2068_0 s2069_0)) of + s2070_0 => + (case ((sep_matches_prefix s2070_0)) of + SOME ((() , s2071_0)) => + (case ((string_drop s2070_0 s2071_0)) of + s2072_0 => + (case ((creg_name_matches_prefix s2072_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc2, s2073_0)) => + (case ((string_drop s2072_0 s2073_0)) of + s2074_0 => + (case ((sep_matches_prefix s2074_0)) of + SOME ((() , s2075_0)) => + (case ((string_drop s2074_0 s2075_0)) of + s2076_0 => + (case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2076_0 + : (( 7 words$word # ii)) option)) of + SOME ((v__818, s2077_0)) => + if (((((subrange_vec_dec v__818 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__818 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__818 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s2076_0 s2077_0) in + if (((p0_ = ""))) then SOME (rsc1, rsc2, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2047_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s2047_:string ->((3)words$word#(3)words$word#(5)words$word)option) s2048_0= + (let s2049_0 = s2048_0 in + if ((string_startswith s2049_0 "c.ld")) then + (case ((string_drop s2049_0 ((string_length "c.ld")))) of + s2050_0 => + (case ((spc_matches_prefix0 s2050_0)) of + SOME ((() , s2051_0)) => + (case ((string_drop s2050_0 s2051_0)) of + s2052_0 => + (case ((creg_name_matches_prefix s2052_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s2053_0)) => + (case ((string_drop s2052_0 s2053_0)) of + s2054_0 => + (case ((sep_matches_prefix s2054_0)) of + SOME ((() , s2055_0)) => + (case ((string_drop s2054_0 s2055_0)) of + s2056_0 => + (case ((creg_name_matches_prefix s2056_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc, s2057_0)) => + (case ((string_drop s2056_0 s2057_0)) of + s2058_0 => + (case ((sep_matches_prefix s2058_0)) of + SOME ((() , s2059_0)) => + (case ((string_drop s2058_0 s2059_0)) of + s2060_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2060_0 + : (( 8 words$word # ii)) option)) of + SOME ((v__820, s2061_0)) => + if (((((subrange_vec_dec v__820 (( 2 : int): ii) (( 0 : int): ii) : 3 words$word)) + = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__820 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__820 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s2060_0 s2061_0) in + if (((p0_ = ""))) then SOME (rdc, rsc, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2031_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5))*) + +val _ = Define ` + ((s2031_:string ->((3)words$word#(3)words$word#(5)words$word)option) s2032_0= + (let s2033_0 = s2032_0 in + if ((string_startswith s2033_0 "c.lw")) then + (case ((string_drop s2033_0 ((string_length "c.lw")))) of + s2034_0 => + (case ((spc_matches_prefix0 s2034_0)) of + SOME ((() , s2035_0)) => + (case ((string_drop s2034_0 s2035_0)) of + s2036_0 => + (case ((creg_name_matches_prefix s2036_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s2037_0)) => + (case ((string_drop s2036_0 s2037_0)) of + s2038_0 => + (case ((sep_matches_prefix s2038_0)) of + SOME ((() , s2039_0)) => + (case ((string_drop s2038_0 s2039_0)) of + s2040_0 => + (case ((creg_name_matches_prefix s2040_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc, s2041_0)) => + (case ((string_drop s2040_0 s2041_0)) of + s2042_0 => + (case ((sep_matches_prefix s2042_0)) of + SOME ((() , s2043_0)) => + (case ((string_drop s2042_0 s2043_0)) of + s2044_0 => + (case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2044_0 + : (( 7 words$word # ii)) option)) of + SOME ((v__822, s2045_0)) => + if (((((subrange_vec_dec v__822 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__822 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__822 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let p0_ = (string_drop s2044_0 s2045_0) in + if (((p0_ = ""))) then SOME (rdc, rsc, uimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2019_ : string -> maybe ((mword ty3 * mword ty8))*) + +val _ = Define ` + ((s2019_:string ->((3)words$word#(8)words$word)option) s2020_0= + (let s2021_0 = s2020_0 in + if ((string_startswith s2021_0 "c.addi4spn")) then + (case ((string_drop s2021_0 ((string_length "c.addi4spn")))) of + s2022_0 => + (case ((spc_matches_prefix0 s2022_0)) of + SOME ((() , s2023_0)) => + (case ((string_drop s2022_0 s2023_0)) of + s2024_0 => + (case ((creg_name_matches_prefix s2024_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s2025_0)) => + (case ((string_drop s2024_0 s2025_0)) of + s2026_0 => + (case ((sep_matches_prefix s2026_0)) of + SOME ((() , s2027_0)) => + (case ((string_drop s2026_0 s2027_0)) of + s2028_0 => + (case ((hex_bits_10_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2028_0 : (( 10 words$word # ii)) option)) of + SOME ((v__824, s2029_0)) => + if (((((subrange_vec_dec v__824 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (nzimm : 8 words$word) = + ((subrange_vec_dec v__824 (( 9 : int): ii) (( 2 : int): ii) : 8 words$word)) in + let (nzimm : 8 words$word) = + ((subrange_vec_dec v__824 (( 9 : int): ii) (( 2 : int): ii) : 8 words$word)) in + let p0_ = (string_drop s2028_0 s2029_0) in + if (((p0_ = ""))) then SOME (rdc, nzimm) else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1995_ : string -> maybe ((amoop * word_width * bool * bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1995_:string ->(amoop#word_width#bool#bool#(5)words$word#(5)words$word#(5)words$word)option) s1996_0= + ((case s1996_0 of + s1997_0 => + (case ((amo_mnemonic_matches_prefix s1997_0)) of + SOME ((op, s1998_0)) => + let s1999_0 = (string_drop s1997_0 s1998_0) in + if ((string_startswith s1999_0 ".")) then + (case ((string_drop s1999_0 ((string_length ".")))) of + s2000_0 => + (case ((size_mnemonic_matches_prefix s2000_0)) of + SOME ((width, s2001_0)) => + (case ((string_drop s2000_0 s2001_0)) of + s2002_0 => + (case ((maybe_aq_matches_prefix s2002_0)) of + SOME ((aq, s2003_0)) => + (case ((string_drop s2002_0 s2003_0)) of + s2004_0 => + (case ((maybe_rl_matches_prefix s2004_0)) of + SOME ((rl, s2005_0)) => + (case ((string_drop s2004_0 s2005_0)) of + s2006_0 => + (case ((spc_matches_prefix0 s2006_0)) of + SOME ((() , s2007_0)) => + (case ((string_drop s2006_0 s2007_0)) of + s2008_0 => + (case ((reg_name_matches_prefix s2008_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2009_0)) => + (case ((string_drop s2008_0 s2009_0)) of + s2010_0 => + (case ((sep_matches_prefix s2010_0)) of + SOME ((() , s2011_0)) => + (case ((string_drop s2010_0 s2011_0)) of + s2012_0 => + (case ((reg_name_matches_prefix s2012_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2013_0)) => + (case ((string_drop s2012_0 s2013_0)) of + s2014_0 => + (case ((sep_matches_prefix s2014_0)) of + SOME ((() , s2015_0)) => + (case ((string_drop s2014_0 s2015_0)) of + s2016_0 => + (case ((reg_name_matches_prefix s2016_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2017_0)) => + let p0_ = (string_drop s2016_0 s2017_0) in + if (((p0_ = ""))) then SOME (op, width, aq, rl, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +(*val _s1973_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1973_:string ->(word_width#bool#bool#(5)words$word#(5)words$word#(5)words$word)option) s1974_0= + (let s1975_0 = s1974_0 in + if ((string_startswith s1975_0 "sc.")) then + (case ((string_drop s1975_0 ((string_length "sc.")))) of + s1976_0 => + (case ((size_mnemonic_matches_prefix s1976_0)) of + SOME ((size1, s1977_0)) => + (case ((string_drop s1976_0 s1977_0)) of + s1978_0 => + (case ((maybe_aq_matches_prefix s1978_0)) of + SOME ((aq, s1979_0)) => + (case ((string_drop s1978_0 s1979_0)) of + s1980_0 => + (case ((maybe_rl_matches_prefix s1980_0)) of + SOME ((rl, s1981_0)) => + (case ((string_drop s1980_0 s1981_0)) of + s1982_0 => + (case ((spc_matches_prefix0 s1982_0)) of + SOME ((() , s1983_0)) => + (case ((string_drop s1982_0 s1983_0)) of + s1984_0 => + (case ((reg_name_matches_prefix s1984_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1985_0)) => + (case ((string_drop s1984_0 s1985_0)) of + s1986_0 => + (case ((sep_matches_prefix s1986_0)) of + SOME ((() , s1987_0)) => + (case ((string_drop s1986_0 s1987_0)) of + s1988_0 => + (case ((reg_name_matches_prefix s1988_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1989_0)) => + (case ((string_drop s1988_0 s1989_0)) of + s1990_0 => + (case ((sep_matches_prefix s1990_0)) of + SOME ((() , s1991_0)) => + (case ((string_drop s1990_0 s1991_0)) of + s1992_0 => + (case ((reg_name_matches_prefix s1992_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1993_0)) => + let p0_ = (string_drop s1992_0 s1993_0) in + if (((p0_ = ""))) then SOME (size1, aq, rl, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1955_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1955_:string ->(word_width#bool#bool#(5)words$word#(5)words$word)option) s1956_0= + (let s1957_0 = s1956_0 in + if ((string_startswith s1957_0 "lr.")) then + (case ((string_drop s1957_0 ((string_length "lr.")))) of + s1958_0 => + (case ((size_mnemonic_matches_prefix s1958_0)) of + SOME ((size1, s1959_0)) => + (case ((string_drop s1958_0 s1959_0)) of + s1960_0 => + (case ((maybe_aq_matches_prefix s1960_0)) of + SOME ((aq, s1961_0)) => + (case ((string_drop s1960_0 s1961_0)) of + s1962_0 => + (case ((maybe_rl_matches_prefix s1962_0)) of + SOME ((rl, s1963_0)) => + (case ((string_drop s1962_0 s1963_0)) of + s1964_0 => + (case ((spc_matches_prefix0 s1964_0)) of + SOME ((() , s1965_0)) => + (case ((string_drop s1964_0 s1965_0)) of + s1966_0 => + (case ((reg_name_matches_prefix s1966_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1967_0)) => + (case ((string_drop s1966_0 s1967_0)) of + s1968_0 => + (case ((sep_matches_prefix s1968_0)) of + SOME ((() , s1969_0)) => + (case ((string_drop s1968_0 s1969_0)) of + s1970_0 => + (case ((reg_name_matches_prefix s1970_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1971_0)) => + let p0_ = (string_drop s1970_0 s1971_0) in + if (((p0_ = ""))) then SOME (size1, aq, rl, rd, rs1) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1943_ : string -> maybe ((mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1943_:string ->((5)words$word#(5)words$word)option) s1944_0= + (let s1945_0 = s1944_0 in + if ((string_startswith s1945_0 "sfence.vma")) then + (case ((string_drop s1945_0 ((string_length "sfence.vma")))) of + s1946_0 => + (case ((spc_matches_prefix0 s1946_0)) of + SOME ((() , s1947_0)) => + (case ((string_drop s1946_0 s1947_0)) of + s1948_0 => + (case ((reg_name_matches_prefix s1948_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1949_0)) => + (case ((string_drop s1948_0 s1949_0)) of + s1950_0 => + (case ((sep_matches_prefix s1950_0)) of + SOME ((() , s1951_0)) => + (case ((string_drop s1950_0 s1951_0)) of + s1952_0 => + (case ((reg_name_matches_prefix s1952_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1953_0)) => + let p0_ = (string_drop s1952_0 s1953_0) in + if (((p0_ = ""))) then SOME (rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1931_ : string -> maybe ((mword ty4 * mword ty4))*) + +val _ = Define ` + ((s1931_:string ->((4)words$word#(4)words$word)option) s1932_0= + (let s1933_0 = s1932_0 in + if ((string_startswith s1933_0 "fence.tso")) then + (case ((string_drop s1933_0 ((string_length "fence.tso")))) of + s1934_0 => + (case ((spc_matches_prefix0 s1934_0)) of + SOME ((() , s1935_0)) => + (case ((string_drop s1934_0 s1935_0)) of + s1936_0 => + (case ((fence_bits_matches_prefix s1936_0 : (( 4 words$word # ii)) option)) of + SOME ((pred, s1937_0)) => + (case ((string_drop s1936_0 s1937_0)) of + s1938_0 => + (case ((sep_matches_prefix s1938_0)) of + SOME ((() , s1939_0)) => + (case ((string_drop s1938_0 s1939_0)) of + s1940_0 => + (case ((fence_bits_matches_prefix s1940_0 : (( 4 words$word # ii)) option)) of + SOME ((succ, s1941_0)) => + let p0_ = (string_drop s1940_0 s1941_0) in + if (((p0_ = ""))) then SOME (pred, succ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1919_ : string -> maybe ((mword ty4 * mword ty4))*) + +val _ = Define ` + ((s1919_:string ->((4)words$word#(4)words$word)option) s1920_0= + (let s1921_0 = s1920_0 in + if ((string_startswith s1921_0 "fence")) then + (case ((string_drop s1921_0 ((string_length "fence")))) of + s1922_0 => + (case ((spc_matches_prefix0 s1922_0)) of + SOME ((() , s1923_0)) => + (case ((string_drop s1922_0 s1923_0)) of + s1924_0 => + (case ((fence_bits_matches_prefix s1924_0 : (( 4 words$word # ii)) option)) of + SOME ((pred, s1925_0)) => + (case ((string_drop s1924_0 s1925_0)) of + s1926_0 => + (case ((sep_matches_prefix s1926_0)) of + SOME ((() , s1927_0)) => + (case ((string_drop s1926_0 s1927_0)) of + s1928_0 => + (case ((fence_bits_matches_prefix s1928_0 : (( 4 words$word # ii)) option)) of + SOME ((succ, s1929_0)) => + let p0_ = (string_drop s1928_0 s1929_0) in + if (((p0_ = ""))) then SOME (pred, succ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1902_ : string -> maybe ((sopw * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1902_:string ->(sopw#(5)words$word#(5)words$word#(5)words$word)option) s1903_0= + ((case s1903_0 of + s1904_0 => + (case ((shiftiwop_mnemonic_matches_prefix s1904_0)) of + SOME ((op, s1905_0)) => + (case ((string_drop s1904_0 s1905_0)) of + s1906_0 => + (case ((spc_matches_prefix0 s1906_0)) of + SOME ((() , s1907_0)) => + (case ((string_drop s1906_0 s1907_0)) of + s1908_0 => + (case ((reg_name_matches_prefix s1908_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1909_0)) => + (case ((string_drop s1908_0 s1909_0)) of + s1910_0 => + (case ((sep_matches_prefix s1910_0)) of + SOME ((() , s1911_0)) => + (case ((string_drop s1910_0 s1911_0)) of + s1912_0 => + (case ((reg_name_matches_prefix s1912_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1913_0)) => + (case ((string_drop s1912_0 s1913_0)) of + s1914_0 => + (case ((sep_matches_prefix s1914_0)) of + SOME ((() , s1915_0)) => + (case ((string_drop s1914_0 s1915_0)) of + s1916_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1916_0 : (( 5 words$word # ii)) option)) of + SOME ((shamt, s1917_0)) => + let p0_ = (string_drop s1916_0 s1917_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1885_ : string -> maybe ((ropw * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1885_:string ->(ropw#(5)words$word#(5)words$word#(5)words$word)option) s1886_0= + ((case s1886_0 of + s1887_0 => + (case ((rtypew_mnemonic_matches_prefix s1887_0)) of + SOME ((op, s1888_0)) => + (case ((string_drop s1887_0 s1888_0)) of + s1889_0 => + (case ((spc_matches_prefix0 s1889_0)) of + SOME ((() , s1890_0)) => + (case ((string_drop s1889_0 s1890_0)) of + s1891_0 => + (case ((reg_name_matches_prefix s1891_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1892_0)) => + (case ((string_drop s1891_0 s1892_0)) of + s1893_0 => + (case ((sep_matches_prefix s1893_0)) of + SOME ((() , s1894_0)) => + (case ((string_drop s1893_0 s1894_0)) of + s1895_0 => + (case ((reg_name_matches_prefix s1895_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1896_0)) => + (case ((string_drop s1895_0 s1896_0)) of + s1897_0 => + (case ((sep_matches_prefix s1897_0)) of + SOME ((() , s1898_0)) => + (case ((string_drop s1897_0 s1898_0)) of + s1899_0 => + (case ((reg_name_matches_prefix s1899_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1900_0)) => + let p0_ = (string_drop s1899_0 s1900_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1868_ : string -> maybe ((sop * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1868_:string ->(sop#(5)words$word#(5)words$word#(5)words$word)option) s1869_0= + ((case s1869_0 of + s1870_0 => + (case ((shiftw_mnemonic_matches_prefix s1870_0)) of + SOME ((op, s1871_0)) => + (case ((string_drop s1870_0 s1871_0)) of + s1872_0 => + (case ((spc_matches_prefix0 s1872_0)) of + SOME ((() , s1873_0)) => + (case ((string_drop s1872_0 s1873_0)) of + s1874_0 => + (case ((reg_name_matches_prefix s1874_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1875_0)) => + (case ((string_drop s1874_0 s1875_0)) of + s1876_0 => + (case ((sep_matches_prefix s1876_0)) of + SOME ((() , s1877_0)) => + (case ((string_drop s1876_0 s1877_0)) of + s1878_0 => + (case ((reg_name_matches_prefix s1878_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1879_0)) => + (case ((string_drop s1878_0 s1879_0)) of + s1880_0 => + (case ((sep_matches_prefix s1880_0)) of + SOME ((() , s1881_0)) => + (case ((string_drop s1880_0 s1881_0)) of + s1882_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1882_0 : (( 5 words$word # ii)) option)) of + SOME ((shamt, s1883_0)) => + let p0_ = (string_drop s1882_0 s1883_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1852_ : string -> maybe ((mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s1852_:string ->((5)words$word#(5)words$word#(12)words$word)option) s1853_0= + (let s1854_0 = s1853_0 in + if ((string_startswith s1854_0 "addiw")) then + (case ((string_drop s1854_0 ((string_length "addiw")))) of + s1855_0 => + (case ((spc_matches_prefix0 s1855_0)) of + SOME ((() , s1856_0)) => + (case ((string_drop s1855_0 s1856_0)) of + s1857_0 => + (case ((reg_name_matches_prefix s1857_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1858_0)) => + (case ((string_drop s1857_0 s1858_0)) of + s1859_0 => + (case ((sep_matches_prefix s1859_0)) of + SOME ((() , s1860_0)) => + (case ((string_drop s1859_0 s1860_0)) of + s1861_0 => + (case ((reg_name_matches_prefix s1861_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1862_0)) => + (case ((string_drop s1861_0 s1862_0)) of + s1863_0 => + (case ((sep_matches_prefix s1863_0)) of + SOME ((() , s1864_0)) => + (case ((string_drop s1863_0 s1864_0)) of + s1865_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1865_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s1866_0)) => + let p0_ = (string_drop s1865_0 s1866_0) in + if (((p0_ = ""))) then SOME (rd, rs1, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1824_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty12 * mword ty5))*) + +val _ = Define ` + ((s1824_:string ->(word_width#bool#bool#(5)words$word#(12)words$word#(5)words$word)option) s1825_0= + (let s1826_0 = s1825_0 in + if ((string_startswith s1826_0 "s")) then + (case ((string_drop s1826_0 ((string_length "s")))) of + s1827_0 => + (case ((size_mnemonic_matches_prefix s1827_0)) of + SOME ((size1, s1828_0)) => + (case ((string_drop s1827_0 s1828_0)) of + s1829_0 => + (case ((maybe_aq_matches_prefix s1829_0)) of + SOME ((aq, s1830_0)) => + (case ((string_drop s1829_0 s1830_0)) of + s1831_0 => + (case ((maybe_rl_matches_prefix s1831_0)) of + SOME ((rl, s1832_0)) => + (case ((string_drop s1831_0 s1832_0)) of + s1833_0 => + (case ((spc_matches_prefix0 s1833_0)) of + SOME ((() , s1834_0)) => + (case ((string_drop s1833_0 s1834_0)) of + s1835_0 => + (case ((reg_name_matches_prefix s1835_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1836_0)) => + (case ((string_drop s1835_0 s1836_0)) of + s1837_0 => + (case ((sep_matches_prefix s1837_0)) of + SOME ((() , s1838_0)) => + (case ((string_drop s1837_0 s1838_0)) of + s1839_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1839_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s1840_0)) => + (case ((string_drop s1839_0 s1840_0)) of + s1841_0 => + (case ((opt_spc_matches_prefix0 s1841_0)) of + SOME ((() , s1842_0)) => + let s1843_0 = (string_drop s1841_0 s1842_0) in + if ((string_startswith s1843_0 "(")) then + (case ((string_drop s1843_0 ((string_length "(")))) of + s1844_0 => + (case ((opt_spc_matches_prefix0 s1844_0)) of + SOME ((() , s1845_0)) => + (case ((string_drop s1844_0 s1845_0)) of + s1846_0 => + (case ((reg_name_matches_prefix s1846_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1847_0)) => + (case ((string_drop s1846_0 s1847_0)) of + s1848_0 => + (case ((opt_spc_matches_prefix0 s1848_0)) of + SOME ((() , s1849_0)) => + let s1850_0 = (string_drop s1848_0 s1849_0) in + if ((string_startswith s1850_0 ")")) then + let p0_ = (string_drop s1850_0 ((string_length ")"))) in + if (((p0_ = ""))) then SOME (size1, aq, rl, rs2, imm, rs1) else NONE + else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1794_ : string -> maybe ((word_width * bool * bool * bool * mword ty5 * mword ty12 * mword ty5))*) + +val _ = Define ` + ((s1794_:string ->(word_width#bool#bool#bool#(5)words$word#(12)words$word#(5)words$word)option) s1795_0= + (let s1796_0 = s1795_0 in + if ((string_startswith s1796_0 "l")) then + (case ((string_drop s1796_0 ((string_length "l")))) of + s1797_0 => + (case ((size_mnemonic_matches_prefix s1797_0)) of + SOME ((size1, s1798_0)) => + (case ((string_drop s1797_0 s1798_0)) of + s1799_0 => + (case ((maybe_u_matches_prefix s1799_0)) of + SOME ((is_unsigned, s1800_0)) => + (case ((string_drop s1799_0 s1800_0)) of + s1801_0 => + (case ((maybe_aq_matches_prefix s1801_0)) of + SOME ((aq, s1802_0)) => + (case ((string_drop s1801_0 s1802_0)) of + s1803_0 => + (case ((maybe_rl_matches_prefix s1803_0)) of + SOME ((rl, s1804_0)) => + (case ((string_drop s1803_0 s1804_0)) of + s1805_0 => + (case ((spc_matches_prefix0 s1805_0)) of + SOME ((() , s1806_0)) => + (case ((string_drop s1805_0 s1806_0)) of + s1807_0 => + (case ((reg_name_matches_prefix s1807_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1808_0)) => + (case ((string_drop s1807_0 s1808_0)) of + s1809_0 => + (case ((sep_matches_prefix s1809_0)) of + SOME ((() , s1810_0)) => + (case ((string_drop s1809_0 s1810_0)) of + s1811_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1811_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s1812_0)) => + (case ((string_drop s1811_0 s1812_0)) of + s1813_0 => + (case ((opt_spc_matches_prefix0 s1813_0)) of + SOME ((() , s1814_0)) => + let s1815_0 = (string_drop s1813_0 s1814_0) in + if ((string_startswith s1815_0 "(")) then + (case ((string_drop s1815_0 ((string_length "(")))) of + s1816_0 => + (case ((opt_spc_matches_prefix0 s1816_0)) of + SOME ((() , s1817_0)) => + (case ((string_drop s1816_0 s1817_0)) of + s1818_0 => + (case ((reg_name_matches_prefix s1818_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1819_0)) => + (case ((string_drop s1818_0 s1819_0)) of + s1820_0 => + (case ((opt_spc_matches_prefix0 s1820_0)) of + SOME ((() , s1821_0)) => + let s1822_0 = (string_drop s1820_0 s1821_0) in + if ((string_startswith s1822_0 ")")) then + let p0_ = (string_drop s1822_0 ((string_length ")"))) in + if (((p0_ = ""))) then SOME (size1, is_unsigned, aq, rl, rd, imm, rs1) + else NONE else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1777_ : string -> maybe ((rop * mword ty5 * mword ty5 * mword ty5))*) + +val _ = Define ` + ((s1777_:string ->(rop#(5)words$word#(5)words$word#(5)words$word)option) s1778_0= + ((case s1778_0 of + s1779_0 => + (case ((rtype_mnemonic_matches_prefix s1779_0)) of + SOME ((op, s1780_0)) => + (case ((string_drop s1779_0 s1780_0)) of + s1781_0 => + (case ((spc_matches_prefix0 s1781_0)) of + SOME ((() , s1782_0)) => + (case ((string_drop s1781_0 s1782_0)) of + s1783_0 => + (case ((reg_name_matches_prefix s1783_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1784_0)) => + (case ((string_drop s1783_0 s1784_0)) of + s1785_0 => + (case ((sep_matches_prefix s1785_0)) of + SOME ((() , s1786_0)) => + (case ((string_drop s1785_0 s1786_0)) of + s1787_0 => + (case ((reg_name_matches_prefix s1787_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1788_0)) => + (case ((string_drop s1787_0 s1788_0)) of + s1789_0 => + (case ((sep_matches_prefix s1789_0)) of + SOME ((() , s1790_0)) => + (case ((string_drop s1789_0 s1790_0)) of + s1791_0 => + (case ((reg_name_matches_prefix s1791_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1792_0)) => + let p0_ = (string_drop s1791_0 s1792_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, rs2) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1760_ : string -> maybe ((sop * mword ty5 * mword ty5 * mword ty6))*) + +val _ = Define ` + ((s1760_:string ->(sop#(5)words$word#(5)words$word#(6)words$word)option) s1761_0= + ((case s1761_0 of + s1762_0 => + (case ((shiftiop_mnemonic_matches_prefix s1762_0)) of + SOME ((op, s1763_0)) => + (case ((string_drop s1762_0 s1763_0)) of + s1764_0 => + (case ((spc_matches_prefix0 s1764_0)) of + SOME ((() , s1765_0)) => + (case ((string_drop s1764_0 s1765_0)) of + s1766_0 => + (case ((reg_name_matches_prefix s1766_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1767_0)) => + (case ((string_drop s1766_0 s1767_0)) of + s1768_0 => + (case ((sep_matches_prefix s1768_0)) of + SOME ((() , s1769_0)) => + (case ((string_drop s1768_0 s1769_0)) of + s1770_0 => + (case ((reg_name_matches_prefix s1770_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1771_0)) => + (case ((string_drop s1770_0 s1771_0)) of + s1772_0 => + (case ((sep_matches_prefix s1772_0)) of + SOME ((() , s1773_0)) => + (case ((string_drop s1772_0 s1773_0)) of + s1774_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1774_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s1775_0)) => + let p0_ = (string_drop s1774_0 s1775_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, shamt) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1743_ : string -> maybe ((iop * mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s1743_:string ->(iop#(5)words$word#(5)words$word#(12)words$word)option) s1744_0= + ((case s1744_0 of + s1745_0 => + (case ((itype_mnemonic_matches_prefix s1745_0)) of + SOME ((op, s1746_0)) => + (case ((string_drop s1745_0 s1746_0)) of + s1747_0 => + (case ((spc_matches_prefix0 s1747_0)) of + SOME ((() , s1748_0)) => + (case ((string_drop s1747_0 s1748_0)) of + s1749_0 => + (case ((reg_name_matches_prefix s1749_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1750_0)) => + (case ((string_drop s1749_0 s1750_0)) of + s1751_0 => + (case ((sep_matches_prefix s1751_0)) of + SOME ((() , s1752_0)) => + (case ((string_drop s1751_0 s1752_0)) of + s1753_0 => + (case ((reg_name_matches_prefix s1753_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1754_0)) => + (case ((string_drop s1753_0 s1754_0)) of + s1755_0 => + (case ((sep_matches_prefix s1755_0)) of + SOME ((() , s1756_0)) => + (case ((string_drop s1755_0 s1756_0)) of + s1757_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1757_0 : (( 12 words$word # ii)) option)) of + SOME ((imm, s1758_0)) => + let p0_ = (string_drop s1757_0 s1758_0) in + if (((p0_ = ""))) then SOME (op, rd, rs1, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1726_ : string -> maybe ((bop * mword ty5 * mword ty5 * mword ty13))*) + +val _ = Define ` + ((s1726_:string ->(bop#(5)words$word#(5)words$word#(13)words$word)option) s1727_0= + ((case s1727_0 of + s1728_0 => + (case ((btype_mnemonic_matches_prefix s1728_0)) of + SOME ((op, s1729_0)) => + (case ((string_drop s1728_0 s1729_0)) of + s1730_0 => + (case ((spc_matches_prefix0 s1730_0)) of + SOME ((() , s1731_0)) => + (case ((string_drop s1730_0 s1731_0)) of + s1732_0 => + (case ((reg_name_matches_prefix s1732_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1733_0)) => + (case ((string_drop s1732_0 s1733_0)) of + s1734_0 => + (case ((sep_matches_prefix s1734_0)) of + SOME ((() , s1735_0)) => + (case ((string_drop s1734_0 s1735_0)) of + s1736_0 => + (case ((reg_name_matches_prefix s1736_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s1737_0)) => + (case ((string_drop s1736_0 s1737_0)) of + s1738_0 => + (case ((sep_matches_prefix s1738_0)) of + SOME ((() , s1739_0)) => + (case ((string_drop s1738_0 s1739_0)) of + s1740_0 => + (case ((hex_bits_13_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1740_0 : (( 13 words$word # ii)) option)) of + SOME ((imm, s1741_0)) => + let p0_ = (string_drop s1740_0 s1741_0) in + if (((p0_ = ""))) then SOME (op, rs1, rs2, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s1710_ : string -> maybe ((mword ty5 * mword ty5 * mword ty12))*) + +val _ = Define ` + ((s1710_:string ->((5)words$word#(5)words$word#(12)words$word)option) s1711_0= + (let s1712_0 = s1711_0 in + if ((string_startswith s1712_0 "jalr")) then + (case ((string_drop s1712_0 ((string_length "jalr")))) of + s1713_0 => + (case ((spc_matches_prefix0 s1713_0)) of + SOME ((() , s1714_0)) => + (case ((string_drop s1713_0 s1714_0)) of + s1715_0 => + (case ((reg_name_matches_prefix s1715_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1716_0)) => + (case ((string_drop s1715_0 s1716_0)) of + s1717_0 => + (case ((sep_matches_prefix s1717_0)) of + SOME ((() , s1718_0)) => + (case ((string_drop s1717_0 s1718_0)) of + s1719_0 => + (case ((reg_name_matches_prefix s1719_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s1720_0)) => + (case ((string_drop s1719_0 s1720_0)) of + s1721_0 => + (case ((sep_matches_prefix s1721_0)) of + SOME ((() , s1722_0)) => + (case ((string_drop s1721_0 s1722_0)) of + s1723_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1723_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s1724_0)) => + let p0_ = (string_drop s1723_0 s1724_0) in + if (((p0_ = ""))) then SOME (rd, rs1, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1698_ : string -> maybe ((mword ty5 * mword ty21))*) + +val _ = Define ` + ((s1698_:string ->((5)words$word#(21)words$word)option) s1699_0= + (let s1700_0 = s1699_0 in + if ((string_startswith s1700_0 "jal")) then + (case ((string_drop s1700_0 ((string_length "jal")))) of + s1701_0 => + (case ((spc_matches_prefix0 s1701_0)) of + SOME ((() , s1702_0)) => + (case ((string_drop s1701_0 s1702_0)) of + s1703_0 => + (case ((reg_name_matches_prefix s1703_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1704_0)) => + (case ((string_drop s1703_0 s1704_0)) of + s1705_0 => + (case ((sep_matches_prefix s1705_0)) of + SOME ((() , s1706_0)) => + (case ((string_drop s1705_0 s1706_0)) of + s1707_0 => + (case ((hex_bits_21_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s1707_0 : (( 21 words$word # ii)) option)) of + SOME ((imm, s1708_0)) => + let p0_ = (string_drop s1707_0 s1708_0) in + if (((p0_ = ""))) then SOME (rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s1685_ : string -> maybe ((uop * mword ty5 * mword ty20))*) + +val _ = Define ` + ((s1685_:string ->(uop#(5)words$word#(20)words$word)option) s1686_0= + ((case s1686_0 of + s1687_0 => + (case ((utype_mnemonic_matches_prefix s1687_0)) of + SOME ((op, s1688_0)) => + (case ((string_drop s1687_0 s1688_0)) of + s1689_0 => + (case ((spc_matches_prefix0 s1689_0)) of + SOME ((() , s1690_0)) => + (case ((string_drop s1689_0 s1690_0)) of + s1691_0 => + (case ((reg_name_matches_prefix s1691_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s1692_0)) => + (case ((string_drop s1691_0 s1692_0)) of + s1693_0 => + (case ((sep_matches_prefix s1693_0)) of + SOME ((() , s1694_0)) => + (case ((string_drop s1693_0 s1694_0)) of + s1695_0 => + (case ((hex_bits_20_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s1695_0 : (( 20 words$word # ii)) option)) of + SOME ((imm, s1696_0)) => + let p0_ = (string_drop s1695_0 s1696_0) in + if (((p0_ = ""))) then SOME (op, rd, imm) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((assembly_backwards_matches:string -> bool) arg_= + (let s1697_0 = arg_ in + if ((case ((s1685_ s1697_0 : ((uop # 5 words$word # 20 words$word))option)) of + SOME ((op, rd, imm)) => T + | _ => F + )) then (case (s1685_ s1697_0 : (( uop # 5 words$word # 20 words$word)) option) of + (SOME ((op, rd, imm))) => + T + ) + else if ((case ((s1698_ s1697_0 : (( 5 words$word # 21 words$word))option)) of + SOME ((rd, imm)) => T + | _ => F + )) then (case (s1698_ s1697_0 : (( 5 words$word # 21 words$word)) option) of + (SOME ((rd, imm))) => + T + ) + else if ((case ((s1710_ s1697_0 : (( 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((rd, rs1, imm)) => T + | _ => F + )) then (case (s1710_ s1697_0 : (( 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((rd, rs1, imm))) => + T + ) + else if ((case ((s1726_ s1697_0 : ((bop # 5 words$word # 5 words$word # 13 words$word))option)) of + SOME ((op, rs1, rs2, imm)) => T + | _ => F + )) then (case + (s1726_ s1697_0 : (( bop # 5 words$word # 5 words$word # 13 words$word)) option) of + (SOME ((op, rs1, rs2, imm))) => + T + ) + else if ((case ((s1743_ s1697_0 : ((iop # 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((op, rd, rs1, imm)) => T + | _ => F + )) then (case + (s1743_ s1697_0 : (( iop # 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((op, rd, rs1, imm))) => + T + ) + else if ((case ((s1760_ s1697_0 : ((sop # 5 words$word # 5 words$word # 6 words$word))option)) of + SOME ((op, rd, rs1, shamt)) => T + | _ => F + )) then (case + (s1760_ s1697_0 : (( sop # 5 words$word # 5 words$word # 6 words$word)) option) of + (SOME ((op, rd, rs1, shamt))) => + T + ) + else if ((case ((s1777_ s1697_0 : ((rop # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1777_ s1697_0 : (( rop # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, rs2))) => + T + ) + else if ((case ((s1794_ s1697_0 + : ((word_width # bool # bool # bool # 5 words$word # 12 words$word # 5 words$word))option)) of + SOME ((size1, is_unsigned, aq, rl, rd, imm, rs1)) => T + | _ => F + )) then (case + (s1794_ s1697_0 + : (( word_width # bool # bool # bool # 5 words$word # 12 words$word # 5 words$word)) option) of + (SOME ((size1, is_unsigned, aq, rl, rd, imm, rs1))) => + T + ) + else if ((case ((s1824_ s1697_0 + : ((word_width # bool # bool # 5 words$word # 12 words$word # 5 words$word))option)) of + SOME ((size1, aq, rl, rs2, imm, rs1)) => T + | _ => F + )) then (case + (s1824_ s1697_0 : (( word_width # bool # bool # 5 words$word # 12 words$word # 5 words$word)) option) of + (SOME ((size1, aq, rl, rs2, imm, rs1))) => + T + ) + else if ((case ((s1852_ s1697_0 : (( 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((rd, rs1, imm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s1852_ s1697_0 : (( 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((rd, rs1, imm))) => + T + ) + else if ((case ((s1868_ s1697_0 : ((sop # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, shamt)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1868_ s1697_0 : (( sop # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, shamt))) => + T + ) + else if ((case ((s1885_ s1697_0 : ((ropw # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1885_ s1697_0 : (( ropw # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, rs2))) => + T + ) + else if ((case ((s1902_ s1697_0 : ((sopw # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, rd, rs1, shamt)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s1902_ s1697_0 : (( sopw # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, rd, rs1, shamt))) => + T + ) + else if ((case ((s1919_ s1697_0 : (( 4 words$word # 4 words$word))option)) of + SOME ((pred, succ)) => T + | _ => F + )) then (case (s1919_ s1697_0 : (( 4 words$word # 4 words$word)) option) of + (SOME ((pred, succ))) => + T + ) + else if ((case ((s1931_ s1697_0 : (( 4 words$word # 4 words$word))option)) of + SOME ((pred, succ)) => T + | _ => F + )) then (case (s1931_ s1697_0 : (( 4 words$word # 4 words$word)) option) of + (SOME ((pred, succ))) => + T + ) + else if (((s1697_0 = "fence.i"))) then T + else if (((s1697_0 = "ecall"))) then T + else if (((s1697_0 = "mret"))) then T + else if (((s1697_0 = "sret"))) then T + else if (((s1697_0 = "ebreak"))) then T + else if (((s1697_0 = "wfi"))) then T + else if ((case ((s1943_ s1697_0 : (( 5 words$word # 5 words$word))option)) of + SOME ((rs1, rs2)) => T + | _ => F + )) then (case (s1943_ s1697_0 : (( 5 words$word # 5 words$word)) option) of + (SOME ((rs1, rs2))) => + T + ) + else if ((case ((s1955_ s1697_0 : ((word_width # bool # bool # 5 words$word # 5 words$word))option)) of + SOME ((size1, aq, rl, rd, rs1)) => T + | _ => F + )) then (case + (s1955_ s1697_0 : (( word_width # bool # bool # 5 words$word # 5 words$word)) option) of + (SOME ((size1, aq, rl, rd, rs1))) => + T + ) + else if ((case ((s1973_ s1697_0 + : ((word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((size1, aq, rl, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1973_ s1697_0 : (( word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((size1, aq, rl, rd, rs1, rs2))) => + T + ) + else if ((case ((s1995_ s1697_0 + : ((amoop # word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((op, width, aq, rl, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s1995_ s1697_0 + : (( amoop # word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((op, width, aq, rl, rd, rs1, rs2))) => + T + ) + else if (((s1697_0 = "c.nop"))) then T + else if ((case ((s2019_ s1697_0 : (( 3 words$word # 8 words$word))option)) of + SOME ((rdc, nzimm)) => (nzimm <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word)) + | _ => F + )) then (case (s2019_ s1697_0 : (( 3 words$word # 8 words$word)) option) of + (SOME ((rdc, nzimm))) => + T + ) + else if ((case ((s2031_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rdc, rsc, uimm)) => T + | _ => F + )) then (case + (s2031_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rdc, rsc, uimm))) => + T + ) + else if ((case ((s2047_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rdc, rsc, uimm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2047_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rdc, rsc, uimm))) => + T + ) + else if ((case ((s2063_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rsc1, rsc2, uimm)) => T + | _ => F + )) then (case + (s2063_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rsc1, rsc2, uimm))) => + T + ) + else if ((case ((s2079_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word))option)) of + SOME ((rsc1, rsc2, uimm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2079_ s1697_0 : (( 3 words$word # 3 words$word # 5 words$word)) option) of + (SOME ((rsc1, rsc2, uimm))) => + T + ) + else if ((case ((s2095_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rsd, nzi)) => + ((((nzi <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s2095_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rsd, nzi))) => + T + ) + else if ((case ((s2107_ s1697_0 : ( 11 words$word)option)) of + SOME (imm) => ((( 32 : int):ii) = (( 32 : int):ii)) + | _ => F + )) then (case (s2107_ s1697_0 : ( 11 words$word) option) of (SOME (imm)) => T ) + else if ((case ((s2115_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rsd, imm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s2115_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rsd, imm))) => + T + ) + else if ((case ((s2127_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, imm)) => (((regidx_to_regno rd)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s2127_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, imm))) => + T + ) + else if ((case ((s2139_ s1697_0 : ( 6 words$word)option)) of + SOME (imm) => (imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s2139_ s1697_0 : ( 6 words$word) option) of (SOME (imm)) => T ) + else if ((case ((s2147_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, imm)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ (((imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))))))) + | _ => F + )) then (case (s2147_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, imm))) => + T + ) + else if ((case ((s2159_ s1697_0 : (( 3 words$word # 6 words$word))option)) of + SOME ((rsd, shamt)) => (shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s2159_ s1697_0 : (( 3 words$word # 6 words$word)) option) of + (SOME ((rsd, shamt))) => + T + ) + else if ((case ((s2171_ s1697_0 : (( 3 words$word # 6 words$word))option)) of + SOME ((rsd, shamt)) => (shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s2171_ s1697_0 : (( 3 words$word # 6 words$word)) option) of + (SOME ((rsd, shamt))) => + T + ) + else if ((case ((s2183_ s1697_0 : (( 3 words$word # 6 words$word))option)) of + SOME ((rsd, imm)) => T + | _ => F + )) then (case (s2183_ s1697_0 : (( 3 words$word # 6 words$word)) option) of + (SOME ((rsd, imm))) => + T + ) + else if ((case ((s2195_ s1697_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s2195_ s1697_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + T + ) + else if ((case ((s2207_ s1697_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s2207_ s1697_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + T + ) + else if ((case ((s2219_ s1697_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s2219_ s1697_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + T + ) + else if ((case ((s2231_ s1697_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => T + | _ => F + )) then (case (s2231_ s1697_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + T + ) + else if ((case ((s2243_ s1697_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s2243_ s1697_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + T + ) + else if ((case ((s2255_ s1697_0 : (( 3 words$word # 3 words$word))option)) of + SOME ((rsd, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s2255_ s1697_0 : (( 3 words$word # 3 words$word)) option) of + (SOME ((rsd, rs2))) => + T + ) + else if ((case ((s2267_ s1697_0 : ( 11 words$word)option)) of + SOME (imm) => T + | _ => F + )) then (case (s2267_ s1697_0 : ( 11 words$word) option) of (SOME (imm)) => T ) + else if ((case ((s2275_ s1697_0 : (( 3 words$word # 8 words$word))option)) of + SOME ((rs, imm)) => T + | _ => F + )) then (case (s2275_ s1697_0 : (( 3 words$word # 8 words$word)) option) of + (SOME ((rs, imm))) => + T + ) + else if ((case ((s2287_ s1697_0 : (( 3 words$word # 8 words$word))option)) of + SOME ((rs, imm)) => T + | _ => F + )) then (case (s2287_ s1697_0 : (( 3 words$word # 8 words$word)) option) of + (SOME ((rs, imm))) => + T + ) + else if ((case ((s2299_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rsd, shamt)) => + ((((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s2299_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rsd, shamt))) => + T + ) + else if ((case ((s2311_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, uimm)) => (((regidx_to_regno rd)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s2311_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, uimm))) => + T + ) + else if ((case ((s2323_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, uimm)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii))))) + | _ => F + )) then (case (s2323_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, uimm))) => + T + ) + else if ((case ((s2335_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rd, uimm)) => T + | _ => F + )) then (case (s2335_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rd, uimm))) => + T + ) + else if ((case ((s2347_ s1697_0 : (( 5 words$word # 6 words$word))option)) of + SOME ((rs2, uimm)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s2347_ s1697_0 : (( 5 words$word # 6 words$word)) option) of + (SOME ((rs2, uimm))) => + T + ) + else if ((case ((s2359_ s1697_0 : ( 5 words$word)option)) of + SOME (rs1) => (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s2359_ s1697_0 : ( 5 words$word) option) of (SOME (rs1)) => T ) + else if ((case ((s2367_ s1697_0 : ( 5 words$word)option)) of + SOME (rs1) => (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s2367_ s1697_0 : ( 5 words$word) option) of (SOME (rs1)) => T ) + else if ((case ((s2375_ s1697_0 : (( 5 words$word # 5 words$word))option)) of + SOME ((rd, rs2)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s2375_ s1697_0 : (( 5 words$word # 5 words$word)) option) of + (SOME ((rd, rs2))) => + T + ) + else if (((s1697_0 = "c.ebreak"))) then T + else if ((case ((s2387_ s1697_0 : (( 5 words$word # 5 words$word))option)) of + SOME ((rsd, rs2)) => + ((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s2387_ s1697_0 : (( 5 words$word # 5 words$word)) option) of + (SOME ((rsd, rs2))) => + T + ) + else if ((case ((s2399_ s1697_0 + : ((bool # bool # bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((high, signed1, signed2, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s2399_ s1697_0 : (( bool # bool # bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((high, signed1, signed2, rd, rs1, rs2))) => + T + ) + else if ((case ((s2416_ s1697_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s2416_ s1697_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + T + ) + else if ((case ((s2434_ s1697_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => T + | _ => F + )) then (case + (s2434_ s1697_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + T + ) + else if ((case ((s2452_ s1697_0 : (( 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s2452_ s1697_0 : (( 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((rd, rs1, rs2))) => + T + ) + else if ((case ((s2468_ s1697_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2468_ s1697_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + T + ) + else if ((case ((s2487_ s1697_0 : ((bool # 5 words$word # 5 words$word # 5 words$word))option)) of + SOME ((s, rd, rs1, rs2)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2487_ s1697_0 : (( bool # 5 words$word # 5 words$word # 5 words$word)) option) of + (SOME ((s, rd, rs1, rs2))) => + T + ) + else if ((case ((s2506_ s1697_0 : ((csrop # 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((op, rd, rs1, csr)) => T + | _ => F + )) then (case + (s2506_ s1697_0 : (( csrop # 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((op, rd, rs1, csr))) => + T + ) + else if ((case ((s2524_ s1697_0 : ((csrop # 5 words$word # 5 words$word # 12 words$word))option)) of + SOME ((op, rd, rs1, csr)) => T + | _ => F + )) then (case + (s2524_ s1697_0 : (( csrop # 5 words$word # 5 words$word # 12 words$word)) option) of + (SOME ((op, rd, rs1, csr))) => + T + ) + else if (((s1697_0 = "uret"))) then T + else if ((case ((s2541_ s1697_0 : ( 32 words$word)option)) of SOME (s) => T | _ => F )) + then (case (s2541_ s1697_0 : ( 32 words$word) option) of (SOME (s)) => T ) + else if ((case ((s2549_ s1697_0 : ( 16 words$word)option)) of SOME (s) => T | _ => F )) + then (case (s2549_ s1697_0 : ( 16 words$word) option) of (SOME (s)) => T ) + else F))`; + + +(*val assembly_matches_prefix : string -> maybe ((ast * ii))*) + +(*val _s3457_ : string -> maybe ((mword ty16 * string))*) + +val _ = Define ` + ((s3457_:string ->((16)words$word#string)option) s3458_0= + (let s3459_0 = s3458_0 in + if ((string_startswith s3459_0 "c.illegal")) then + (case ((string_drop s3459_0 ((string_length "c.illegal")))) of + s3460_0 => + (case ((spc_matches_prefix0 s3460_0)) of + SOME ((() , s3461_0)) => + (case ((string_drop s3460_0 s3461_0)) of + s3462_0 => + (case ((hex_bits_16_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3462_0 : (( 16 words$word # ii)) option)) of + SOME ((s, s3463_0)) => + (case ((string_drop s3462_0 s3463_0)) of s_ => SOME (s, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3449_ : string -> maybe ((mword ty32 * string))*) + +val _ = Define ` + ((s3449_:string ->((32)words$word#string)option) s3450_0= + (let s3451_0 = s3450_0 in + if ((string_startswith s3451_0 "illegal")) then + (case ((string_drop s3451_0 ((string_length "illegal")))) of + s3452_0 => + (case ((spc_matches_prefix0 s3452_0)) of + SOME ((() , s3453_0)) => + (case ((string_drop s3452_0 s3453_0)) of + s3454_0 => + (case ((hex_bits_32_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3454_0 : (( 32 words$word # ii)) option)) of + SOME ((s, s3455_0)) => + (case ((string_drop s3454_0 s3455_0)) of s_ => SOME (s, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3445_ : string -> maybe string*) + +val _ = Define ` + ((s3445_:string ->(string)option) s3446_0= + (let s3447_0 = s3446_0 in + if ((string_startswith s3447_0 "uret")) then + (case ((string_drop s3447_0 ((string_length "uret")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s3428_ : string -> maybe ((csrop * mword ty5 * mword ty5 * mword ty12 * string))*) + +val _ = Define ` + ((s3428_:string ->(csrop#(5)words$word#(5)words$word#(12)words$word#string)option) s3429_0= + ((case s3429_0 of + s3430_0 => + (case ((csr_mnemonic_matches_prefix s3430_0)) of + SOME ((op, s3431_0)) => + (case ((string_drop s3430_0 s3431_0)) of + s3432_0 => + (case ((spc_matches_prefix0 s3432_0)) of + SOME ((() , s3433_0)) => + (case ((string_drop s3432_0 s3433_0)) of + s3434_0 => + (case ((reg_name_matches_prefix s3434_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3435_0)) => + (case ((string_drop s3434_0 s3435_0)) of + s3436_0 => + (case ((sep_matches_prefix s3436_0)) of + SOME ((() , s3437_0)) => + (case ((string_drop s3436_0 s3437_0)) of + s3438_0 => + (case ((reg_name_matches_prefix s3438_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3439_0)) => + (case ((string_drop s3438_0 s3439_0)) of + s3440_0 => + (case ((sep_matches_prefix s3440_0)) of + SOME ((() , s3441_0)) => + (case ((string_drop s3440_0 s3441_0)) of + s3442_0 => + (case ((csr_name_map_matches_prefix s3442_0 + : (( 12 words$word # ii)) option)) of + SOME ((csr, s3443_0)) => + (case ((string_drop s3442_0 s3443_0)) of + s_ => SOME (op, rd, rs1, csr, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s3410_ : string -> maybe ((csrop * mword ty5 * mword ty5 * mword ty12 * string))*) + +val _ = Define ` + ((s3410_:string ->(csrop#(5)words$word#(5)words$word#(12)words$word#string)option) s3411_0= + ((case s3411_0 of + s3412_0 => + (case ((csr_mnemonic_matches_prefix s3412_0)) of + SOME ((op, s3413_0)) => + let s3414_0 = (string_drop s3412_0 s3413_0) in + if ((string_startswith s3414_0 "i")) then + (case ((string_drop s3414_0 ((string_length "i")))) of + s3415_0 => + (case ((spc_matches_prefix0 s3415_0)) of + SOME ((() , s3416_0)) => + (case ((string_drop s3415_0 s3416_0)) of + s3417_0 => + (case ((reg_name_matches_prefix s3417_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3418_0)) => + (case ((string_drop s3417_0 s3418_0)) of + s3419_0 => + (case ((sep_matches_prefix s3419_0)) of + SOME ((() , s3420_0)) => + (case ((string_drop s3419_0 s3420_0)) of + s3421_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s3421_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3422_0)) => + (case ((string_drop s3421_0 s3422_0)) of + s3423_0 => + (case ((sep_matches_prefix s3423_0)) of + SOME ((() , s3424_0)) => + (case ((string_drop s3423_0 s3424_0)) of + s3425_0 => + (case ((csr_name_map_matches_prefix s3425_0 + : (( 12 words$word # ii)) option)) of + SOME ((csr, s3426_0)) => + (case ((string_drop s3425_0 s3426_0)) of + s_ => SOME (op, rd, rs1, csr, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +(*val _s3391_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3391_:string ->(bool#(5)words$word#(5)words$word#(5)words$word#string)option) s3392_0= + (let s3393_0 = s3392_0 in + if ((string_startswith s3393_0 "rem")) then + (case ((string_drop s3393_0 ((string_length "rem")))) of + s3394_0 => + (case ((maybe_not_u_matches_prefix s3394_0)) of + SOME ((s, s3395_0)) => + let s3396_0 = (string_drop s3394_0 s3395_0) in + if ((string_startswith s3396_0 "w")) then + (case ((string_drop s3396_0 ((string_length "w")))) of + s3397_0 => + (case ((spc_matches_prefix0 s3397_0)) of + SOME ((() , s3398_0)) => + (case ((string_drop s3397_0 s3398_0)) of + s3399_0 => + (case ((reg_name_matches_prefix s3399_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3400_0)) => + (case ((string_drop s3399_0 s3400_0)) of + s3401_0 => + (case ((sep_matches_prefix s3401_0)) of + SOME ((() , s3402_0)) => + (case ((string_drop s3401_0 s3402_0)) of + s3403_0 => + (case ((reg_name_matches_prefix s3403_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3404_0)) => + (case ((string_drop s3403_0 s3404_0)) of + s3405_0 => + (case ((sep_matches_prefix s3405_0)) of + SOME ((() , s3406_0)) => + (case ((string_drop s3405_0 s3406_0)) of + s3407_0 => + (case ((reg_name_matches_prefix s3407_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3408_0)) => + (case ((string_drop s3407_0 s3408_0)) of + s_ => SOME (s, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3372_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3372_:string ->(bool#(5)words$word#(5)words$word#(5)words$word#string)option) s3373_0= + (let s3374_0 = s3373_0 in + if ((string_startswith s3374_0 "div")) then + (case ((string_drop s3374_0 ((string_length "div")))) of + s3375_0 => + (case ((maybe_not_u_matches_prefix s3375_0)) of + SOME ((s, s3376_0)) => + let s3377_0 = (string_drop s3375_0 s3376_0) in + if ((string_startswith s3377_0 "w")) then + (case ((string_drop s3377_0 ((string_length "w")))) of + s3378_0 => + (case ((spc_matches_prefix0 s3378_0)) of + SOME ((() , s3379_0)) => + (case ((string_drop s3378_0 s3379_0)) of + s3380_0 => + (case ((reg_name_matches_prefix s3380_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3381_0)) => + (case ((string_drop s3380_0 s3381_0)) of + s3382_0 => + (case ((sep_matches_prefix s3382_0)) of + SOME ((() , s3383_0)) => + (case ((string_drop s3382_0 s3383_0)) of + s3384_0 => + (case ((reg_name_matches_prefix s3384_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3385_0)) => + (case ((string_drop s3384_0 s3385_0)) of + s3386_0 => + (case ((sep_matches_prefix s3386_0)) of + SOME ((() , s3387_0)) => + (case ((string_drop s3386_0 s3387_0)) of + s3388_0 => + (case ((reg_name_matches_prefix s3388_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3389_0)) => + (case ((string_drop s3388_0 s3389_0)) of + s_ => SOME (s, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3356_ : string -> maybe ((mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3356_:string ->((5)words$word#(5)words$word#(5)words$word#string)option) s3357_0= + (let s3358_0 = s3357_0 in + if ((string_startswith s3358_0 "mulw")) then + (case ((string_drop s3358_0 ((string_length "mulw")))) of + s3359_0 => + (case ((spc_matches_prefix0 s3359_0)) of + SOME ((() , s3360_0)) => + (case ((string_drop s3359_0 s3360_0)) of + s3361_0 => + (case ((reg_name_matches_prefix s3361_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3362_0)) => + (case ((string_drop s3361_0 s3362_0)) of + s3363_0 => + (case ((sep_matches_prefix s3363_0)) of + SOME ((() , s3364_0)) => + (case ((string_drop s3363_0 s3364_0)) of + s3365_0 => + (case ((reg_name_matches_prefix s3365_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3366_0)) => + (case ((string_drop s3365_0 s3366_0)) of + s3367_0 => + (case ((sep_matches_prefix s3367_0)) of + SOME ((() , s3368_0)) => + (case ((string_drop s3367_0 s3368_0)) of + s3369_0 => + (case ((reg_name_matches_prefix s3369_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3370_0)) => + (case ((string_drop s3369_0 s3370_0)) of s_ => SOME (rd, rs1, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3338_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3338_:string ->(bool#(5)words$word#(5)words$word#(5)words$word#string)option) s3339_0= + (let s3340_0 = s3339_0 in + if ((string_startswith s3340_0 "rem")) then + (case ((string_drop s3340_0 ((string_length "rem")))) of + s3341_0 => + (case ((maybe_not_u_matches_prefix s3341_0)) of + SOME ((s, s3342_0)) => + (case ((string_drop s3341_0 s3342_0)) of + s3343_0 => + (case ((spc_matches_prefix0 s3343_0)) of + SOME ((() , s3344_0)) => + (case ((string_drop s3343_0 s3344_0)) of + s3345_0 => + (case ((reg_name_matches_prefix s3345_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3346_0)) => + (case ((string_drop s3345_0 s3346_0)) of + s3347_0 => + (case ((sep_matches_prefix s3347_0)) of + SOME ((() , s3348_0)) => + (case ((string_drop s3347_0 s3348_0)) of + s3349_0 => + (case ((reg_name_matches_prefix s3349_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3350_0)) => + (case ((string_drop s3349_0 s3350_0)) of + s3351_0 => + (case ((sep_matches_prefix s3351_0)) of + SOME ((() , s3352_0)) => + (case ((string_drop s3351_0 s3352_0)) of + s3353_0 => + (case ((reg_name_matches_prefix s3353_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3354_0)) => + (case ((string_drop s3353_0 s3354_0)) of + s_ => SOME (s, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3320_ : string -> maybe ((bool * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3320_:string ->(bool#(5)words$word#(5)words$word#(5)words$word#string)option) s3321_0= + (let s3322_0 = s3321_0 in + if ((string_startswith s3322_0 "div")) then + (case ((string_drop s3322_0 ((string_length "div")))) of + s3323_0 => + (case ((maybe_not_u_matches_prefix s3323_0)) of + SOME ((s, s3324_0)) => + (case ((string_drop s3323_0 s3324_0)) of + s3325_0 => + (case ((spc_matches_prefix0 s3325_0)) of + SOME ((() , s3326_0)) => + (case ((string_drop s3325_0 s3326_0)) of + s3327_0 => + (case ((reg_name_matches_prefix s3327_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3328_0)) => + (case ((string_drop s3327_0 s3328_0)) of + s3329_0 => + (case ((sep_matches_prefix s3329_0)) of + SOME ((() , s3330_0)) => + (case ((string_drop s3329_0 s3330_0)) of + s3331_0 => + (case ((reg_name_matches_prefix s3331_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3332_0)) => + (case ((string_drop s3331_0 s3332_0)) of + s3333_0 => + (case ((sep_matches_prefix s3333_0)) of + SOME ((() , s3334_0)) => + (case ((string_drop s3333_0 s3334_0)) of + s3335_0 => + (case ((reg_name_matches_prefix s3335_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3336_0)) => + (case ((string_drop s3335_0 s3336_0)) of + s_ => SOME (s, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3303_ : string -> maybe ((bool * bool * bool * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3303_:string ->(bool#bool#bool#(5)words$word#(5)words$word#(5)words$word#string)option) s3304_0= + ((case s3304_0 of + s3305_0 => + (case ((mul_mnemonic_matches_prefix s3305_0)) of + SOME (((high, signed1, signed2), s3306_0)) => + (case ((string_drop s3305_0 s3306_0)) of + s3307_0 => + (case ((spc_matches_prefix0 s3307_0)) of + SOME ((() , s3308_0)) => + (case ((string_drop s3307_0 s3308_0)) of + s3309_0 => + (case ((reg_name_matches_prefix s3309_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3310_0)) => + (case ((string_drop s3309_0 s3310_0)) of + s3311_0 => + (case ((sep_matches_prefix s3311_0)) of + SOME ((() , s3312_0)) => + (case ((string_drop s3311_0 s3312_0)) of + s3313_0 => + (case ((reg_name_matches_prefix s3313_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3314_0)) => + (case ((string_drop s3313_0 s3314_0)) of + s3315_0 => + (case ((sep_matches_prefix s3315_0)) of + SOME ((() , s3316_0)) => + (case ((string_drop s3315_0 s3316_0)) of + s3317_0 => + (case ((reg_name_matches_prefix s3317_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3318_0)) => + (case ((string_drop s3317_0 s3318_0)) of + s_ => SOME (high, signed1, signed2, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s3291_ : string -> maybe ((mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3291_:string ->((5)words$word#(5)words$word#string)option) s3292_0= + (let s3293_0 = s3292_0 in + if ((string_startswith s3293_0 "c.add")) then + (case ((string_drop s3293_0 ((string_length "c.add")))) of + s3294_0 => + (case ((spc_matches_prefix0 s3294_0)) of + SOME ((() , s3295_0)) => + (case ((string_drop s3294_0 s3295_0)) of + s3296_0 => + (case ((reg_name_matches_prefix s3296_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s3297_0)) => + (case ((string_drop s3296_0 s3297_0)) of + s3298_0 => + (case ((sep_matches_prefix s3298_0)) of + SOME ((() , s3299_0)) => + (case ((string_drop s3298_0 s3299_0)) of + s3300_0 => + (case ((reg_name_matches_prefix s3300_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3301_0)) => + (case ((string_drop s3300_0 s3301_0)) of s_ => SOME (rsd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3287_ : string -> maybe string*) + +val _ = Define ` + ((s3287_:string ->(string)option) s3288_0= + (let s3289_0 = s3288_0 in + if ((string_startswith s3289_0 "c.ebreak")) then + (case ((string_drop s3289_0 ((string_length "c.ebreak")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s3275_ : string -> maybe ((mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s3275_:string ->((5)words$word#(5)words$word#string)option) s3276_0= + (let s3277_0 = s3276_0 in + if ((string_startswith s3277_0 "c.mv")) then + (case ((string_drop s3277_0 ((string_length "c.mv")))) of + s3278_0 => + (case ((spc_matches_prefix0 s3278_0)) of + SOME ((() , s3279_0)) => + (case ((string_drop s3278_0 s3279_0)) of + s3280_0 => + (case ((reg_name_matches_prefix s3280_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3281_0)) => + (case ((string_drop s3280_0 s3281_0)) of + s3282_0 => + (case ((sep_matches_prefix s3282_0)) of + SOME ((() , s3283_0)) => + (case ((string_drop s3282_0 s3283_0)) of + s3284_0 => + (case ((reg_name_matches_prefix s3284_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3285_0)) => + (case ((string_drop s3284_0 s3285_0)) of s_ => SOME (rd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3267_ : string -> maybe ((mword ty5 * string))*) + +val _ = Define ` + ((s3267_:string ->((5)words$word#string)option) s3268_0= + (let s3269_0 = s3268_0 in + if ((string_startswith s3269_0 "c.jalr")) then + (case ((string_drop s3269_0 ((string_length "c.jalr")))) of + s3270_0 => + (case ((spc_matches_prefix0 s3270_0)) of + SOME ((() , s3271_0)) => + (case ((string_drop s3270_0 s3271_0)) of + s3272_0 => + (case ((reg_name_matches_prefix s3272_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3273_0)) => + (case ((string_drop s3272_0 s3273_0)) of s_ => SOME (rs1, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3259_ : string -> maybe ((mword ty5 * string))*) + +val _ = Define ` + ((s3259_:string ->((5)words$word#string)option) s3260_0= + (let s3261_0 = s3260_0 in + if ((string_startswith s3261_0 "c.jr")) then + (case ((string_drop s3261_0 ((string_length "c.jr")))) of + s3262_0 => + (case ((spc_matches_prefix0 s3262_0)) of + SOME ((() , s3263_0)) => + (case ((string_drop s3262_0 s3263_0)) of + s3264_0 => + (case ((reg_name_matches_prefix s3264_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s3265_0)) => + (case ((string_drop s3264_0 s3265_0)) of s_ => SOME (rs1, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3247_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3247_:string ->((5)words$word#(6)words$word#string)option) s3248_0= + (let s3249_0 = s3248_0 in + if ((string_startswith s3249_0 "c.sdsp")) then + (case ((string_drop s3249_0 ((string_length "c.sdsp")))) of + s3250_0 => + (case ((spc_matches_prefix0 s3250_0)) of + SOME ((() , s3251_0)) => + (case ((string_drop s3250_0 s3251_0)) of + s3252_0 => + (case ((reg_name_matches_prefix s3252_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s3253_0)) => + (case ((string_drop s3252_0 s3253_0)) of + s3254_0 => + (case ((sep_matches_prefix s3254_0)) of + SOME ((() , s3255_0)) => + (case ((string_drop s3254_0 s3255_0)) of + s3256_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3256_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s3257_0)) => + (case ((string_drop s3256_0 s3257_0)) of s_ => SOME (rs2, uimm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3235_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3235_:string ->((5)words$word#(6)words$word#string)option) s3236_0= + (let s3237_0 = s3236_0 in + if ((string_startswith s3237_0 "c.swsp")) then + (case ((string_drop s3237_0 ((string_length "c.swsp")))) of + s3238_0 => + (case ((spc_matches_prefix0 s3238_0)) of + SOME ((() , s3239_0)) => + (case ((string_drop s3238_0 s3239_0)) of + s3240_0 => + (case ((reg_name_matches_prefix s3240_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3241_0)) => + (case ((string_drop s3240_0 s3241_0)) of + s3242_0 => + (case ((sep_matches_prefix s3242_0)) of + SOME ((() , s3243_0)) => + (case ((string_drop s3242_0 s3243_0)) of + s3244_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3244_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s3245_0)) => + (case ((string_drop s3244_0 s3245_0)) of s_ => SOME (rd, uimm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3223_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3223_:string ->((5)words$word#(6)words$word#string)option) s3224_0= + (let s3225_0 = s3224_0 in + if ((string_startswith s3225_0 "c.ldsp")) then + (case ((string_drop s3225_0 ((string_length "c.ldsp")))) of + s3226_0 => + (case ((spc_matches_prefix0 s3226_0)) of + SOME ((() , s3227_0)) => + (case ((string_drop s3226_0 s3227_0)) of + s3228_0 => + (case ((reg_name_matches_prefix s3228_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3229_0)) => + (case ((string_drop s3228_0 s3229_0)) of + s3230_0 => + (case ((sep_matches_prefix s3230_0)) of + SOME ((() , s3231_0)) => + (case ((string_drop s3230_0 s3231_0)) of + s3232_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3232_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s3233_0)) => + (case ((string_drop s3232_0 s3233_0)) of s_ => SOME (rd, uimm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3211_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3211_:string ->((5)words$word#(6)words$word#string)option) s3212_0= + (let s3213_0 = s3212_0 in + if ((string_startswith s3213_0 "c.lwsp")) then + (case ((string_drop s3213_0 ((string_length "c.lwsp")))) of + s3214_0 => + (case ((spc_matches_prefix0 s3214_0)) of + SOME ((() , s3215_0)) => + (case ((string_drop s3214_0 s3215_0)) of + s3216_0 => + (case ((reg_name_matches_prefix s3216_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3217_0)) => + (case ((string_drop s3216_0 s3217_0)) of + s3218_0 => + (case ((sep_matches_prefix s3218_0)) of + SOME ((() , s3219_0)) => + (case ((string_drop s3218_0 s3219_0)) of + s3220_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3220_0 : (( 6 words$word # ii)) option)) of + SOME ((uimm, s3221_0)) => + (case ((string_drop s3220_0 s3221_0)) of s_ => SOME (rd, uimm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3199_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3199_:string ->((5)words$word#(6)words$word#string)option) s3200_0= + (let s3201_0 = s3200_0 in + if ((string_startswith s3201_0 "c.slli")) then + (case ((string_drop s3201_0 ((string_length "c.slli")))) of + s3202_0 => + (case ((spc_matches_prefix0 s3202_0)) of + SOME ((() , s3203_0)) => + (case ((string_drop s3202_0 s3203_0)) of + s3204_0 => + (case ((reg_name_matches_prefix s3204_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s3205_0)) => + (case ((string_drop s3204_0 s3205_0)) of + s3206_0 => + (case ((sep_matches_prefix s3206_0)) of + SOME ((() , s3207_0)) => + (case ((string_drop s3206_0 s3207_0)) of + s3208_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3208_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s3209_0)) => + (case ((string_drop s3208_0 s3209_0)) of s_ => SOME (rsd, shamt, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3187_ : string -> maybe ((mword ty3 * mword ty8 * string))*) + +val _ = Define ` + ((s3187_:string ->((3)words$word#(8)words$word#string)option) s3188_0= + (let s3189_0 = s3188_0 in + if ((string_startswith s3189_0 "c.bnez")) then + (case ((string_drop s3189_0 ((string_length "c.bnez")))) of + s3190_0 => + (case ((spc_matches_prefix0 s3190_0)) of + SOME ((() , s3191_0)) => + (case ((string_drop s3190_0 s3191_0)) of + s3192_0 => + (case ((creg_name_matches_prefix s3192_0 : (( 3 words$word # ii)) option)) of + SOME ((rs, s3193_0)) => + (case ((string_drop s3192_0 s3193_0)) of + s3194_0 => + (case ((sep_matches_prefix s3194_0)) of + SOME ((() , s3195_0)) => + (case ((string_drop s3194_0 s3195_0)) of + s3196_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3196_0 : (( 8 words$word # ii)) option)) of + SOME ((imm, s3197_0)) => + (case ((string_drop s3196_0 s3197_0)) of s_ => SOME (rs, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3175_ : string -> maybe ((mword ty3 * mword ty8 * string))*) + +val _ = Define ` + ((s3175_:string ->((3)words$word#(8)words$word#string)option) s3176_0= + (let s3177_0 = s3176_0 in + if ((string_startswith s3177_0 "c.beqz")) then + (case ((string_drop s3177_0 ((string_length "c.beqz")))) of + s3178_0 => + (case ((spc_matches_prefix0 s3178_0)) of + SOME ((() , s3179_0)) => + (case ((string_drop s3178_0 s3179_0)) of + s3180_0 => + (case ((creg_name_matches_prefix s3180_0 : (( 3 words$word # ii)) option)) of + SOME ((rs, s3181_0)) => + (case ((string_drop s3180_0 s3181_0)) of + s3182_0 => + (case ((sep_matches_prefix s3182_0)) of + SOME ((() , s3183_0)) => + (case ((string_drop s3182_0 s3183_0)) of + s3184_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3184_0 : (( 8 words$word # ii)) option)) of + SOME ((imm, s3185_0)) => + (case ((string_drop s3184_0 s3185_0)) of s_ => SOME (rs, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3167_ : string -> maybe ((mword ty11 * string))*) + +val _ = Define ` + ((s3167_:string ->((11)words$word#string)option) s3168_0= + (let s3169_0 = s3168_0 in + if ((string_startswith s3169_0 "c.j")) then + (case ((string_drop s3169_0 ((string_length "c.j")))) of + s3170_0 => + (case ((spc_matches_prefix0 s3170_0)) of + SOME ((() , s3171_0)) => + (case ((string_drop s3170_0 s3171_0)) of + s3172_0 => + (case ((hex_bits_11_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3172_0 : (( 11 words$word # ii)) option)) of + SOME ((imm, s3173_0)) => + (case ((string_drop s3172_0 s3173_0)) of s_ => SOME (imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3155_ : string -> maybe ((mword ty3 * mword ty3 * string))*) + +val _ = Define ` + ((s3155_:string ->((3)words$word#(3)words$word#string)option) s3156_0= + (let s3157_0 = s3156_0 in + if ((string_startswith s3157_0 "c.addw")) then + (case ((string_drop s3157_0 ((string_length "c.addw")))) of + s3158_0 => + (case ((spc_matches_prefix0 s3158_0)) of + SOME ((() , s3159_0)) => + (case ((string_drop s3158_0 s3159_0)) of + s3160_0 => + (case ((creg_name_matches_prefix s3160_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3161_0)) => + (case ((string_drop s3160_0 s3161_0)) of + s3162_0 => + (case ((sep_matches_prefix s3162_0)) of + SOME ((() , s3163_0)) => + (case ((string_drop s3162_0 s3163_0)) of + s3164_0 => + (case ((creg_name_matches_prefix s3164_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s3165_0)) => + (case ((string_drop s3164_0 s3165_0)) of s_ => SOME (rsd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3143_ : string -> maybe ((mword ty3 * mword ty3 * string))*) + +val _ = Define ` + ((s3143_:string ->((3)words$word#(3)words$word#string)option) s3144_0= + (let s3145_0 = s3144_0 in + if ((string_startswith s3145_0 "c.subw")) then + (case ((string_drop s3145_0 ((string_length "c.subw")))) of + s3146_0 => + (case ((spc_matches_prefix0 s3146_0)) of + SOME ((() , s3147_0)) => + (case ((string_drop s3146_0 s3147_0)) of + s3148_0 => + (case ((creg_name_matches_prefix s3148_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3149_0)) => + (case ((string_drop s3148_0 s3149_0)) of + s3150_0 => + (case ((sep_matches_prefix s3150_0)) of + SOME ((() , s3151_0)) => + (case ((string_drop s3150_0 s3151_0)) of + s3152_0 => + (case ((creg_name_matches_prefix s3152_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s3153_0)) => + (case ((string_drop s3152_0 s3153_0)) of s_ => SOME (rsd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3131_ : string -> maybe ((mword ty3 * mword ty3 * string))*) + +val _ = Define ` + ((s3131_:string ->((3)words$word#(3)words$word#string)option) s3132_0= + (let s3133_0 = s3132_0 in + if ((string_startswith s3133_0 "c.and")) then + (case ((string_drop s3133_0 ((string_length "c.and")))) of + s3134_0 => + (case ((spc_matches_prefix0 s3134_0)) of + SOME ((() , s3135_0)) => + (case ((string_drop s3134_0 s3135_0)) of + s3136_0 => + (case ((creg_name_matches_prefix s3136_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3137_0)) => + (case ((string_drop s3136_0 s3137_0)) of + s3138_0 => + (case ((sep_matches_prefix s3138_0)) of + SOME ((() , s3139_0)) => + (case ((string_drop s3138_0 s3139_0)) of + s3140_0 => + (case ((creg_name_matches_prefix s3140_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s3141_0)) => + (case ((string_drop s3140_0 s3141_0)) of s_ => SOME (rsd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3119_ : string -> maybe ((mword ty3 * mword ty3 * string))*) + +val _ = Define ` + ((s3119_:string ->((3)words$word#(3)words$word#string)option) s3120_0= + (let s3121_0 = s3120_0 in + if ((string_startswith s3121_0 "c.or")) then + (case ((string_drop s3121_0 ((string_length "c.or")))) of + s3122_0 => + (case ((spc_matches_prefix0 s3122_0)) of + SOME ((() , s3123_0)) => + (case ((string_drop s3122_0 s3123_0)) of + s3124_0 => + (case ((creg_name_matches_prefix s3124_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3125_0)) => + (case ((string_drop s3124_0 s3125_0)) of + s3126_0 => + (case ((sep_matches_prefix s3126_0)) of + SOME ((() , s3127_0)) => + (case ((string_drop s3126_0 s3127_0)) of + s3128_0 => + (case ((creg_name_matches_prefix s3128_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s3129_0)) => + (case ((string_drop s3128_0 s3129_0)) of s_ => SOME (rsd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3107_ : string -> maybe ((mword ty3 * mword ty3 * string))*) + +val _ = Define ` + ((s3107_:string ->((3)words$word#(3)words$word#string)option) s3108_0= + (let s3109_0 = s3108_0 in + if ((string_startswith s3109_0 "c.xor")) then + (case ((string_drop s3109_0 ((string_length "c.xor")))) of + s3110_0 => + (case ((spc_matches_prefix0 s3110_0)) of + SOME ((() , s3111_0)) => + (case ((string_drop s3110_0 s3111_0)) of + s3112_0 => + (case ((creg_name_matches_prefix s3112_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3113_0)) => + (case ((string_drop s3112_0 s3113_0)) of + s3114_0 => + (case ((sep_matches_prefix s3114_0)) of + SOME ((() , s3115_0)) => + (case ((string_drop s3114_0 s3115_0)) of + s3116_0 => + (case ((creg_name_matches_prefix s3116_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s3117_0)) => + (case ((string_drop s3116_0 s3117_0)) of s_ => SOME (rsd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3095_ : string -> maybe ((mword ty3 * mword ty3 * string))*) + +val _ = Define ` + ((s3095_:string ->((3)words$word#(3)words$word#string)option) s3096_0= + (let s3097_0 = s3096_0 in + if ((string_startswith s3097_0 "c.sub")) then + (case ((string_drop s3097_0 ((string_length "c.sub")))) of + s3098_0 => + (case ((spc_matches_prefix0 s3098_0)) of + SOME ((() , s3099_0)) => + (case ((string_drop s3098_0 s3099_0)) of + s3100_0 => + (case ((creg_name_matches_prefix s3100_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3101_0)) => + (case ((string_drop s3100_0 s3101_0)) of + s3102_0 => + (case ((sep_matches_prefix s3102_0)) of + SOME ((() , s3103_0)) => + (case ((string_drop s3102_0 s3103_0)) of + s3104_0 => + (case ((creg_name_matches_prefix s3104_0 : (( 3 words$word # ii)) option)) of + SOME ((rs2, s3105_0)) => + (case ((string_drop s3104_0 s3105_0)) of s_ => SOME (rsd, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3083_ : string -> maybe ((mword ty3 * mword ty6 * string))*) + +val _ = Define ` + ((s3083_:string ->((3)words$word#(6)words$word#string)option) s3084_0= + (let s3085_0 = s3084_0 in + if ((string_startswith s3085_0 "c.andi")) then + (case ((string_drop s3085_0 ((string_length "c.andi")))) of + s3086_0 => + (case ((spc_matches_prefix0 s3086_0)) of + SOME ((() , s3087_0)) => + (case ((string_drop s3086_0 s3087_0)) of + s3088_0 => + (case ((creg_name_matches_prefix s3088_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3089_0)) => + (case ((string_drop s3088_0 s3089_0)) of + s3090_0 => + (case ((sep_matches_prefix s3090_0)) of + SOME ((() , s3091_0)) => + (case ((string_drop s3090_0 s3091_0)) of + s3092_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3092_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s3093_0)) => + (case ((string_drop s3092_0 s3093_0)) of s_ => SOME (rsd, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3071_ : string -> maybe ((mword ty3 * mword ty6 * string))*) + +val _ = Define ` + ((s3071_:string ->((3)words$word#(6)words$word#string)option) s3072_0= + (let s3073_0 = s3072_0 in + if ((string_startswith s3073_0 "c.srai")) then + (case ((string_drop s3073_0 ((string_length "c.srai")))) of + s3074_0 => + (case ((spc_matches_prefix0 s3074_0)) of + SOME ((() , s3075_0)) => + (case ((string_drop s3074_0 s3075_0)) of + s3076_0 => + (case ((creg_name_matches_prefix s3076_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3077_0)) => + (case ((string_drop s3076_0 s3077_0)) of + s3078_0 => + (case ((sep_matches_prefix s3078_0)) of + SOME ((() , s3079_0)) => + (case ((string_drop s3078_0 s3079_0)) of + s3080_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3080_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s3081_0)) => + (case ((string_drop s3080_0 s3081_0)) of s_ => SOME (rsd, shamt, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3059_ : string -> maybe ((mword ty3 * mword ty6 * string))*) + +val _ = Define ` + ((s3059_:string ->((3)words$word#(6)words$word#string)option) s3060_0= + (let s3061_0 = s3060_0 in + if ((string_startswith s3061_0 "c.srli")) then + (case ((string_drop s3061_0 ((string_length "c.srli")))) of + s3062_0 => + (case ((spc_matches_prefix0 s3062_0)) of + SOME ((() , s3063_0)) => + (case ((string_drop s3062_0 s3063_0)) of + s3064_0 => + (case ((creg_name_matches_prefix s3064_0 : (( 3 words$word # ii)) option)) of + SOME ((rsd, s3065_0)) => + (case ((string_drop s3064_0 s3065_0)) of + s3066_0 => + (case ((sep_matches_prefix s3066_0)) of + SOME ((() , s3067_0)) => + (case ((string_drop s3066_0 s3067_0)) of + s3068_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3068_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s3069_0)) => + (case ((string_drop s3068_0 s3069_0)) of s_ => SOME (rsd, shamt, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3047_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3047_:string ->((5)words$word#(6)words$word#string)option) s3048_0= + (let s3049_0 = s3048_0 in + if ((string_startswith s3049_0 "c.lui")) then + (case ((string_drop s3049_0 ((string_length "c.lui")))) of + s3050_0 => + (case ((spc_matches_prefix0 s3050_0)) of + SOME ((() , s3051_0)) => + (case ((string_drop s3050_0 s3051_0)) of + s3052_0 => + (case ((reg_name_matches_prefix s3052_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3053_0)) => + (case ((string_drop s3052_0 s3053_0)) of + s3054_0 => + (case ((sep_matches_prefix s3054_0)) of + SOME ((() , s3055_0)) => + (case ((string_drop s3054_0 s3055_0)) of + s3056_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3056_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s3057_0)) => + (case ((string_drop s3056_0 s3057_0)) of s_ => SOME (rd, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3039_ : string -> maybe ((mword ty6 * string))*) + +val _ = Define ` + ((s3039_:string ->((6)words$word#string)option) s3040_0= + (let s3041_0 = s3040_0 in + if ((string_startswith s3041_0 "c.addi16sp")) then + (case ((string_drop s3041_0 ((string_length "c.addi16sp")))) of + s3042_0 => + (case ((spc_matches_prefix0 s3042_0)) of + SOME ((() , s3043_0)) => + (case ((string_drop s3042_0 s3043_0)) of + s3044_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3044_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s3045_0)) => + (case ((string_drop s3044_0 s3045_0)) of s_ => SOME (imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3027_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3027_:string ->((5)words$word#(6)words$word#string)option) s3028_0= + (let s3029_0 = s3028_0 in + if ((string_startswith s3029_0 "c.li")) then + (case ((string_drop s3029_0 ((string_length "c.li")))) of + s3030_0 => + (case ((spc_matches_prefix0 s3030_0)) of + SOME ((() , s3031_0)) => + (case ((string_drop s3030_0 s3031_0)) of + s3032_0 => + (case ((reg_name_matches_prefix s3032_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s3033_0)) => + (case ((string_drop s3032_0 s3033_0)) of + s3034_0 => + (case ((sep_matches_prefix s3034_0)) of + SOME ((() , s3035_0)) => + (case ((string_drop s3034_0 s3035_0)) of + s3036_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3036_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s3037_0)) => + (case ((string_drop s3036_0 s3037_0)) of s_ => SOME (rd, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3015_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s3015_:string ->((5)words$word#(6)words$word#string)option) s3016_0= + (let s3017_0 = s3016_0 in + if ((string_startswith s3017_0 "c.addiw")) then + (case ((string_drop s3017_0 ((string_length "c.addiw")))) of + s3018_0 => + (case ((spc_matches_prefix0 s3018_0)) of + SOME ((() , s3019_0)) => + (case ((string_drop s3018_0 s3019_0)) of + s3020_0 => + (case ((reg_name_matches_prefix s3020_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s3021_0)) => + (case ((string_drop s3020_0 s3021_0)) of + s3022_0 => + (case ((sep_matches_prefix s3022_0)) of + SOME ((() , s3023_0)) => + (case ((string_drop s3022_0 s3023_0)) of + s3024_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3024_0 : (( 6 words$word # ii)) option)) of + SOME ((imm, s3025_0)) => + (case ((string_drop s3024_0 s3025_0)) of s_ => SOME (rsd, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s3007_ : string -> maybe ((mword ty11 * string))*) + +val _ = Define ` + ((s3007_:string ->((11)words$word#string)option) s3008_0= + (let s3009_0 = s3008_0 in + if ((string_startswith s3009_0 "c.jal")) then + (case ((string_drop s3009_0 ((string_length "c.jal")))) of + s3010_0 => + (case ((spc_matches_prefix0 s3010_0)) of + SOME ((() , s3011_0)) => + (case ((string_drop s3010_0 s3011_0)) of + s3012_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3012_0 : (( 12 words$word # ii)) option)) of + SOME ((v__826, s3013_0)) => + if (((((subrange_vec_dec v__826 (( 0 : int): ii) (( 0 : int): ii) : 1 words$word)) + = (vec_of_bits [B0] : 1 words$word)))) then + let (imm : 11 words$word) = ((subrange_vec_dec v__826 (( 11 : int): ii) + (( 1 : int): ii) : 11 words$word)) in + let (imm : 11 words$word) = ((subrange_vec_dec v__826 (( 11 : int): ii) + (( 1 : int): ii) : 11 words$word)) in + (case ((string_drop s3012_0 s3013_0)) of s_ => SOME (imm, s_) ) else + NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2995_ : string -> maybe ((mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s2995_:string ->((5)words$word#(6)words$word#string)option) s2996_0= + (let s2997_0 = s2996_0 in + if ((string_startswith s2997_0 "c.addi")) then + (case ((string_drop s2997_0 ((string_length "c.addi")))) of + s2998_0 => + (case ((spc_matches_prefix0 s2998_0)) of + SOME ((() , s2999_0)) => + (case ((string_drop s2998_0 s2999_0)) of + s3000_0 => + (case ((reg_name_matches_prefix s3000_0 : (( 5 words$word # ii)) option)) of + SOME ((rsd, s3001_0)) => + (case ((string_drop s3000_0 s3001_0)) of + s3002_0 => + (case ((sep_matches_prefix s3002_0)) of + SOME ((() , s3003_0)) => + (case ((string_drop s3002_0 s3003_0)) of + s3004_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s3004_0 : (( 6 words$word # ii)) option)) of + SOME ((nzi, s3005_0)) => + (case ((string_drop s3004_0 s3005_0)) of s_ => SOME (rsd, nzi, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2979_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5 * string))*) + +val _ = Define ` + ((s2979_:string ->((3)words$word#(3)words$word#(5)words$word#string)option) s2980_0= + (let s2981_0 = s2980_0 in + if ((string_startswith s2981_0 "c.sd")) then + (case ((string_drop s2981_0 ((string_length "c.sd")))) of + s2982_0 => + (case ((spc_matches_prefix0 s2982_0)) of + SOME ((() , s2983_0)) => + (case ((string_drop s2982_0 s2983_0)) of + s2984_0 => + (case ((creg_name_matches_prefix s2984_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc1, s2985_0)) => + (case ((string_drop s2984_0 s2985_0)) of + s2986_0 => + (case ((sep_matches_prefix s2986_0)) of + SOME ((() , s2987_0)) => + (case ((string_drop s2986_0 s2987_0)) of + s2988_0 => + (case ((creg_name_matches_prefix s2988_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc2, s2989_0)) => + (case ((string_drop s2988_0 s2989_0)) of + s2990_0 => + (case ((sep_matches_prefix s2990_0)) of + SOME ((() , s2991_0)) => + (case ((string_drop s2990_0 s2991_0)) of + s2992_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2992_0 + : (( 8 words$word # ii)) option)) of + SOME ((v__828, s2993_0)) => + if (((((subrange_vec_dec v__828 (( 2 : int): ii) (( 0 : int): ii) : 3 words$word)) + = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__828 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__828 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + (case ((string_drop s2992_0 s2993_0)) of + s_ => SOME (rsc1, rsc2, uimm, s_) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2963_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5 * string))*) + +val _ = Define ` + ((s2963_:string ->((3)words$word#(3)words$word#(5)words$word#string)option) s2964_0= + (let s2965_0 = s2964_0 in + if ((string_startswith s2965_0 "c.sw")) then + (case ((string_drop s2965_0 ((string_length "c.sw")))) of + s2966_0 => + (case ((spc_matches_prefix0 s2966_0)) of + SOME ((() , s2967_0)) => + (case ((string_drop s2966_0 s2967_0)) of + s2968_0 => + (case ((creg_name_matches_prefix s2968_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc1, s2969_0)) => + (case ((string_drop s2968_0 s2969_0)) of + s2970_0 => + (case ((sep_matches_prefix s2970_0)) of + SOME ((() , s2971_0)) => + (case ((string_drop s2970_0 s2971_0)) of + s2972_0 => + (case ((creg_name_matches_prefix s2972_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc2, s2973_0)) => + (case ((string_drop s2972_0 s2973_0)) of + s2974_0 => + (case ((sep_matches_prefix s2974_0)) of + SOME ((() , s2975_0)) => + (case ((string_drop s2974_0 s2975_0)) of + s2976_0 => + (case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2976_0 + : (( 7 words$word # ii)) option)) of + SOME ((v__830, s2977_0)) => + if (((((subrange_vec_dec v__830 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__830 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__830 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + (case ((string_drop s2976_0 s2977_0)) of + s_ => SOME (rsc1, rsc2, uimm, s_) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2947_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5 * string))*) + +val _ = Define ` + ((s2947_:string ->((3)words$word#(3)words$word#(5)words$word#string)option) s2948_0= + (let s2949_0 = s2948_0 in + if ((string_startswith s2949_0 "c.ld")) then + (case ((string_drop s2949_0 ((string_length "c.ld")))) of + s2950_0 => + (case ((spc_matches_prefix0 s2950_0)) of + SOME ((() , s2951_0)) => + (case ((string_drop s2950_0 s2951_0)) of + s2952_0 => + (case ((creg_name_matches_prefix s2952_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s2953_0)) => + (case ((string_drop s2952_0 s2953_0)) of + s2954_0 => + (case ((sep_matches_prefix s2954_0)) of + SOME ((() , s2955_0)) => + (case ((string_drop s2954_0 s2955_0)) of + s2956_0 => + (case ((creg_name_matches_prefix s2956_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc, s2957_0)) => + (case ((string_drop s2956_0 s2957_0)) of + s2958_0 => + (case ((sep_matches_prefix s2958_0)) of + SOME ((() , s2959_0)) => + (case ((string_drop s2958_0 s2959_0)) of + s2960_0 => + (case ((hex_bits_8_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2960_0 + : (( 8 words$word # ii)) option)) of + SOME ((v__832, s2961_0)) => + if (((((subrange_vec_dec v__832 (( 2 : int): ii) (( 0 : int): ii) : 3 words$word)) + = (vec_of_bits [B0;B0;B0] : 3 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__832 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__832 (( 7 : int): ii) (( 3 : int): ii) : 5 words$word)) in + (case ((string_drop s2960_0 s2961_0)) of + s_ => SOME (rdc, rsc, uimm, s_) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2931_ : string -> maybe ((mword ty3 * mword ty3 * mword ty5 * string))*) + +val _ = Define ` + ((s2931_:string ->((3)words$word#(3)words$word#(5)words$word#string)option) s2932_0= + (let s2933_0 = s2932_0 in + if ((string_startswith s2933_0 "c.lw")) then + (case ((string_drop s2933_0 ((string_length "c.lw")))) of + s2934_0 => + (case ((spc_matches_prefix0 s2934_0)) of + SOME ((() , s2935_0)) => + (case ((string_drop s2934_0 s2935_0)) of + s2936_0 => + (case ((creg_name_matches_prefix s2936_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s2937_0)) => + (case ((string_drop s2936_0 s2937_0)) of + s2938_0 => + (case ((sep_matches_prefix s2938_0)) of + SOME ((() , s2939_0)) => + (case ((string_drop s2938_0 s2939_0)) of + s2940_0 => + (case ((creg_name_matches_prefix s2940_0 : (( 3 words$word # ii)) option)) of + SOME ((rsc, s2941_0)) => + (case ((string_drop s2940_0 s2941_0)) of + s2942_0 => + (case ((sep_matches_prefix s2942_0)) of + SOME ((() , s2943_0)) => + (case ((string_drop s2942_0 s2943_0)) of + s2944_0 => + (case ((hex_bits_7_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2944_0 + : (( 7 words$word # ii)) option)) of + SOME ((v__834, s2945_0)) => + if (((((subrange_vec_dec v__834 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (uimm : 5 words$word) = + ((subrange_vec_dec v__834 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + let (uimm : 5 words$word) = + ((subrange_vec_dec v__834 (( 6 : int): ii) (( 2 : int): ii) : 5 words$word)) in + (case ((string_drop s2944_0 s2945_0)) of + s_ => SOME (rdc, rsc, uimm, s_) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2919_ : string -> maybe ((mword ty3 * mword ty8 * string))*) + +val _ = Define ` + ((s2919_:string ->((3)words$word#(8)words$word#string)option) s2920_0= + (let s2921_0 = s2920_0 in + if ((string_startswith s2921_0 "c.addi4spn")) then + (case ((string_drop s2921_0 ((string_length "c.addi4spn")))) of + s2922_0 => + (case ((spc_matches_prefix0 s2922_0)) of + SOME ((() , s2923_0)) => + (case ((string_drop s2922_0 s2923_0)) of + s2924_0 => + (case ((creg_name_matches_prefix s2924_0 : (( 3 words$word # ii)) option)) of + SOME ((rdc, s2925_0)) => + (case ((string_drop s2924_0 s2925_0)) of + s2926_0 => + (case ((sep_matches_prefix s2926_0)) of + SOME ((() , s2927_0)) => + (case ((string_drop s2926_0 s2927_0)) of + s2928_0 => + (case ((hex_bits_10_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2928_0 : (( 10 words$word # ii)) option)) of + SOME ((v__836, s2929_0)) => + if (((((subrange_vec_dec v__836 (( 1 : int): ii) (( 0 : int): ii) : 2 words$word)) + = (vec_of_bits [B0;B0] : 2 words$word)))) then + let (nzimm : 8 words$word) = + ((subrange_vec_dec v__836 (( 9 : int): ii) (( 2 : int): ii) : 8 words$word)) in + let (nzimm : 8 words$word) = + ((subrange_vec_dec v__836 (( 9 : int): ii) (( 2 : int): ii) : 8 words$word)) in + (case ((string_drop s2928_0 s2929_0)) of s_ => SOME (rdc, nzimm, s_) ) + else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2915_ : string -> maybe string*) + +val _ = Define ` + ((s2915_:string ->(string)option) s2916_0= + (let s2917_0 = s2916_0 in + if ((string_startswith s2917_0 "c.nop")) then + (case ((string_drop s2917_0 ((string_length "c.nop")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s2891_ : string -> maybe ((amoop * word_width * bool * bool * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2891_:string ->(amoop#word_width#bool#bool#(5)words$word#(5)words$word#(5)words$word#string)option) s2892_0= + ((case s2892_0 of + s2893_0 => + (case ((amo_mnemonic_matches_prefix s2893_0)) of + SOME ((op, s2894_0)) => + let s2895_0 = (string_drop s2893_0 s2894_0) in + if ((string_startswith s2895_0 ".")) then + (case ((string_drop s2895_0 ((string_length ".")))) of + s2896_0 => + (case ((size_mnemonic_matches_prefix s2896_0)) of + SOME ((width, s2897_0)) => + (case ((string_drop s2896_0 s2897_0)) of + s2898_0 => + (case ((maybe_aq_matches_prefix s2898_0)) of + SOME ((aq, s2899_0)) => + (case ((string_drop s2898_0 s2899_0)) of + s2900_0 => + (case ((maybe_rl_matches_prefix s2900_0)) of + SOME ((rl, s2901_0)) => + (case ((string_drop s2900_0 s2901_0)) of + s2902_0 => + (case ((spc_matches_prefix0 s2902_0)) of + SOME ((() , s2903_0)) => + (case ((string_drop s2902_0 s2903_0)) of + s2904_0 => + (case ((reg_name_matches_prefix s2904_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2905_0)) => + (case ((string_drop s2904_0 s2905_0)) of + s2906_0 => + (case ((sep_matches_prefix s2906_0)) of + SOME ((() , s2907_0)) => + (case ((string_drop s2906_0 s2907_0)) of + s2908_0 => + (case ((reg_name_matches_prefix s2908_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2909_0)) => + (case ((string_drop s2908_0 s2909_0)) of + s2910_0 => + (case ((sep_matches_prefix s2910_0)) of + SOME ((() , s2911_0)) => + (case ((string_drop s2910_0 s2911_0)) of + s2912_0 => + (case ((reg_name_matches_prefix s2912_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2913_0)) => + (case ((string_drop s2912_0 s2913_0)) of + s_ => + SOME (op, width, aq, rl, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + )))`; + + +(*val _s2869_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2869_:string ->(word_width#bool#bool#(5)words$word#(5)words$word#(5)words$word#string)option) s2870_0= + (let s2871_0 = s2870_0 in + if ((string_startswith s2871_0 "sc.")) then + (case ((string_drop s2871_0 ((string_length "sc.")))) of + s2872_0 => + (case ((size_mnemonic_matches_prefix s2872_0)) of + SOME ((size1, s2873_0)) => + (case ((string_drop s2872_0 s2873_0)) of + s2874_0 => + (case ((maybe_aq_matches_prefix s2874_0)) of + SOME ((aq, s2875_0)) => + (case ((string_drop s2874_0 s2875_0)) of + s2876_0 => + (case ((maybe_rl_matches_prefix s2876_0)) of + SOME ((rl, s2877_0)) => + (case ((string_drop s2876_0 s2877_0)) of + s2878_0 => + (case ((spc_matches_prefix0 s2878_0)) of + SOME ((() , s2879_0)) => + (case ((string_drop s2878_0 s2879_0)) of + s2880_0 => + (case ((reg_name_matches_prefix s2880_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2881_0)) => + (case ((string_drop s2880_0 s2881_0)) of + s2882_0 => + (case ((sep_matches_prefix s2882_0)) of + SOME ((() , s2883_0)) => + (case ((string_drop s2882_0 s2883_0)) of + s2884_0 => + (case ((reg_name_matches_prefix s2884_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2885_0)) => + (case ((string_drop s2884_0 s2885_0)) of + s2886_0 => + (case ((sep_matches_prefix s2886_0)) of + SOME ((() , s2887_0)) => + (case ((string_drop s2886_0 s2887_0)) of + s2888_0 => + (case ((reg_name_matches_prefix s2888_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2889_0)) => + (case ((string_drop s2888_0 s2889_0)) of + s_ => + SOME (size1, aq, rl, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2851_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2851_:string ->(word_width#bool#bool#(5)words$word#(5)words$word#string)option) s2852_0= + (let s2853_0 = s2852_0 in + if ((string_startswith s2853_0 "lr.")) then + (case ((string_drop s2853_0 ((string_length "lr.")))) of + s2854_0 => + (case ((size_mnemonic_matches_prefix s2854_0)) of + SOME ((size1, s2855_0)) => + (case ((string_drop s2854_0 s2855_0)) of + s2856_0 => + (case ((maybe_aq_matches_prefix s2856_0)) of + SOME ((aq, s2857_0)) => + (case ((string_drop s2856_0 s2857_0)) of + s2858_0 => + (case ((maybe_rl_matches_prefix s2858_0)) of + SOME ((rl, s2859_0)) => + (case ((string_drop s2858_0 s2859_0)) of + s2860_0 => + (case ((spc_matches_prefix0 s2860_0)) of + SOME ((() , s2861_0)) => + (case ((string_drop s2860_0 s2861_0)) of + s2862_0 => + (case ((reg_name_matches_prefix s2862_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2863_0)) => + (case ((string_drop s2862_0 s2863_0)) of + s2864_0 => + (case ((sep_matches_prefix s2864_0)) of + SOME ((() , s2865_0)) => + (case ((string_drop s2864_0 s2865_0)) of + s2866_0 => + (case ((reg_name_matches_prefix s2866_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2867_0)) => + (case ((string_drop s2866_0 s2867_0)) of + s_ => SOME (size1, aq, rl, rd, rs1, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2839_ : string -> maybe ((mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2839_:string ->((5)words$word#(5)words$word#string)option) s2840_0= + (let s2841_0 = s2840_0 in + if ((string_startswith s2841_0 "sfence.vma")) then + (case ((string_drop s2841_0 ((string_length "sfence.vma")))) of + s2842_0 => + (case ((spc_matches_prefix0 s2842_0)) of + SOME ((() , s2843_0)) => + (case ((string_drop s2842_0 s2843_0)) of + s2844_0 => + (case ((reg_name_matches_prefix s2844_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2845_0)) => + (case ((string_drop s2844_0 s2845_0)) of + s2846_0 => + (case ((sep_matches_prefix s2846_0)) of + SOME ((() , s2847_0)) => + (case ((string_drop s2846_0 s2847_0)) of + s2848_0 => + (case ((reg_name_matches_prefix s2848_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2849_0)) => + (case ((string_drop s2848_0 s2849_0)) of s_ => SOME (rs1, rs2, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2835_ : string -> maybe string*) + +val _ = Define ` + ((s2835_:string ->(string)option) s2836_0= + (let s2837_0 = s2836_0 in + if ((string_startswith s2837_0 "wfi")) then + (case ((string_drop s2837_0 ((string_length "wfi")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s2831_ : string -> maybe string*) + +val _ = Define ` + ((s2831_:string ->(string)option) s2832_0= + (let s2833_0 = s2832_0 in + if ((string_startswith s2833_0 "ebreak")) then + (case ((string_drop s2833_0 ((string_length "ebreak")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s2827_ : string -> maybe string*) + +val _ = Define ` + ((s2827_:string ->(string)option) s2828_0= + (let s2829_0 = s2828_0 in + if ((string_startswith s2829_0 "sret")) then + (case ((string_drop s2829_0 ((string_length "sret")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s2823_ : string -> maybe string*) + +val _ = Define ` + ((s2823_:string ->(string)option) s2824_0= + (let s2825_0 = s2824_0 in + if ((string_startswith s2825_0 "mret")) then + (case ((string_drop s2825_0 ((string_length "mret")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s2819_ : string -> maybe string*) + +val _ = Define ` + ((s2819_:string ->(string)option) s2820_0= + (let s2821_0 = s2820_0 in + if ((string_startswith s2821_0 "ecall")) then + (case ((string_drop s2821_0 ((string_length "ecall")))) of s_ => SOME s_ ) + else NONE))`; + + +(*val _s2815_ : string -> maybe string*) + +val _ = Define ` + ((s2815_:string ->(string)option) s2816_0= + (let s2817_0 = s2816_0 in + if ((string_startswith s2817_0 "fence.i")) then + (case ((string_drop s2817_0 ((string_length "fence.i")))) of + s_ => SOME s_ + ) + else NONE))`; + + +(*val _s2803_ : string -> maybe ((mword ty4 * mword ty4 * string))*) + +val _ = Define ` + ((s2803_:string ->((4)words$word#(4)words$word#string)option) s2804_0= + (let s2805_0 = s2804_0 in + if ((string_startswith s2805_0 "fence.tso")) then + (case ((string_drop s2805_0 ((string_length "fence.tso")))) of + s2806_0 => + (case ((spc_matches_prefix0 s2806_0)) of + SOME ((() , s2807_0)) => + (case ((string_drop s2806_0 s2807_0)) of + s2808_0 => + (case ((fence_bits_matches_prefix s2808_0 : (( 4 words$word # ii)) option)) of + SOME ((pred, s2809_0)) => + (case ((string_drop s2808_0 s2809_0)) of + s2810_0 => + (case ((sep_matches_prefix s2810_0)) of + SOME ((() , s2811_0)) => + (case ((string_drop s2810_0 s2811_0)) of + s2812_0 => + (case ((fence_bits_matches_prefix s2812_0 : (( 4 words$word # ii)) option)) of + SOME ((succ, s2813_0)) => + (case ((string_drop s2812_0 s2813_0)) of s_ => SOME (pred, succ, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2791_ : string -> maybe ((mword ty4 * mword ty4 * string))*) + +val _ = Define ` + ((s2791_:string ->((4)words$word#(4)words$word#string)option) s2792_0= + (let s2793_0 = s2792_0 in + if ((string_startswith s2793_0 "fence")) then + (case ((string_drop s2793_0 ((string_length "fence")))) of + s2794_0 => + (case ((spc_matches_prefix0 s2794_0)) of + SOME ((() , s2795_0)) => + (case ((string_drop s2794_0 s2795_0)) of + s2796_0 => + (case ((fence_bits_matches_prefix s2796_0 : (( 4 words$word # ii)) option)) of + SOME ((pred, s2797_0)) => + (case ((string_drop s2796_0 s2797_0)) of + s2798_0 => + (case ((sep_matches_prefix s2798_0)) of + SOME ((() , s2799_0)) => + (case ((string_drop s2798_0 s2799_0)) of + s2800_0 => + (case ((fence_bits_matches_prefix s2800_0 : (( 4 words$word # ii)) option)) of + SOME ((succ, s2801_0)) => + (case ((string_drop s2800_0 s2801_0)) of s_ => SOME (pred, succ, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2774_ : string -> maybe ((sopw * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2774_:string ->(sopw#(5)words$word#(5)words$word#(5)words$word#string)option) s2775_0= + ((case s2775_0 of + s2776_0 => + (case ((shiftiwop_mnemonic_matches_prefix s2776_0)) of + SOME ((op, s2777_0)) => + (case ((string_drop s2776_0 s2777_0)) of + s2778_0 => + (case ((spc_matches_prefix0 s2778_0)) of + SOME ((() , s2779_0)) => + (case ((string_drop s2778_0 s2779_0)) of + s2780_0 => + (case ((reg_name_matches_prefix s2780_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2781_0)) => + (case ((string_drop s2780_0 s2781_0)) of + s2782_0 => + (case ((sep_matches_prefix s2782_0)) of + SOME ((() , s2783_0)) => + (case ((string_drop s2782_0 s2783_0)) of + s2784_0 => + (case ((reg_name_matches_prefix s2784_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2785_0)) => + (case ((string_drop s2784_0 s2785_0)) of + s2786_0 => + (case ((sep_matches_prefix s2786_0)) of + SOME ((() , s2787_0)) => + (case ((string_drop s2786_0 s2787_0)) of + s2788_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s2788_0 : (( 5 words$word # ii)) option)) of + SOME ((shamt, s2789_0)) => + (case ((string_drop s2788_0 s2789_0)) of + s_ => SOME (op, rd, rs1, shamt, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2757_ : string -> maybe ((ropw * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2757_:string ->(ropw#(5)words$word#(5)words$word#(5)words$word#string)option) s2758_0= + ((case s2758_0 of + s2759_0 => + (case ((rtypew_mnemonic_matches_prefix s2759_0)) of + SOME ((op, s2760_0)) => + (case ((string_drop s2759_0 s2760_0)) of + s2761_0 => + (case ((spc_matches_prefix0 s2761_0)) of + SOME ((() , s2762_0)) => + (case ((string_drop s2761_0 s2762_0)) of + s2763_0 => + (case ((reg_name_matches_prefix s2763_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2764_0)) => + (case ((string_drop s2763_0 s2764_0)) of + s2765_0 => + (case ((sep_matches_prefix s2765_0)) of + SOME ((() , s2766_0)) => + (case ((string_drop s2765_0 s2766_0)) of + s2767_0 => + (case ((reg_name_matches_prefix s2767_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2768_0)) => + (case ((string_drop s2767_0 s2768_0)) of + s2769_0 => + (case ((sep_matches_prefix s2769_0)) of + SOME ((() , s2770_0)) => + (case ((string_drop s2769_0 s2770_0)) of + s2771_0 => + (case ((reg_name_matches_prefix s2771_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2772_0)) => + (case ((string_drop s2771_0 s2772_0)) of + s_ => SOME (op, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2740_ : string -> maybe ((sop * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2740_:string ->(sop#(5)words$word#(5)words$word#(5)words$word#string)option) s2741_0= + ((case s2741_0 of + s2742_0 => + (case ((shiftw_mnemonic_matches_prefix s2742_0)) of + SOME ((op, s2743_0)) => + (case ((string_drop s2742_0 s2743_0)) of + s2744_0 => + (case ((spc_matches_prefix0 s2744_0)) of + SOME ((() , s2745_0)) => + (case ((string_drop s2744_0 s2745_0)) of + s2746_0 => + (case ((reg_name_matches_prefix s2746_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2747_0)) => + (case ((string_drop s2746_0 s2747_0)) of + s2748_0 => + (case ((sep_matches_prefix s2748_0)) of + SOME ((() , s2749_0)) => + (case ((string_drop s2748_0 s2749_0)) of + s2750_0 => + (case ((reg_name_matches_prefix s2750_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2751_0)) => + (case ((string_drop s2750_0 s2751_0)) of + s2752_0 => + (case ((sep_matches_prefix s2752_0)) of + SOME ((() , s2753_0)) => + (case ((string_drop s2752_0 s2753_0)) of + s2754_0 => + (case ((hex_bits_5_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s2754_0 : (( 5 words$word # ii)) option)) of + SOME ((shamt, s2755_0)) => + (case ((string_drop s2754_0 s2755_0)) of + s_ => SOME (op, rd, rs1, shamt, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2724_ : string -> maybe ((mword ty5 * mword ty5 * mword ty12 * string))*) + +val _ = Define ` + ((s2724_:string ->((5)words$word#(5)words$word#(12)words$word#string)option) s2725_0= + (let s2726_0 = s2725_0 in + if ((string_startswith s2726_0 "addiw")) then + (case ((string_drop s2726_0 ((string_length "addiw")))) of + s2727_0 => + (case ((spc_matches_prefix0 s2727_0)) of + SOME ((() , s2728_0)) => + (case ((string_drop s2727_0 s2728_0)) of + s2729_0 => + (case ((reg_name_matches_prefix s2729_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2730_0)) => + (case ((string_drop s2729_0 s2730_0)) of + s2731_0 => + (case ((sep_matches_prefix s2731_0)) of + SOME ((() , s2732_0)) => + (case ((string_drop s2731_0 s2732_0)) of + s2733_0 => + (case ((reg_name_matches_prefix s2733_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2734_0)) => + (case ((string_drop s2733_0 s2734_0)) of + s2735_0 => + (case ((sep_matches_prefix s2735_0)) of + SOME ((() , s2736_0)) => + (case ((string_drop s2735_0 s2736_0)) of + s2737_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2737_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s2738_0)) => + (case ((string_drop s2737_0 s2738_0)) of s_ => SOME (rd, rs1, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2696_ : string -> maybe ((word_width * bool * bool * mword ty5 * mword ty12 * mword ty5 * string))*) + +val _ = Define ` + ((s2696_:string ->(word_width#bool#bool#(5)words$word#(12)words$word#(5)words$word#string)option) s2697_0= + (let s2698_0 = s2697_0 in + if ((string_startswith s2698_0 "s")) then + (case ((string_drop s2698_0 ((string_length "s")))) of + s2699_0 => + (case ((size_mnemonic_matches_prefix s2699_0)) of + SOME ((size1, s2700_0)) => + (case ((string_drop s2699_0 s2700_0)) of + s2701_0 => + (case ((maybe_aq_matches_prefix s2701_0)) of + SOME ((aq, s2702_0)) => + (case ((string_drop s2701_0 s2702_0)) of + s2703_0 => + (case ((maybe_rl_matches_prefix s2703_0)) of + SOME ((rl, s2704_0)) => + (case ((string_drop s2703_0 s2704_0)) of + s2705_0 => + (case ((spc_matches_prefix0 s2705_0)) of + SOME ((() , s2706_0)) => + (case ((string_drop s2705_0 s2706_0)) of + s2707_0 => + (case ((reg_name_matches_prefix s2707_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2708_0)) => + (case ((string_drop s2707_0 s2708_0)) of + s2709_0 => + (case ((sep_matches_prefix s2709_0)) of + SOME ((() , s2710_0)) => + (case ((string_drop s2709_0 s2710_0)) of + s2711_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2711_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s2712_0)) => + (case ((string_drop s2711_0 s2712_0)) of + s2713_0 => + (case ((opt_spc_matches_prefix0 s2713_0)) of + SOME ((() , s2714_0)) => + let s2715_0 = (string_drop s2713_0 s2714_0) in + if ((string_startswith s2715_0 "(")) then + (case ((string_drop s2715_0 ((string_length "(")))) of + s2716_0 => + (case ((opt_spc_matches_prefix0 s2716_0)) of + SOME ((() , s2717_0)) => + (case ((string_drop s2716_0 s2717_0)) of + s2718_0 => + (case ((reg_name_matches_prefix s2718_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2719_0)) => + (case ((string_drop s2718_0 s2719_0)) of + s2720_0 => + (case ((opt_spc_matches_prefix0 s2720_0)) of + SOME ((() , s2721_0)) => + let s2722_0 = (string_drop s2720_0 s2721_0) in + if ((string_startswith s2722_0 ")")) then + (case ((string_drop s2722_0 ((string_length ")")))) of + s_ => + SOME (size1, aq, rl, rs2, imm, rs1, s_) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2666_ : string -> maybe ((word_width * bool * bool * bool * mword ty5 * mword ty12 * mword ty5 * string))*) + +val _ = Define ` + ((s2666_:string ->(word_width#bool#bool#bool#(5)words$word#(12)words$word#(5)words$word#string)option) s2667_0= + (let s2668_0 = s2667_0 in + if ((string_startswith s2668_0 "l")) then + (case ((string_drop s2668_0 ((string_length "l")))) of + s2669_0 => + (case ((size_mnemonic_matches_prefix s2669_0)) of + SOME ((size1, s2670_0)) => + (case ((string_drop s2669_0 s2670_0)) of + s2671_0 => + (case ((maybe_u_matches_prefix s2671_0)) of + SOME ((is_unsigned, s2672_0)) => + (case ((string_drop s2671_0 s2672_0)) of + s2673_0 => + (case ((maybe_aq_matches_prefix s2673_0)) of + SOME ((aq, s2674_0)) => + (case ((string_drop s2673_0 s2674_0)) of + s2675_0 => + (case ((maybe_rl_matches_prefix s2675_0)) of + SOME ((rl, s2676_0)) => + (case ((string_drop s2675_0 s2676_0)) of + s2677_0 => + (case ((spc_matches_prefix0 s2677_0)) of + SOME ((() , s2678_0)) => + (case ((string_drop s2677_0 s2678_0)) of + s2679_0 => + (case ((reg_name_matches_prefix s2679_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2680_0)) => + (case ((string_drop s2679_0 s2680_0)) of + s2681_0 => + (case ((sep_matches_prefix s2681_0)) of + SOME ((() , s2682_0)) => + (case ((string_drop s2681_0 s2682_0)) of + s2683_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2683_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s2684_0)) => + (case ((string_drop s2683_0 s2684_0)) of + s2685_0 => + (case ((opt_spc_matches_prefix0 s2685_0)) of + SOME ((() , s2686_0)) => + let s2687_0 = (string_drop s2685_0 s2686_0) in + if ((string_startswith s2687_0 "(")) then + (case ((string_drop s2687_0 ((string_length "(")))) of + s2688_0 => + (case ((opt_spc_matches_prefix0 s2688_0)) of + SOME ((() , s2689_0)) => + (case ((string_drop s2688_0 s2689_0)) of + s2690_0 => + (case ((reg_name_matches_prefix s2690_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2691_0)) => + (case ((string_drop s2690_0 s2691_0)) of + s2692_0 => + (case ((opt_spc_matches_prefix0 s2692_0)) of + SOME ((() , s2693_0)) => + let s2694_0 = (string_drop s2692_0 s2693_0) in + if ((string_startswith s2694_0 ")")) then + (case ((string_drop s2694_0 ((string_length ")")))) of + s_ => + SOME (size1, is_unsigned, aq, rl, rd, imm, rs1, s_) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) else NONE + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2649_ : string -> maybe ((rop * mword ty5 * mword ty5 * mword ty5 * string))*) + +val _ = Define ` + ((s2649_:string ->(rop#(5)words$word#(5)words$word#(5)words$word#string)option) s2650_0= + ((case s2650_0 of + s2651_0 => + (case ((rtype_mnemonic_matches_prefix s2651_0)) of + SOME ((op, s2652_0)) => + (case ((string_drop s2651_0 s2652_0)) of + s2653_0 => + (case ((spc_matches_prefix0 s2653_0)) of + SOME ((() , s2654_0)) => + (case ((string_drop s2653_0 s2654_0)) of + s2655_0 => + (case ((reg_name_matches_prefix s2655_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2656_0)) => + (case ((string_drop s2655_0 s2656_0)) of + s2657_0 => + (case ((sep_matches_prefix s2657_0)) of + SOME ((() , s2658_0)) => + (case ((string_drop s2657_0 s2658_0)) of + s2659_0 => + (case ((reg_name_matches_prefix s2659_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2660_0)) => + (case ((string_drop s2659_0 s2660_0)) of + s2661_0 => + (case ((sep_matches_prefix s2661_0)) of + SOME ((() , s2662_0)) => + (case ((string_drop s2661_0 s2662_0)) of + s2663_0 => + (case ((reg_name_matches_prefix s2663_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2664_0)) => + (case ((string_drop s2663_0 s2664_0)) of + s_ => SOME (op, rd, rs1, rs2, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2632_ : string -> maybe ((sop * mword ty5 * mword ty5 * mword ty6 * string))*) + +val _ = Define ` + ((s2632_:string ->(sop#(5)words$word#(5)words$word#(6)words$word#string)option) s2633_0= + ((case s2633_0 of + s2634_0 => + (case ((shiftiop_mnemonic_matches_prefix s2634_0)) of + SOME ((op, s2635_0)) => + (case ((string_drop s2634_0 s2635_0)) of + s2636_0 => + (case ((spc_matches_prefix0 s2636_0)) of + SOME ((() , s2637_0)) => + (case ((string_drop s2636_0 s2637_0)) of + s2638_0 => + (case ((reg_name_matches_prefix s2638_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2639_0)) => + (case ((string_drop s2638_0 s2639_0)) of + s2640_0 => + (case ((sep_matches_prefix s2640_0)) of + SOME ((() , s2641_0)) => + (case ((string_drop s2640_0 s2641_0)) of + s2642_0 => + (case ((reg_name_matches_prefix s2642_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2643_0)) => + (case ((string_drop s2642_0 s2643_0)) of + s2644_0 => + (case ((sep_matches_prefix s2644_0)) of + SOME ((() , s2645_0)) => + (case ((string_drop s2644_0 s2645_0)) of + s2646_0 => + (case ((hex_bits_6_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s2646_0 : (( 6 words$word # ii)) option)) of + SOME ((shamt, s2647_0)) => + (case ((string_drop s2646_0 s2647_0)) of + s_ => SOME (op, rd, rs1, shamt, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2615_ : string -> maybe ((iop * mword ty5 * mword ty5 * mword ty12 * string))*) + +val _ = Define ` + ((s2615_:string ->(iop#(5)words$word#(5)words$word#(12)words$word#string)option) s2616_0= + ((case s2616_0 of + s2617_0 => + (case ((itype_mnemonic_matches_prefix s2617_0)) of + SOME ((op, s2618_0)) => + (case ((string_drop s2617_0 s2618_0)) of + s2619_0 => + (case ((spc_matches_prefix0 s2619_0)) of + SOME ((() , s2620_0)) => + (case ((string_drop s2619_0 s2620_0)) of + s2621_0 => + (case ((reg_name_matches_prefix s2621_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2622_0)) => + (case ((string_drop s2621_0 s2622_0)) of + s2623_0 => + (case ((sep_matches_prefix s2623_0)) of + SOME ((() , s2624_0)) => + (case ((string_drop s2623_0 s2624_0)) of + s2625_0 => + (case ((reg_name_matches_prefix s2625_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2626_0)) => + (case ((string_drop s2625_0 s2626_0)) of + s2627_0 => + (case ((sep_matches_prefix s2627_0)) of + SOME ((() , s2628_0)) => + (case ((string_drop s2627_0 s2628_0)) of + s2629_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s2629_0 : (( 12 words$word # ii)) option)) of + SOME ((imm, s2630_0)) => + (case ((string_drop s2629_0 s2630_0)) of + s_ => SOME (op, rd, rs1, imm, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2598_ : string -> maybe ((bop * mword ty5 * mword ty5 * mword ty13 * string))*) + +val _ = Define ` + ((s2598_:string ->(bop#(5)words$word#(5)words$word#(13)words$word#string)option) s2599_0= + ((case s2599_0 of + s2600_0 => + (case ((btype_mnemonic_matches_prefix s2600_0)) of + SOME ((op, s2601_0)) => + (case ((string_drop s2600_0 s2601_0)) of + s2602_0 => + (case ((spc_matches_prefix0 s2602_0)) of + SOME ((() , s2603_0)) => + (case ((string_drop s2602_0 s2603_0)) of + s2604_0 => + (case ((reg_name_matches_prefix s2604_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2605_0)) => + (case ((string_drop s2604_0 s2605_0)) of + s2606_0 => + (case ((sep_matches_prefix s2606_0)) of + SOME ((() , s2607_0)) => + (case ((string_drop s2606_0 s2607_0)) of + s2608_0 => + (case ((reg_name_matches_prefix s2608_0 : (( 5 words$word # ii)) option)) of + SOME ((rs2, s2609_0)) => + (case ((string_drop s2608_0 s2609_0)) of + s2610_0 => + (case ((sep_matches_prefix s2610_0)) of + SOME ((() , s2611_0)) => + (case ((string_drop s2610_0 s2611_0)) of + s2612_0 => + (case ((hex_bits_13_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s2612_0 : (( 13 words$word # ii)) option)) of + SOME ((imm, s2613_0)) => + (case ((string_drop s2612_0 s2613_0)) of + s_ => SOME (op, rs1, rs2, imm, s_) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +(*val _s2582_ : string -> maybe ((mword ty5 * mword ty5 * mword ty12 * string))*) + +val _ = Define ` + ((s2582_:string ->((5)words$word#(5)words$word#(12)words$word#string)option) s2583_0= + (let s2584_0 = s2583_0 in + if ((string_startswith s2584_0 "jalr")) then + (case ((string_drop s2584_0 ((string_length "jalr")))) of + s2585_0 => + (case ((spc_matches_prefix0 s2585_0)) of + SOME ((() , s2586_0)) => + (case ((string_drop s2585_0 s2586_0)) of + s2587_0 => + (case ((reg_name_matches_prefix s2587_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2588_0)) => + (case ((string_drop s2587_0 s2588_0)) of + s2589_0 => + (case ((sep_matches_prefix s2589_0)) of + SOME ((() , s2590_0)) => + (case ((string_drop s2589_0 s2590_0)) of + s2591_0 => + (case ((reg_name_matches_prefix s2591_0 : (( 5 words$word # ii)) option)) of + SOME ((rs1, s2592_0)) => + (case ((string_drop s2591_0 s2592_0)) of + s2593_0 => + (case ((sep_matches_prefix s2593_0)) of + SOME ((() , s2594_0)) => + (case ((string_drop s2593_0 s2594_0)) of + s2595_0 => + (case ((hex_bits_12_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2595_0 + : (( 12 words$word # ii)) option)) of + SOME ((imm, s2596_0)) => + (case ((string_drop s2595_0 s2596_0)) of s_ => SOME (rd, rs1, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2570_ : string -> maybe ((mword ty5 * mword ty21 * string))*) + +val _ = Define ` + ((s2570_:string ->((5)words$word#(21)words$word#string)option) s2571_0= + (let s2572_0 = s2571_0 in + if ((string_startswith s2572_0 "jal")) then + (case ((string_drop s2572_0 ((string_length "jal")))) of + s2573_0 => + (case ((spc_matches_prefix0 s2573_0)) of + SOME ((() , s2574_0)) => + (case ((string_drop s2573_0 s2574_0)) of + s2575_0 => + (case ((reg_name_matches_prefix s2575_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2576_0)) => + (case ((string_drop s2575_0 s2576_0)) of + s2577_0 => + (case ((sep_matches_prefix s2577_0)) of + SOME ((() , s2578_0)) => + (case ((string_drop s2577_0 s2578_0)) of + s2579_0 => + (case ((hex_bits_21_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict s2579_0 : (( 21 words$word # ii)) option)) of + SOME ((imm, s2580_0)) => + (case ((string_drop s2579_0 s2580_0)) of s_ => SOME (rd, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + else NONE))`; + + +(*val _s2557_ : string -> maybe ((uop * mword ty5 * mword ty20 * string))*) + +val _ = Define ` + ((s2557_:string ->(uop#(5)words$word#(20)words$word#string)option) s2558_0= + ((case s2558_0 of + s2559_0 => + (case ((utype_mnemonic_matches_prefix s2559_0)) of + SOME ((op, s2560_0)) => + (case ((string_drop s2559_0 s2560_0)) of + s2561_0 => + (case ((spc_matches_prefix0 s2561_0)) of + SOME ((() , s2562_0)) => + (case ((string_drop s2561_0 s2562_0)) of + s2563_0 => + (case ((reg_name_matches_prefix s2563_0 : (( 5 words$word # ii)) option)) of + SOME ((rd, s2564_0)) => + (case ((string_drop s2563_0 s2564_0)) of + s2565_0 => + (case ((sep_matches_prefix s2565_0)) of + SOME ((() , s2566_0)) => + (case ((string_drop s2565_0 s2566_0)) of + s2567_0 => + (case ((hex_bits_20_matches_prefix + instance_Sail2_values_Bitvector_Machine_word_mword_dict + s2567_0 : (( 20 words$word # ii)) option)) of + SOME ((imm, s2568_0)) => + (case ((string_drop s2567_0 s2568_0)) of s_ => SOME (op, rd, imm, s_) ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + ) + | _ => NONE + ) + )))`; + + +val _ = Define ` + ((assembly_matches_prefix:string ->(ast#int)option) arg_= + (let s2569_0 = arg_ in + if ((case ((s2557_ s2569_0 : ((uop # 5 words$word # 20 words$word # string))option)) of + SOME ((op, rd, imm, s_)) => T + | _ => F + )) then (case + (s2557_ s2569_0 : (( uop # 5 words$word # 20 words$word # string)) option) of + (SOME ((op, rd, imm, s_))) => + SOME (UTYPE (imm, rd, op), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2570_ s2569_0 : (( 5 words$word # 21 words$word # string))option)) of + SOME ((rd, imm, s_)) => T + | _ => F + )) then (case (s2570_ s2569_0 : (( 5 words$word # 21 words$word # string)) option) of + (SOME ((rd, imm, s_))) => + SOME (RISCV_JAL (imm, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2582_ s2569_0 : (( 5 words$word # 5 words$word # 12 words$word # string))option)) of + SOME ((rd, rs1, imm, s_)) => T + | _ => F + )) then (case + (s2582_ s2569_0 : (( 5 words$word # 5 words$word # 12 words$word # string)) option) of + (SOME ((rd, rs1, imm, s_))) => + SOME + (RISCV_JALR (imm, rs1, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2598_ s2569_0 : ((bop # 5 words$word # 5 words$word # 13 words$word # string))option)) of + SOME ((op, rs1, rs2, imm, s_)) => T + | _ => F + )) then (case + (s2598_ s2569_0 : (( bop # 5 words$word # 5 words$word # 13 words$word # string)) option) of + (SOME ((op, rs1, rs2, imm, s_))) => + SOME + (BTYPE (imm, rs2, rs1, op), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2615_ s2569_0 : ((iop # 5 words$word # 5 words$word # 12 words$word # string))option)) of + SOME ((op, rd, rs1, imm, s_)) => T + | _ => F + )) then (case + (s2615_ s2569_0 : (( iop # 5 words$word # 5 words$word # 12 words$word # string)) option) of + (SOME ((op, rd, rs1, imm, s_))) => + SOME + (ITYPE (imm, rs1, rd, op), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2632_ s2569_0 : ((sop # 5 words$word # 5 words$word # 6 words$word # string))option)) of + SOME ((op, rd, rs1, shamt, s_)) => T + | _ => F + )) then (case + (s2632_ s2569_0 : (( sop # 5 words$word # 5 words$word # 6 words$word # string)) option) of + (SOME ((op, rd, rs1, shamt, s_))) => + SOME + (SHIFTIOP (shamt, rs1, rd, op), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s2649_ s2569_0 : ((rop # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((op, rd, rs1, rs2, s_)) => T + | _ => F + )) then (case + (s2649_ s2569_0 : (( rop # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((op, rd, rs1, rs2, s_))) => + SOME + (RTYPE (rs2, rs1, rd, op), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2666_ s2569_0 + : ((word_width # bool # bool # bool # 5 words$word # 12 words$word # 5 words$word # string))option)) of + SOME ((size1, is_unsigned, aq, rl, rd, imm, rs1, s_)) => T + | _ => F + )) then (case + (s2666_ s2569_0 + : (( word_width # bool # bool # bool # 5 words$word # 12 words$word # 5 words$word # string)) option) of + (SOME ((size1, is_unsigned, aq, rl, rd, imm, rs1, s_))) => + SOME + (LOAD (imm, rs1, rd, is_unsigned, size1, aq, rl), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2696_ s2569_0 + : ((word_width # bool # bool # 5 words$word # 12 words$word # 5 words$word # string))option)) of + SOME ((size1, aq, rl, rs2, imm, rs1, s_)) => T + | _ => F + )) then (case + (s2696_ s2569_0 + : (( word_width # bool # bool # 5 words$word # 12 words$word # 5 words$word # string)) option) of + (SOME ((size1, aq, rl, rs2, imm, rs1, s_))) => + SOME + (STORE (imm, rs2, rs1, size1, aq, rl), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2724_ s2569_0 : (( 5 words$word # 5 words$word # 12 words$word # string))option)) of + SOME ((rd, rs1, imm, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2724_ s2569_0 : (( 5 words$word # 5 words$word # 12 words$word # string)) option) of + (SOME ((rd, rs1, imm, s_))) => + SOME (ADDIW (imm, rs1, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2740_ s2569_0 : ((sop # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((op, rd, rs1, shamt, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2740_ s2569_0 : (( sop # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((op, rd, rs1, shamt, s_))) => + SOME + (SHIFTW (shamt, rs1, rd, op), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s2757_ s2569_0 : ((ropw # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((op, rd, rs1, rs2, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2757_ s2569_0 : (( ropw # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((op, rd, rs1, rs2, s_))) => + SOME + (RTYPEW (rs2, rs1, rd, op), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2774_ s2569_0 : ((sopw # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((op, rd, rs1, shamt, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2774_ s2569_0 : (( sopw # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((op, rd, rs1, shamt, s_))) => + SOME + (SHIFTIWOP (shamt, rs1, rd, op), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s2791_ s2569_0 : (( 4 words$word # 4 words$word # string))option)) of + SOME ((pred, succ, s_)) => T + | _ => F + )) then (case (s2791_ s2569_0 : (( 4 words$word # 4 words$word # string)) option) of + (SOME ((pred, succ, s_))) => + SOME (FENCE (pred, succ), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2803_ s2569_0 : (( 4 words$word # 4 words$word # string))option)) of + SOME ((pred, succ, s_)) => T + | _ => F + )) then (case (s2803_ s2569_0 : (( 4 words$word # 4 words$word # string)) option) of + (SOME ((pred, succ, s_))) => + SOME (FENCE_TSO (pred, succ), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2815_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s2815_ s2569_0 of + (SOME (s_)) => + SOME (FENCEI () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2819_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s2819_ s2569_0 of + (SOME (s_)) => + SOME (ECALL () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2823_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s2823_ s2569_0 of + (SOME (s_)) => + SOME (MRET () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2827_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s2827_ s2569_0 of + (SOME (s_)) => + SOME (SRET () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2831_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s2831_ s2569_0 of + (SOME (s_)) => + SOME (EBREAK () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2835_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s2835_ s2569_0 of + (SOME (s_)) => + SOME (WFI () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2839_ s2569_0 : (( 5 words$word # 5 words$word # string))option)) of + SOME ((rs1, rs2, s_)) => T + | _ => F + )) then (case (s2839_ s2569_0 : (( 5 words$word # 5 words$word # string)) option) of + (SOME ((rs1, rs2, s_))) => + SOME (SFENCE_VMA (rs1, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2851_ s2569_0 + : ((word_width # bool # bool # 5 words$word # 5 words$word # string))option)) of + SOME ((size1, aq, rl, rd, rs1, s_)) => T + | _ => F + )) then (case + (s2851_ s2569_0 : (( word_width # bool # bool # 5 words$word # 5 words$word # string)) option) of + (SOME ((size1, aq, rl, rd, rs1, s_))) => + SOME + (LOADRES (aq, rl, rs1, size1, rd), ((string_length arg_)) - + ((string_length s_))) + ) + else if ((case ((s2869_ s2569_0 + : ((word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((size1, aq, rl, rd, rs1, rs2, s_)) => T + | _ => F + )) then (case + (s2869_ s2569_0 + : (( word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((size1, aq, rl, rd, rs1, rs2, s_))) => + SOME + (STORECON (aq, rl, rs2, rs1, size1, rd), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2891_ s2569_0 + : ((amoop # word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((op, width, aq, rl, rd, rs1, rs2, s_)) => T + | _ => F + )) then (case + (s2891_ s2569_0 + : (( amoop # word_width # bool # bool # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((op, width, aq, rl, rd, rs1, rs2, s_))) => + SOME + (AMO (op, aq, rl, rs2, rs1, width, rd), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2915_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s2915_ s2569_0 of + (SOME (s_)) => + SOME (C_NOP () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2919_ s2569_0 : (( 3 words$word # 8 words$word # string))option)) of + SOME ((rdc, nzimm, s_)) => (nzimm <> (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : 8 words$word)) + | _ => F + )) then (case (s2919_ s2569_0 : (( 3 words$word # 8 words$word # string)) option) of + (SOME ((rdc, nzimm, s_))) => + SOME + (C_ADDI4SPN (rdc, nzimm), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2931_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string))option)) of + SOME ((rdc, rsc, uimm, s_)) => T + | _ => F + )) then (case + (s2931_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string)) option) of + (SOME ((rdc, rsc, uimm, s_))) => + SOME (C_LW (uimm, rsc, rdc), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2947_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string))option)) of + SOME ((rdc, rsc, uimm, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2947_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string)) option) of + (SOME ((rdc, rsc, uimm, s_))) => + SOME (C_LD (uimm, rsc, rdc), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2963_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string))option)) of + SOME ((rsc1, rsc2, uimm, s_)) => T + | _ => F + )) then (case + (s2963_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string)) option) of + (SOME ((rsc1, rsc2, uimm, s_))) => + SOME + (C_SW (uimm, rsc1, rsc2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2979_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string))option)) of + SOME ((rsc1, rsc2, uimm, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s2979_ s2569_0 : (( 3 words$word # 3 words$word # 5 words$word # string)) option) of + (SOME ((rsc1, rsc2, uimm, s_))) => + SOME + (C_SD (uimm, rsc1, rsc2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s2995_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rsd, nzi, s_)) => + ((((nzi <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s2995_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rsd, nzi, s_))) => + SOME (C_ADDI (nzi, rsd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3007_ s2569_0 : (( 11 words$word # string))option)) of + SOME ((imm, s_)) => ((( 32 : int):ii) = (( 32 : int):ii)) + | _ => F + )) then (case (s3007_ s2569_0 : (( 11 words$word # string)) option) of + (SOME ((imm, s_))) => + SOME (C_JAL imm, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3015_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rsd, imm, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s3015_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rsd, imm, s_))) => + SOME (C_ADDIW (imm, rsd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3027_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rd, imm, s_)) => (((regidx_to_regno rd)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s3027_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rd, imm, s_))) => + SOME (C_LI (imm, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3039_ s2569_0 : (( 6 words$word # string))option)) of + SOME ((imm, s_)) => (imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s3039_ s2569_0 : (( 6 words$word # string)) option) of + (SOME ((imm, s_))) => + SOME (C_ADDI16SP imm, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3047_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rd, imm, s_)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((((((regidx_to_regno rd)) <> ((regidx_to_regno sp))))) /\ (((imm <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))))))) + | _ => F + )) then (case (s3047_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rd, imm, s_))) => + SOME (C_LUI (imm, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3059_ s2569_0 : (( 3 words$word # 6 words$word # string))option)) of + SOME ((rsd, shamt, s_)) => (shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s3059_ s2569_0 : (( 3 words$word # 6 words$word # string)) option) of + (SOME ((rsd, shamt, s_))) => + SOME (C_SRLI (shamt, rsd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3071_ s2569_0 : (( 3 words$word # 6 words$word # string))option)) of + SOME ((rsd, shamt, s_)) => (shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)) + | _ => F + )) then (case (s3071_ s2569_0 : (( 3 words$word # 6 words$word # string)) option) of + (SOME ((rsd, shamt, s_))) => + SOME (C_SRAI (shamt, rsd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3083_ s2569_0 : (( 3 words$word # 6 words$word # string))option)) of + SOME ((rsd, imm, s_)) => T + | _ => F + )) then (case (s3083_ s2569_0 : (( 3 words$word # 6 words$word # string)) option) of + (SOME ((rsd, imm, s_))) => + SOME (C_ANDI (imm, rsd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3095_ s2569_0 : (( 3 words$word # 3 words$word # string))option)) of + SOME ((rsd, rs2, s_)) => T + | _ => F + )) then (case (s3095_ s2569_0 : (( 3 words$word # 3 words$word # string)) option) of + (SOME ((rsd, rs2, s_))) => + SOME (C_SUB (rsd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3107_ s2569_0 : (( 3 words$word # 3 words$word # string))option)) of + SOME ((rsd, rs2, s_)) => T + | _ => F + )) then (case (s3107_ s2569_0 : (( 3 words$word # 3 words$word # string)) option) of + (SOME ((rsd, rs2, s_))) => + SOME (C_XOR (rsd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3119_ s2569_0 : (( 3 words$word # 3 words$word # string))option)) of + SOME ((rsd, rs2, s_)) => T + | _ => F + )) then (case (s3119_ s2569_0 : (( 3 words$word # 3 words$word # string)) option) of + (SOME ((rsd, rs2, s_))) => + SOME (C_OR (rsd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3131_ s2569_0 : (( 3 words$word # 3 words$word # string))option)) of + SOME ((rsd, rs2, s_)) => T + | _ => F + )) then (case (s3131_ s2569_0 : (( 3 words$word # 3 words$word # string)) option) of + (SOME ((rsd, rs2, s_))) => + SOME (C_AND (rsd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3143_ s2569_0 : (( 3 words$word # 3 words$word # string))option)) of + SOME ((rsd, rs2, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s3143_ s2569_0 : (( 3 words$word # 3 words$word # string)) option) of + (SOME ((rsd, rs2, s_))) => + SOME (C_SUBW (rsd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3155_ s2569_0 : (( 3 words$word # 3 words$word # string))option)) of + SOME ((rsd, rs2, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s3155_ s2569_0 : (( 3 words$word # 3 words$word # string)) option) of + (SOME ((rsd, rs2, s_))) => + SOME (C_ADDW (rsd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3167_ s2569_0 : (( 11 words$word # string))option)) of + SOME ((imm, s_)) => T + | _ => F + )) then (case (s3167_ s2569_0 : (( 11 words$word # string)) option) of + (SOME ((imm, s_))) => + SOME (C_J imm, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3175_ s2569_0 : (( 3 words$word # 8 words$word # string))option)) of + SOME ((rs, imm, s_)) => T + | _ => F + )) then (case (s3175_ s2569_0 : (( 3 words$word # 8 words$word # string)) option) of + (SOME ((rs, imm, s_))) => + SOME (C_BEQZ (imm, rs), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3187_ s2569_0 : (( 3 words$word # 8 words$word # string))option)) of + SOME ((rs, imm, s_)) => T + | _ => F + )) then (case (s3187_ s2569_0 : (( 3 words$word # 8 words$word # string)) option) of + (SOME ((rs, imm, s_))) => + SOME (C_BNEZ (imm, rs), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3199_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rsd, shamt, s_)) => + ((((shamt <> (vec_of_bits [B0;B0;B0;B0;B0;B0] : 6 words$word)))) /\ (((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s3199_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rsd, shamt, s_))) => + SOME (C_SLLI (shamt, rsd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3211_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rd, uimm, s_)) => (((regidx_to_regno rd)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s3211_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rd, uimm, s_))) => + SOME (C_LWSP (uimm, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3223_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rd, uimm, s_)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ ((((( 32 : int):ii) = (( 64 : int):ii))))) + | _ => F + )) then (case (s3223_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rd, uimm, s_))) => + SOME (C_LDSP (uimm, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3235_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rd, uimm, s_)) => T + | _ => F + )) then (case (s3235_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rd, uimm, s_))) => + SOME (C_SWSP (uimm, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3247_ s2569_0 : (( 5 words$word # 6 words$word # string))option)) of + SOME ((rs2, uimm, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case (s3247_ s2569_0 : (( 5 words$word # 6 words$word # string)) option) of + (SOME ((rs2, uimm, s_))) => + SOME (C_SDSP (uimm, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3259_ s2569_0 : (( 5 words$word # string))option)) of + SOME ((rs1, s_)) => (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s3259_ s2569_0 : (( 5 words$word # string)) option) of + (SOME ((rs1, s_))) => + SOME (C_JR rs1, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3267_ s2569_0 : (( 5 words$word # string))option)) of + SOME ((rs1, s_)) => (((regidx_to_regno rs1)) <> ((regidx_to_regno zreg))) + | _ => F + )) then (case (s3267_ s2569_0 : (( 5 words$word # string)) option) of + (SOME ((rs1, s_))) => + SOME (C_JALR rs1, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3275_ s2569_0 : (( 5 words$word # 5 words$word # string))option)) of + SOME ((rd, rs2, s_)) => + ((((((regidx_to_regno rd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s3275_ s2569_0 : (( 5 words$word # 5 words$word # string)) option) of + (SOME ((rd, rs2, s_))) => + SOME (C_MV (rd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3287_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s3287_ s2569_0 of + (SOME (s_)) => + SOME (C_EBREAK () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3291_ s2569_0 : (( 5 words$word # 5 words$word # string))option)) of + SOME ((rsd, rs2, s_)) => + ((((((regidx_to_regno rsd)) <> ((regidx_to_regno zreg))))) /\ (((((regidx_to_regno rs2)) <> ((regidx_to_regno zreg)))))) + | _ => F + )) then (case (s3291_ s2569_0 : (( 5 words$word # 5 words$word # string)) option) of + (SOME ((rsd, rs2, s_))) => + SOME (C_ADD (rsd, rs2), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3303_ s2569_0 + : ((bool # bool # bool # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((high, signed1, signed2, rd, rs1, rs2, s_)) => T + | _ => F + )) then (case + (s3303_ s2569_0 : (( bool # bool # bool # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((high, signed1, signed2, rd, rs1, rs2, s_))) => + SOME + (MUL (rs2, rs1, rd, high, signed1, signed2), + ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3320_ s2569_0 : ((bool # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((s, rd, rs1, rs2, s_)) => T + | _ => F + )) then (case + (s3320_ s2569_0 : (( bool # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((s, rd, rs1, rs2, s_))) => + SOME (DIV0 (rs2, rs1, rd, s), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3338_ s2569_0 : ((bool # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((s, rd, rs1, rs2, s_)) => T + | _ => F + )) then (case + (s3338_ s2569_0 : (( bool # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((s, rd, rs1, rs2, s_))) => + SOME (REM (rs2, rs1, rd, s), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3356_ s2569_0 : (( 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((rd, rs1, rs2, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s3356_ s2569_0 : (( 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((rd, rs1, rs2, s_))) => + SOME (MULW (rs2, rs1, rd), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3372_ s2569_0 : ((bool # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((s, rd, rs1, rs2, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s3372_ s2569_0 : (( bool # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((s, rd, rs1, rs2, s_))) => + SOME (DIVW (rs2, rs1, rd, s), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3391_ s2569_0 : ((bool # 5 words$word # 5 words$word # 5 words$word # string))option)) of + SOME ((s, rd, rs1, rs2, s_)) => ((( 32 : int):ii) = (( 64 : int):ii)) + | _ => F + )) then (case + (s3391_ s2569_0 : (( bool # 5 words$word # 5 words$word # 5 words$word # string)) option) of + (SOME ((s, rd, rs1, rs2, s_))) => + SOME (REMW (rs2, rs1, rd, s), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3410_ s2569_0 : ((csrop # 5 words$word # 5 words$word # 12 words$word # string))option)) of + SOME ((op, rd, rs1, csr, s_)) => T + | _ => F + )) then (case + (s3410_ s2569_0 : (( csrop # 5 words$word # 5 words$word # 12 words$word # string)) option) of + (SOME ((op, rd, rs1, csr, s_))) => + SOME + (CSR (csr, rs1, rd, T, op), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3428_ s2569_0 : ((csrop # 5 words$word # 5 words$word # 12 words$word # string))option)) of + SOME ((op, rd, rs1, csr, s_)) => T + | _ => F + )) then (case + (s3428_ s2569_0 : (( csrop # 5 words$word # 5 words$word # 12 words$word # string)) option) of + (SOME ((op, rd, rs1, csr, s_))) => + SOME + (CSR (csr, rs1, rd, F, op), ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3445_ s2569_0)) of SOME (s_) => T | _ => F )) then + (case s3445_ s2569_0 of + (SOME (s_)) => + SOME (URET () , ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3449_ s2569_0 : (( 32 words$word # string))option)) of + SOME ((s, s_)) => T + | _ => F + )) then (case (s3449_ s2569_0 : (( 32 words$word # string)) option) of + (SOME ((s, s_))) => + SOME (ILLEGAL s, ((string_length arg_)) - ((string_length s_))) + ) + else if ((case ((s3457_ s2569_0 : (( 16 words$word # string))option)) of + SOME ((s, s_)) => T + | _ => F + )) then (case (s3457_ s2569_0 : (( 16 words$word # string)) option) of + (SOME ((s, s_))) => + SOME (C_ILLEGAL s, ((string_length arg_)) - ((string_length s_))) + ) + else NONE))`; + + +val _ = Define ` + ((print_insn:ast ->(regstate)sail2_state_monad$sequential_state ->(((string),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) insn= (assembly_forwards insn))`; + + +(*val decode : mword ty32 -> M ast*) + +val _ = Define ` + ((decode:(32)words$word ->(regstate)sail2_state_monad$sequential_state ->(((ast),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) bv= (encdec_backwards bv))`; + + +(*val decodeCompressed : mword ty16 -> ast*) + +val _ = Define ` + ((decodeCompressed:(16)words$word -> ast) bv= (encdec_compressed_backwards bv))`; + + +(*val ext_init : unit -> unit*) + +val _ = Define ` + ((ext_init:unit -> unit) () = () )`; + + +(*val ext_fetch_hook : FetchResult -> FetchResult*) + +val _ = Define ` + ((ext_fetch_hook:FetchResult -> FetchResult) f= f)`; + + +(*val ext_pre_step_hook : unit -> unit*) + +val _ = Define ` + ((ext_pre_step_hook:unit -> unit) () = () )`; + + +(*val ext_post_step_hook : unit -> unit*) + +val _ = Define ` + ((ext_post_step_hook:unit -> unit) () = () )`; + + +(*val ext_post_decode_hook : ast -> M ast*) + +val _ = Define ` + ((ext_post_decode_hook:ast ->(regstate)sail2_state_monad$sequential_state ->(((ast),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) x= (sail2_state_monad$returnS x))`; + + +(*val isRVC : mword ty16 -> bool*) + +val _ = Define ` + ((isRVC:(16)words$word -> bool) h= + (~ (((((subrange_vec_dec h (( 1 : int):ii) (( 0 : int):ii) : 2 words$word)) = (vec_of_bits [B1;B1] : 2 words$word))))))`; + + +(*val fetch : unit -> M FetchResult*) + +val _ = Define ` + ((fetch:unit ->(regstate)sail2_state_monad$sequential_state ->(((FetchResult),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__0 : 32 words$word) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__1 : 32 words$word) . + (case ((ext_fetch_check_pc w__0 w__1)) of + Ext_FetchAddr_Error (e) => sail2_state_monad$returnS (F_Ext_Error e) + | Ext_FetchAddr_OK (use_pc) => sail2_state_monad$bindS + (sail2_state$or_boolS + (sail2_state_monad$returnS (((((cast_unit_vec0 ((access_vec_dec use_pc (( 0 : int):ii))) : 1 words$word)) <> (vec_of_bits [B0] : 1 words$word))))) + (sail2_state$and_boolS + (sail2_state_monad$returnS (((((cast_unit_vec0 ((access_vec_dec use_pc (( 1 : int):ii))) : 1 words$word)) <> (vec_of_bits [B0] : 1 words$word))))) + ( sail2_state_monad$bindS(haveRVC () ) (\ (w__2 : bool) . sail2_state_monad$returnS ((~ w__2)))))) (\ (w__4 : bool) . + if w__4 then sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__5 : 32 words$word) . + sail2_state_monad$returnS (F_Error (E_Fetch_Addr_Align, w__5))) + else sail2_state_monad$bindS + (translateAddr use_pc Execute : ( (( 32 words$word), ExceptionType)TR_Result) M) (\ (w__6 : (( 32 words$word), ExceptionType) + TR_Result) . + (case w__6 of + TR_Failure (e) => sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__7 : 32 words$word) . + sail2_state_monad$returnS (F_Error (e, w__7))) + | TR_Address (ppclo) => sail2_state_monad$bindS + (mem_read Execute ppclo (( 2 : int):ii) F F F : ( ( 16 words$word)MemoryOpResult) M) (\ (w__8 : ( 16 words$word) + MemoryOpResult) . + (case w__8 of + MemException (e) => sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__9 : 32 words$word) . + sail2_state_monad$returnS (F_Error (E_Fetch_Access_Fault, w__9))) + | MemValue (ilo) => + if ((isRVC ilo)) then sail2_state_monad$returnS (F_RVC ilo) + else sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__10 : 32 words$word) . + let (PC_hi : xlenbits) = ((add_vec_int w__10 (( 2 : int):ii) : 32 words$word)) in sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__11 : 32 words$word) . + (case ((ext_fetch_check_pc w__11 PC_hi)) of + Ext_FetchAddr_Error (e) => sail2_state_monad$returnS (F_Ext_Error e) + | Ext_FetchAddr_OK (use_pc_hi) => sail2_state_monad$bindS + (translateAddr use_pc_hi Execute : ( (( 32 words$word), ExceptionType)TR_Result) M) (\ (w__12 : (( 32 words$word), ExceptionType) + TR_Result) . + (case w__12 of + TR_Failure (e) => sail2_state_monad$returnS (F_Error (e, PC_hi)) + | TR_Address (ppchi) => sail2_state_monad$bindS + (mem_read Execute ppchi (( 2 : int):ii) F F F + : ( ( 16 words$word)MemoryOpResult) M) (\ (w__13 : ( 16 words$word) + MemoryOpResult) . + sail2_state_monad$returnS ((case w__13 of + MemException (e) => F_Error (E_Fetch_Access_Fault, PC_hi) + | MemValue (ihi) => F_Base ((concat_vec ihi ilo : 32 words$word)) + ))) + )) + ))) + )) + ))) + )))))`; + + +(*val step : ii -> M bool*) + +val _ = Define ` + ((step:int ->(regstate)sail2_state_monad$sequential_state ->(((bool),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) step_no= + (let (_ : unit) = (ext_pre_step_hook () ) in sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS minstret_written_ref F) + (sail2_state_monad$read_regS cur_privilege_ref)) (\ (w__0 : Privilege) . sail2_state_monad$bindS + (dispatchInterrupt w__0) (\ (w__1 : ((InterruptType # Privilege))option) . sail2_state_monad$bindS + (case w__1 of + SOME ((intr, priv)) => + let (_ : unit) = + (if ((get_config_print_instr () )) then + print_bits0 "Handling interrupt: " ((interruptType_to_bits intr : 8 words$word)) + else () ) in sail2_state_monad$seqS + (handle_interrupt intr priv) (sail2_state_monad$returnS (RETIRE_FAIL, F)) + | NONE => sail2_state_monad$bindS + (fetch () ) (\ (w__2 : FetchResult) . + let (f : FetchResult) = (ext_fetch_hook w__2) in + (case f of + F_Ext_Error (e) => + let (_ : unit) = (ext_handle_fetch_check_error e) in + sail2_state_monad$returnS (RETIRE_FAIL, F) + | F_Error ((e, addr)) => sail2_state_monad$seqS (handle_mem_exception addr e) (sail2_state_monad$returnS (RETIRE_FAIL, F)) + | F_RVC (h) => + let ast = (decodeCompressed h) in sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_instr () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__3 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__4 : 32 words$word) . sail2_state_monad$bindS + (print_insn ast) (\ (w__5 : string) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "[" + ((STRCAT ((stringFromInteger step_no)) + ((STRCAT "] [" + ((STRCAT ((privLevel_to_str w__3)) + ((STRCAT "]: " + ((STRCAT ((string_of_bits w__4)) + ((STRCAT " (" + ((STRCAT ((string_of_bits h)) + ((STRCAT ") " w__5))))))))))))))))))))))) + else sail2_state_monad$returnS () ) + (haveRVC () )) (\ (w__6 : bool) . + if w__6 then sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__7 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS nextPC_ref ((add_vec_int w__7 (( 2 : int):ii) : 32 words$word))) + (ext_post_decode_hook ast)) (\ (w__8 : ast) . sail2_state_monad$bindS + (execute w__8) (\ (w__9 : Retired) . sail2_state_monad$returnS (w__9, T)))) + else sail2_state_monad$seqS (handle_illegal () ) (sail2_state_monad$returnS (RETIRE_FAIL, T))) + | F_Base (w) => sail2_state_monad$bindS + (decode w) (\ ast . sail2_state_monad$bindS (sail2_state_monad$seqS + (if ((get_config_print_instr () )) then sail2_state_monad$bindS + (sail2_state_monad$read_regS cur_privilege_ref) (\ (w__11 : Privilege) . sail2_state_monad$bindS + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M) (\ (w__12 : 32 words$word) . sail2_state_monad$bindS + (print_insn ast) (\ (w__13 : string) . + sail2_state_monad$returnS ((print_dbg + ((STRCAT "[" + ((STRCAT ((stringFromInteger step_no)) + ((STRCAT "] [" + ((STRCAT ((privLevel_to_str w__11)) + ((STRCAT "]: " + ((STRCAT ((string_of_bits w__12)) + ((STRCAT " (" + ((STRCAT ((string_of_bits w)) + ((STRCAT ") " w__13))))))))))))))))))))))) + else sail2_state_monad$returnS () ) + (sail2_state_monad$read_regS PC_ref : ( 32 words$word) M)) (\ (w__14 : 32 words$word) . sail2_state_monad$bindS (sail2_state_monad$seqS + (sail2_state_monad$write_regS nextPC_ref ((add_vec_int w__14 (( 4 : int):ii) : 32 words$word))) + (ext_post_decode_hook ast)) (\ (w__15 : ast) . sail2_state_monad$bindS + (execute w__15) (\ (w__16 : Retired) . sail2_state_monad$returnS (w__16, T))))) + )) + ) (\ varstup . let ((retired : Retired), (stepped : bool)) = varstup in sail2_state_monad$seqS (sail2_state_monad$seqS + (tick_pc () ) + (case retired of RETIRE_SUCCESS => retire_instruction () | RETIRE_FAIL => sail2_state_monad$returnS () )) + (let (_ : unit) = (ext_post_step_hook () ) in + sail2_state_monad$returnS stepped))))))`; + + +(*val loop : unit -> M unit*) + +val _ = Define ` + ((loop:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = + (let insns_per_tick = (plat_insns_per_tick () ) in + let (i : ii) = ((( 0 : int):ii)) in + let (step_no : ii) = ((( 0 : int):ii)) in sail2_state_monad$bindS + (sail2_state$whileS (i, step_no) + (\ varstup . let (i, step_no) = varstup in sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_done_ref) (\ (w__0 : bool) . sail2_state_monad$returnS ((~ w__0)))) + (\ varstup . let (i, step_no) = varstup in sail2_state_monad$bindS + (step step_no) (\ stepped . + let (step_no : ii) = (if stepped then step_no + (( 1 : int):ii) else step_no) in sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_done_ref) (\ (w__1 : bool) . sail2_state_monad$bindS + (if w__1 then sail2_state_monad$bindS + (sail2_state_monad$read_regS htif_exit_code_ref : ( 64 words$word) M) (\ (w__2 : 64 words$word) . + let exit_val = (lem$w2ui w__2) in + sail2_state_monad$returnS (let _ = + (if (((exit_val = (( 0 : int):ii)))) then print_endline "SUCCESS" + else print_int "FAILURE: " exit_val) in + i)) + else + let i = (i + (( 1 : int):ii)) in + if (((i = insns_per_tick))) then sail2_state_monad$seqS (sail2_state_monad$seqS (tick_clock () ) (tick_platform () )) (sail2_state_monad$returnS (( 0 : int):ii)) + else sail2_state_monad$returnS i) (\ (i : ii) . + sail2_state_monad$returnS (i, step_no)))))) (\ varstup . let ((i : ii), (step_no : ii)) = varstup in + sail2_state_monad$returnS () )))`; + + +(*val init_model : unit -> M unit*) + +val _ = Define ` + ((init_model:unit ->(regstate)sail2_state_monad$sequential_state ->(((unit),(exception))sail2_state_monad$result#(regstate)sail2_state_monad$sequential_state)set) () = (sail2_state_monad$seqS (sail2_state_monad$seqS (sail2_state_monad$seqS + (init_platform () ) + (init_sys () )) + (init_vmem () )) + (let (_ : unit) = (ext_init () ) in + ext_init_regs () )))`; + + + +val _ = export_theory() + diff --git a/prover_snapshots/hol4/RV32/riscv_extrasScript.sml b/prover_snapshots/hol4/RV32/riscv_extrasScript.sml new file mode 100644 index 0000000..c6d4fe2 --- /dev/null +++ b/prover_snapshots/hol4/RV32/riscv_extrasScript.sml @@ -0,0 +1,276 @@ +(*Generated by Lem from handwritten_support/riscv_extras.lem.*) +open HolKernel Parse boolLib bossLib; +open lem_pervasivesTheory lem_pervasives_extraTheory sail2_instr_kindsTheory sail2_valuesTheory sail2_prompt_monadTheory sail2_operators_mwordsTheory sail2_promptTheory; + +val _ = numLib.prefer_num(); + + + +val _ = new_theory "riscv_extras" + +(*open import Pervasives*) +(*open import Pervasives_extra*) +(*open import Sail2_instr_kinds*) +(*open import Sail2_values*) +(*open import Sail2_operators_mwords*) +(*open import Sail2_prompt_monad*) +(*open import Sail2_prompt*) + +val _ = type_abbrev((* 'a *) "bitvector" , ``: 'a words$word``); + +val _ = Define ` + ((MEM_fence_rw_rw:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_rw_rw))`; + +val _ = Define ` + ((MEM_fence_r_rw:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_r_rw))`; + +val _ = Define ` + ((MEM_fence_r_r:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_r_r))`; + +val _ = Define ` + ((MEM_fence_rw_w:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_rw_w))`; + +val _ = Define ` + ((MEM_fence_w_w:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_w_w))`; + +val _ = Define ` + ((MEM_fence_w_rw:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_w_rw))`; + +val _ = Define ` + ((MEM_fence_rw_r:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_rw_r))`; + +val _ = Define ` + ((MEM_fence_r_w:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_r_w))`; + +val _ = Define ` + ((MEM_fence_w_r:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_w_r))`; + +val _ = Define ` + ((MEM_fence_tso:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_tso))`; + +val _ = Define ` + ((MEM_fence_i:unit -> 'b sail2_state_monad$sequential_state ->(((unit),'a)sail2_state_monad$result#'b sail2_state_monad$sequential_state)set) () = (barrier Barrier_RISCV_i))`; + + +(*val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e*) +(*val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e*) +(*val MEMea_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e*) +(*val MEMea_conditional : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e*) +(*val MEMea_conditional_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e*) +(*val MEMea_conditional_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e*) + +val _ = Define ` + ((MEMea:'a words$word -> int -> 'rv sail2_state_monad$sequential_state ->(((unit),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addr size1= (sail2_state_monad$returnS () ))`; + +val _ = Define ` + ((MEMea_release:'a words$word -> int -> 'rv sail2_state_monad$sequential_state ->(((unit),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addr size1= (sail2_state_monad$returnS () ))`; + +val _ = Define ` + ((MEMea_strong_release:'a words$word -> int -> 'rv sail2_state_monad$sequential_state ->(((unit),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addr size1= (sail2_state_monad$returnS () ))`; + +val _ = Define ` + ((MEMea_conditional:'a words$word -> int -> 'rv sail2_state_monad$sequential_state ->(((unit),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addr size1= (sail2_state_monad$returnS () ))`; + +val _ = Define ` + ((MEMea_conditional_release:'a words$word -> int -> 'rv sail2_state_monad$sequential_state ->(((unit),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addr size1= (sail2_state_monad$returnS () ))`; + +val _ = Define ` + ((MEMea_conditional_strong_release:'a words$word -> int -> 'rv sail2_state_monad$sequential_state ->(((unit),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addr size1= + (sail2_state_monad$returnS () ))`; + + +(*val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e*) +(*val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e*) +(*val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e*) +(*val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e*) +(*val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e*) +(*val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e*) + +val _ = Define ` + ((MEMr:int -> int -> 'a words$word -> 'a words$word -> 'rv sail2_state_monad$sequential_state ->((('b words$word),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addrsize size1 hexRAM addr= (sail2_state_monad$read_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Read_plain addrsize addr size1))`; + +val _ = Define ` + ((MEMr_acquire:int -> int -> 'a words$word -> 'a words$word -> 'rv sail2_state_monad$sequential_state ->((('b words$word),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addrsize size1 hexRAM addr= (sail2_state_monad$read_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Read_RISCV_acquire addrsize addr size1))`; + +val _ = Define ` + ((MEMr_strong_acquire:int -> int -> 'a words$word -> 'a words$word -> 'rv sail2_state_monad$sequential_state ->((('b words$word),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addrsize size1 hexRAM addr= (sail2_state_monad$read_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Read_RISCV_strong_acquire addrsize addr size1))`; + +val _ = Define ` + ((MEMr_reserved:int -> int -> 'a words$word -> 'a words$word -> 'rv sail2_state_monad$sequential_state ->((('b words$word),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addrsize size1 hexRAM addr= (sail2_state_monad$read_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Read_RISCV_reserved addrsize addr size1))`; + +val _ = Define ` + ((MEMr_reserved_acquire:int -> int -> 'a words$word -> 'a words$word -> 'rv sail2_state_monad$sequential_state ->((('b words$word),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addrsize size1 hexRAM addr= (sail2_state_monad$read_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Read_RISCV_reserved_acquire addrsize addr size1))`; + +val _ = Define ` + ((MEMr_reserved_strong_acquire:int -> int -> 'a words$word -> 'a words$word -> 'rv sail2_state_monad$sequential_state ->((('b words$word),'e)sail2_state_monad$result#'rv sail2_state_monad$sequential_state)set) addrsize size1 hexRAM addr= (sail2_state_monad$read_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Read_RISCV_reserved_strong_acquire addrsize addr size1))`; + + +(*val MEMw : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e*) +(*val MEMw_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e*) +(*val MEMw_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e*) +(*val MEMw_conditional : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e*) +(*val MEMw_conditional_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e*) +(*val MEMw_conditional_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e*) + +val _ = Define ` + ((MEMw:int -> int -> 'a words$word -> 'a words$word -> 'b words$word ->('rv,(bool),'e)sail2_state_monad$monadS) addrsize size1 hexRAM addr= (sail2_state_monad$write_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Write_plain addrsize addr size1))`; + +val _ = Define ` + ((MEMw_release:int -> int -> 'a words$word -> 'a words$word -> 'b words$word ->('rv,(bool),'e)sail2_state_monad$monadS) addrsize size1 hexRAM addr= (sail2_state_monad$write_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Write_RISCV_release addrsize addr size1))`; + +val _ = Define ` + ((MEMw_strong_release:int -> int -> 'a words$word -> 'a words$word -> 'b words$word ->('rv,(bool),'e)sail2_state_monad$monadS) addrsize size1 hexRAM addr= (sail2_state_monad$write_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Write_RISCV_strong_release addrsize addr size1))`; + +val _ = Define ` + ((MEMw_conditional:int -> int -> 'a words$word -> 'a words$word -> 'b words$word ->('rv,(bool),'e)sail2_state_monad$monadS) addrsize size1 hexRAM addr= (sail2_state_monad$write_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Write_RISCV_conditional addrsize addr size1))`; + +val _ = Define ` + ((MEMw_conditional_release:int -> int -> 'a words$word -> 'a words$word -> 'b words$word ->('rv,(bool),'e)sail2_state_monad$monadS) addrsize size1 hexRAM addr= (sail2_state_monad$write_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Write_RISCV_conditional_release addrsize addr size1))`; + +val _ = Define ` + ((MEMw_conditional_strong_release:int -> int -> 'a words$word -> 'a words$word -> 'b words$word ->('rv,(bool),'e)sail2_state_monad$monadS) addrsize size1 hexRAM addr= (sail2_state_monad$write_memS + instance_Sail2_values_Bitvector_Machine_word_mword_dict instance_Sail2_values_Bitvector_Machine_word_mword_dict Write_RISCV_conditional_strong_release addrsize addr size1))`; + + +(*val load_reservation : forall 'a. Size 'a => bitvector 'a -> unit*) +val _ = Define ` + ((load_reservation:'a words$word -> unit) addr= () )`; + + +val _ = Define ` + ((speculate_conditional_success:unit -> 'a sail2_state_monad$sequential_state ->(((bool),'b)sail2_state_monad$result#'a sail2_state_monad$sequential_state)set) () = (sail2_state_monad$excl_resultS () ))`; + + +val _ = Define ` + ((match_reservation:'a -> bool) _= T)`; + +val _ = Define ` + ((cancel_reservation:unit -> unit) () = () )`; + + +(*val sys_enable_writable_misa : unit -> bool*) +val _ = Define ` + ((sys_enable_writable_misa:unit -> bool) () = T)`; + + +(*val sys_enable_rvc : unit -> bool*) +val _ = Define ` + ((sys_enable_rvc:unit -> bool) () = T)`; + + +(*val plat_ram_base : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_ram_base:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val plat_ram_size : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_ram_size:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val plat_rom_base : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_rom_base:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val plat_rom_size : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_rom_size:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val plat_clint_base : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_clint_base:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val plat_clint_size : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_clint_size:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val plat_enable_dirty_update : unit -> bool*) +val _ = Define ` + ((plat_enable_dirty_update:unit -> bool) () = F)`; + + +(*val plat_enable_misaligned_access : unit -> bool*) +val _ = Define ` + ((plat_enable_misaligned_access:unit -> bool) () = F)`; + + +(*val plat_enable_pmp : unit -> bool*) +val _ = Define ` + ((plat_enable_pmp:unit -> bool) () = F)`; + + +(*val plat_mtval_has_illegal_inst_bits : unit -> bool*) +val _ = Define ` + ((plat_mtval_has_illegal_inst_bits:unit -> bool) () = F)`; + + +(*val plat_insns_per_tick : unit -> integer*) +val _ = Define ` + ((plat_insns_per_tick:unit -> int) () = (( 1 : int)))`; + + +(*val plat_htif_tohost : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_htif_tohost:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val plat_term_write : forall 'a. Size 'a => bitvector 'a -> unit*) +val _ = Define ` + ((plat_term_write:'a words$word -> unit) _= () )`; + + +(*val plat_term_read : forall 'a. Size 'a => unit -> bitvector 'a*) +val _ = Define ` + ((plat_term_read:unit -> 'a words$word) () = (integer_word$i2w(( 0 : int))))`; + + +(*val shift_bits_right : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a*) +val _ = Define ` + ((shift_bits_right:'a words$word -> 'b words$word -> 'a words$word) v m= (shiftr v (lem$w2ui m)))`; + +(*val shift_bits_left : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a*) +val _ = Define ` + ((shift_bits_left:'a words$word -> 'b words$word -> 'a words$word) v m= (shiftl v (lem$w2ui m)))`; + + +(*val print_string : string -> string -> unit*) +val _ = Define ` + ((print_string:string -> string -> unit) msg s= () )`; + (* print_endline (msg ^ s) *) + +(*val prerr_string : string -> string -> unit*) +val _ = Define ` + ((prerr_string:string -> string -> unit) msg s= (prerr_endline ( STRCAT msg s)))`; + + +(*val prerr_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit*) +val _ = Define ` + ((prerr_bits:string -> 'a words$word -> unit) msg bs= (prerr_endline ( STRCAT msg (show_bitlist (MAP bitU_of_bool (bitstring$w2v bs))))))`; + + +(*val print_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit*) +val _ = Define ` + ((print_bits0:string -> 'a words$word -> unit) msg bs= () )`; + (* print_endline (msg ^ (show_bitlist (bits_of bs))) *) + +(*val print_dbg : string -> unit*) +val _ = Define ` + ((print_dbg:string -> unit) msg= () )`; + +val _ = export_theory() + diff --git a/prover_snapshots/hol4/RV32/riscv_typesScript.sml b/prover_snapshots/hol4/RV32/riscv_typesScript.sml new file mode 100644 index 0000000..14b1a48 --- /dev/null +++ b/prover_snapshots/hol4/RV32/riscv_typesScript.sml @@ -0,0 +1,2208 @@ +(*Generated by Lem from generated_definitions/lem/RV32/riscv_types.lem.*) +open HolKernel Parse boolLib bossLib; +open lem_pervasives_extraTheory sail2_instr_kindsTheory sail2_valuesTheory sail2_prompt_monadTheory sail2_operators_mwordsTheory sail2_promptTheory sail2_stringTheory; + +val _ = numLib.prefer_num(); + + + +val _ = new_theory "riscv_types" + +(*Generated by Sail from riscv.*) +(*open import Pervasives_extra*) +(*open import Sail2_instr_kinds*) +(*open import Sail2_values*) +(*open import Sail2_string*) +(*open import Sail2_operators_mwords*) +(*open import Sail2_prompt_monad*) +(*open import Sail2_prompt*) + + +val _ = type_abbrev((* 'n *) "bits" , ``: 'n words$word``); + +val _ = Hol_datatype ` + regfp = + RFull of (string) + | RSlice of ((string # ii # ii)) + | RSliceBit of ((string # ii)) + | RField of ((string # string))`; + + + + +val _ = type_abbrev( "regfps" , ``: regfp list``); + +val _ = Hol_datatype ` + niafp = + NIAFP_successor of (unit) + | NIAFP_concrete_address of ( 64 bits) + | NIAFP_indirect_address of (unit)`; + + + + +val _ = type_abbrev( "niafps" , ``: niafp list``); + +val _ = Hol_datatype ` + diafp = DIAFP_none of (unit) | DIAFP_concrete of ( 64 bits) | DIAFP_reg of (regfp)`; + + + + + + + + + + + + + + + + + + + + +val _ = type_abbrev( "xlenbits" , ``: 32 bits``); + +val _ = type_abbrev( "mem_meta" , ``: unit``); + + + +val _ = type_abbrev( "half" , ``: 16 bits``); + +val _ = type_abbrev( "word" , ``: 32 bits``); + +val _ = type_abbrev( "regidx" , ``: 5 bits``); + +val _ = type_abbrev( "cregidx" , ``: 3 bits``); + +val _ = type_abbrev( "csreg" , ``: 12 bits``); + +val _ = type_abbrev((* 'n *) "regno" , ``: int``); + +val _ = type_abbrev( "opcode" , ``: 7 bits``); + +val _ = type_abbrev( "imm12" , ``: 12 bits``); + +val _ = type_abbrev( "imm20" , ``: 20 bits``); + +val _ = type_abbrev( "amo" , ``: 1 bits``); + +val _ = Hol_datatype ` + Architecture = RV32 | RV64 | RV128`; + + + + +val _ = type_abbrev( "arch_xlen" , ``: 2 bits``); + +val _ = type_abbrev( "priv_level" , ``: 2 bits``); + +val _ = Hol_datatype ` + Privilege = User | Supervisor | Machine`; + + + + +val _ = Hol_datatype ` + amoop = AMOSWAP | AMOADD | AMOXOR | AMOAND | AMOOR | AMOMIN | AMOMAX | AMOMINU | AMOMAXU`; + + + + +val _ = Hol_datatype ` + bop = RISCV_BEQ | RISCV_BNE | RISCV_BLT | RISCV_BGE | RISCV_BLTU | RISCV_BGEU`; + + + + +val _ = Hol_datatype ` + csrop = CSRRW | CSRRS | CSRRC`; + + + + +val _ = Hol_datatype ` + iop = RISCV_ADDI | RISCV_SLTI | RISCV_SLTIU | RISCV_XORI | RISCV_ORI | RISCV_ANDI`; + + + + +val _ = Hol_datatype ` + rop = + RISCV_ADD + | RISCV_SUB + | RISCV_SLL + | RISCV_SLT + | RISCV_SLTU + | RISCV_XOR + | RISCV_SRL + | RISCV_SRA + | RISCV_OR + | RISCV_AND`; + + + + +val _ = Hol_datatype ` + ropw = RISCV_ADDW | RISCV_SUBW | RISCV_SLLW | RISCV_SRLW | RISCV_SRAW`; + + + + +val _ = Hol_datatype ` + sop = RISCV_SLLI | RISCV_SRLI | RISCV_SRAI`; + + + + +val _ = Hol_datatype ` + sopw = RISCV_SLLIW | RISCV_SRLIW | RISCV_SRAIW`; + + + + +val _ = Hol_datatype ` + uop = RISCV_LUI | RISCV_AUIPC`; + + + + +val _ = Hol_datatype ` + word_width = BYTE | HALF | WORD | DOUBLE`; + + + + +val _ = Hol_datatype ` + ast = + UTYPE of (( 20 bits # regidx # uop)) + | RISCV_JAL of (( 21 bits # regidx)) + | RISCV_JALR of (( 12 bits # regidx # regidx)) + | BTYPE of (( 13 bits # regidx # regidx # bop)) + | ITYPE of (( 12 bits # regidx # regidx # iop)) + | SHIFTIOP of (( 6 bits # regidx # regidx # sop)) + | RTYPE of ((regidx # regidx # regidx # rop)) + | LOAD of (( 12 bits # regidx # regidx # bool # word_width # bool # bool)) + | STORE of (( 12 bits # regidx # regidx # word_width # bool # bool)) + | ADDIW of (( 12 bits # regidx # regidx)) + | SHIFTW of (( 5 bits # regidx # regidx # sop)) + | RTYPEW of ((regidx # regidx # regidx # ropw)) + | SHIFTIWOP of (( 5 bits # regidx # regidx # sopw)) + | FENCE of (( 4 bits # 4 bits)) + | FENCE_TSO of (( 4 bits # 4 bits)) + | FENCEI of (unit) + | ECALL of (unit) + | MRET of (unit) + | SRET of (unit) + | EBREAK of (unit) + | WFI of (unit) + | SFENCE_VMA of ((regidx # regidx)) + | LOADRES of ((bool # bool # regidx # word_width # regidx)) + | STORECON of ((bool # bool # regidx # regidx # word_width # regidx)) + | AMO of ((amoop # bool # bool # regidx # regidx # word_width # regidx)) + | C_NOP of (unit) + | C_ADDI4SPN of ((cregidx # 8 bits)) + | C_LW of (( 5 bits # cregidx # cregidx)) + | C_LD of (( 5 bits # cregidx # cregidx)) + | C_SW of (( 5 bits # cregidx # cregidx)) + | C_SD of (( 5 bits # cregidx # cregidx)) + | C_ADDI of (( 6 bits # regidx)) + | C_JAL of ( 11 bits) + | C_ADDIW of (( 6 bits # regidx)) + | C_LI of (( 6 bits # regidx)) + | C_ADDI16SP of ( 6 bits) + | C_LUI of (( 6 bits # regidx)) + | C_SRLI of (( 6 bits # cregidx)) + | C_SRAI of (( 6 bits # cregidx)) + | C_ANDI of (( 6 bits # cregidx)) + | C_SUB of ((cregidx # cregidx)) + | C_XOR of ((cregidx # cregidx)) + | C_OR of ((cregidx # cregidx)) + | C_AND of ((cregidx # cregidx)) + | C_SUBW of ((cregidx # cregidx)) + | C_ADDW of ((cregidx # cregidx)) + | C_J of ( 11 bits) + | C_BEQZ of (( 8 bits # cregidx)) + | C_BNEZ of (( 8 bits # cregidx)) + | C_SLLI of (( 6 bits # regidx)) + | C_LWSP of (( 6 bits # regidx)) + | C_LDSP of (( 6 bits # regidx)) + | C_SWSP of (( 6 bits # regidx)) + | C_SDSP of (( 6 bits # regidx)) + | C_JR of (regidx) + | C_JALR of (regidx) + | C_MV of ((regidx # regidx)) + | C_EBREAK of (unit) + | C_ADD of ((regidx # regidx)) + | MUL of ((regidx # regidx # regidx # bool # bool # bool)) + | DIV0 of ((regidx # regidx # regidx # bool)) + | REM of ((regidx # regidx # regidx # bool)) + | MULW of ((regidx # regidx # regidx)) + | DIVW of ((regidx # regidx # regidx # bool)) + | REMW of ((regidx # regidx # regidx # bool)) + | CSR of (( 12 bits # regidx # regidx # bool # csrop)) + | URET of (unit) + | ILLEGAL of (word) + | C_ILLEGAL of (half)`; + + + + +val _ = Hol_datatype ` + Retired = RETIRE_SUCCESS | RETIRE_FAIL`; + + + + +val _ = Hol_datatype ` + AccessType = Read | Write | ReadWrite | Execute`; + + + + +val _ = type_abbrev( "exc_code" , ``: 8 bits``); + +val _ = Hol_datatype ` + InterruptType = + I_U_Software + | I_S_Software + | I_M_Software + | I_U_Timer + | I_S_Timer + | I_M_Timer + | I_U_External + | I_S_External + | I_M_External`; + + + + +val _ = Hol_datatype ` + ExceptionType = + E_Fetch_Addr_Align + | E_Fetch_Access_Fault + | E_Illegal_Instr + | E_Breakpoint + | E_Load_Addr_Align + | E_Load_Access_Fault + | E_SAMO_Addr_Align + | E_SAMO_Access_Fault + | E_U_EnvCall + | E_S_EnvCall + | E_Reserved_10 + | E_M_EnvCall + | E_Fetch_Page_Fault + | E_Load_Page_Fault + | E_Reserved_14 + | E_SAMO_Page_Fault + | E_CHERI`; + + + + +val _ = Hol_datatype ` + exception = Error_not_implemented of (string) | Error_internal_error of (unit)`; + + + + +val _ = type_abbrev( "tv_mode" , ``: 2 bits``); + +val _ = Hol_datatype ` + TrapVectorMode = TV_Direct | TV_Vector | TV_Reserved`; + + + + +val _ = type_abbrev( "ext_status" , ``: 2 bits``); + +val _ = Hol_datatype ` + ExtStatus = Off | Initial | Clean | Dirty`; + + + + +val _ = type_abbrev( "satp_mode" , ``: 4 bits``); + +val _ = Hol_datatype ` + SATPMode = Sbare | Sv32 | Sv39 | Sv48`; + + + + +val _ = type_abbrev( "csrRW" , ``: 2 bits``); + +val _ = type_abbrev( "regtype" , ``: xlenbits``); + +val _ = Hol_datatype ` + Misa = <| Misa_Misa_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + SV48_PTE = <| SV48_PTE_SV48_PTE_chunk_0 : 64 words$word |>`; + + + +val _ = Hol_datatype ` + PTE_Bits = <| PTE_Bits_PTE_Bits_chunk_0 : 8 words$word |>`; + + + +val _ = Hol_datatype ` + Pmpcfg_ent = <| Pmpcfg_ent_Pmpcfg_ent_chunk_0 : 8 words$word |>`; + + + +val _ = Hol_datatype ` + Mstatus = <| Mstatus_Mstatus_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Sstatus = <| Sstatus_Sstatus_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Ustatus = <| Ustatus_Ustatus_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Minterrupts = <| Minterrupts_Minterrupts_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Sinterrupts = <| Sinterrupts_Sinterrupts_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Uinterrupts = <| Uinterrupts_Uinterrupts_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Medeleg = <| Medeleg_Medeleg_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Sedeleg = <| Sedeleg_Sedeleg_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Mtvec = <| Mtvec_Mtvec_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Satp32 = <| Satp32_Satp32_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Mcause = <| Mcause_Mcause_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Counteren = <| Counteren_Counteren_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + Satp64 = <| Satp64_Satp64_chunk_0 : 64 words$word |>`; + + + +val _ = Hol_datatype ` + PmpAddrMatchType = OFF | TOR | NA4 | NAPOT`; + + + + +val _ = type_abbrev( "pmp_addr_range" , ``: ((xlenbits # xlenbits))option``); + +val _ = Hol_datatype ` + pmpAddrMatch = PMP_NoMatch | PMP_PartialMatch | PMP_Match`; + + + + +val _ = Hol_datatype ` + pmpMatch = PMP_Success | PMP_Continue | PMP_Fail`; + + + + +val _ = Hol_datatype ` + Ext_FetchAddr_Check = Ext_FetchAddr_OK of (xlenbits) | Ext_FetchAddr_Error of ('a)`; + + + + +val _ = Hol_datatype ` + Ext_ControlAddr_Check = Ext_ControlAddr_OK of (xlenbits) | Ext_ControlAddr_Error of ('a)`; + + + + +val _ = Hol_datatype ` + Ext_DataAddr_Check = Ext_DataAddr_OK of (xlenbits) | Ext_DataAddr_Error of ('a)`; + + + + +val _ = type_abbrev( "ext_fetch_addr_error" , ``: unit``); + +val _ = type_abbrev( "ext_control_addr_error" , ``: unit``); + +val _ = type_abbrev( "ext_data_addr_error" , ``: unit``); + +val _ = type_abbrev( "ext_exception" , ``: unit``); + +val _ = Hol_datatype ` + sync_exception = + <| sync_exception_trap : ExceptionType; + sync_exception_excinfo : xlenbits option; + sync_exception_ext : ext_exception option |>`; + + + +val _ = Hol_datatype ` + interrupt_set = + Ints_Pending of (xlenbits) | Ints_Delegated of (xlenbits) | Ints_Empty of (unit)`; + + + + +val _ = Hol_datatype ` + ctl_result = + CTL_TRAP of (sync_exception) | CTL_SRET of (unit) | CTL_MRET of (unit) | CTL_URET of (unit)`; + + + + +val _ = Hol_datatype ` + MemoryOpResult = MemValue of ('a) | MemException of (ExceptionType)`; + + + + +val _ = Hol_datatype ` + htif_cmd = <| htif_cmd_htif_cmd_chunk_0 : 64 words$word |>`; + + + +val _ = type_abbrev( "pteAttribs" , ``: 8 bits``); + +val _ = Hol_datatype ` + PTW_Error = PTW_Access | PTW_Invalid_PTE | PTW_No_Permission | PTW_Misaligned | PTW_PTE_Update`; + + + + +val _ = type_abbrev( "vaddr32" , ``: 32 bits``); + +val _ = type_abbrev( "paddr32" , ``: 34 bits``); + +val _ = type_abbrev( "pte32" , ``: 32 bits``); + +val _ = type_abbrev( "asid32" , ``: 9 bits``); + +val _ = Hol_datatype ` + SV32_Vaddr = <| SV32_Vaddr_SV32_Vaddr_chunk_0 : 32 words$word |>`; + + + +val _ = Hol_datatype ` + SV48_Vaddr = <| SV48_Vaddr_SV48_Vaddr_chunk_0 : 48 words$word |>`; + + + +val _ = Hol_datatype ` + SV48_Paddr = <| SV48_Paddr_SV48_Paddr_chunk_0 : 56 words$word |>`; + + + +val _ = Hol_datatype ` + SV32_Paddr = <| SV32_Paddr_SV32_Paddr_chunk_0 : 34 words$word |>`; + + + +val _ = Hol_datatype ` + SV32_PTE = <| SV32_PTE_SV32_PTE_chunk_0 : 32 words$word |>`; + + + +val _ = type_abbrev( "paddr64" , ``: 56 bits``); + +val _ = type_abbrev( "pte64" , ``: 64 bits``); + +val _ = type_abbrev( "asid64" , ``: 16 bits``); + +val _ = type_abbrev( "vaddr39" , ``: 39 bits``); + +val _ = Hol_datatype ` + SV39_Vaddr = <| SV39_Vaddr_SV39_Vaddr_chunk_0 : 39 words$word |>`; + + + +val _ = Hol_datatype ` + SV39_Paddr = <| SV39_Paddr_SV39_Paddr_chunk_0 : 56 words$word |>`; + + + +val _ = Hol_datatype ` + SV39_PTE = <| SV39_PTE_SV39_PTE_chunk_0 : 64 words$word |>`; + + + +val _ = type_abbrev( "vaddr48" , ``: 48 bits``); + +val _ = type_abbrev( "pte48" , ``: 64 bits``); + +val _ = Hol_datatype ` + PTW_Result = + PTW_Success of (('paddr # 'pte # 'paddr # ii # bool)) | PTW_Failure of (PTW_Error)`; + + + + +val _ = Hol_datatype ` + TR_Result = TR_Address of ('a_paddr) | TR_Failure of ('b_failure)`; + + + + +val _ = Hol_datatype ` +(* ( 'a_asidlen, 'b_valen, 'c_palen, 'd_ptelen) *) TLB_Entry = + <| TLB_Entry_asid :'a_asidlen bits; + TLB_Entry_global : bool; + TLB_Entry_vAddr :'b_valen bits; + TLB_Entry_pAddr :'c_palen bits; + TLB_Entry_vMatchMask :'b_valen bits; + TLB_Entry_vAddrMask :'b_valen bits; + TLB_Entry_pte :'d_ptelen bits; + TLB_Entry_pteAddr :'c_palen bits; + TLB_Entry_age : 64 bits |>`; + + + +val _ = type_abbrev( "TLB32_Entry" , ``: (9, 32, 34, 32) TLB_Entry``); + +val _ = Hol_datatype ` + FetchResult = + F_Ext_Error of (ext_fetch_addr_error) + | F_Base of (word) + | F_RVC of (half) + | F_Error of ((ExceptionType # xlenbits))`; + + + + +val _ = Hol_datatype ` + register_value = + Regval_vector of ((ii # bool # register_value list)) + | Regval_list of ( register_value list) + | Regval_option of ( register_value option) + | Regval_Counteren of (Counteren) + | Regval_Mcause of (Mcause) + | Regval_Medeleg of (Medeleg) + | Regval_Minterrupts of (Minterrupts) + | Regval_Misa of (Misa) + | Regval_Mstatus of (Mstatus) + | Regval_Mtvec of (Mtvec) + | Regval_Pmpcfg_ent of (Pmpcfg_ent) + | Regval_Privilege of (Privilege) + | Regval_Sedeleg of (Sedeleg) + | Regval_Sinterrupts of (Sinterrupts) + | Regval_TLB_Entry_9_32_34_32 of ( (9, 32, 34, 32)TLB_Entry) + | Regval_bool of (bool) + | Regval_vector_32_dec_bit of ( 32 words$word) + | Regval_vector_64_dec_bit of ( 64 words$word)`; + + + + +val _ = Hol_datatype ` + regstate = + <| satp : 32 words$word; + tlb32 : ( (9, 32, 34, 32)TLB_Entry)option; + htif_exit_code : 64 words$word; + htif_done : bool; + htif_tohost : 64 words$word; + mtimecmp : 64 words$word; + utval : 32 words$word; + ucause : Mcause; + uepc : 32 words$word; + uscratch : 32 words$word; + utvec : Mtvec; + pmpaddr15 : 32 words$word; + pmpaddr14 : 32 words$word; + pmpaddr13 : 32 words$word; + pmpaddr12 : 32 words$word; + pmpaddr11 : 32 words$word; + pmpaddr10 : 32 words$word; + pmpaddr9 : 32 words$word; + pmpaddr8 : 32 words$word; + pmpaddr7 : 32 words$word; + pmpaddr6 : 32 words$word; + pmpaddr5 : 32 words$word; + pmpaddr4 : 32 words$word; + pmpaddr3 : 32 words$word; + pmpaddr2 : 32 words$word; + pmpaddr1 : 32 words$word; + pmpaddr0 : 32 words$word; + pmp15cfg : Pmpcfg_ent; + pmp14cfg : Pmpcfg_ent; + pmp13cfg : Pmpcfg_ent; + pmp12cfg : Pmpcfg_ent; + pmp11cfg : Pmpcfg_ent; + pmp10cfg : Pmpcfg_ent; + pmp9cfg : Pmpcfg_ent; + pmp8cfg : Pmpcfg_ent; + pmp7cfg : Pmpcfg_ent; + pmp6cfg : Pmpcfg_ent; + pmp5cfg : Pmpcfg_ent; + pmp4cfg : Pmpcfg_ent; + pmp3cfg : Pmpcfg_ent; + pmp2cfg : Pmpcfg_ent; + pmp1cfg : Pmpcfg_ent; + pmp0cfg : Pmpcfg_ent; + tselect : 32 words$word; + stval : 32 words$word; + scause : Mcause; + sepc : 32 words$word; + sscratch : 32 words$word; + stvec : Mtvec; + sideleg : Sinterrupts; + sedeleg : Sedeleg; + mhartid : 32 words$word; + marchid : 32 words$word; + mimpid : 32 words$word; + mvendorid : 32 words$word; + minstret_written : bool; + minstret : 64 words$word; + mtime : 64 words$word; + mcycle : 64 words$word; + scounteren : Counteren; + mcounteren : Counteren; + mscratch : 32 words$word; + mtval : 32 words$word; + mepc : 32 words$word; + mcause : Mcause; + mtvec : Mtvec; + medeleg : Medeleg; + mideleg : Minterrupts; + mie : Minterrupts; + mip : Minterrupts; + mstatus : Mstatus; + misa : Misa; + cur_inst : 32 words$word; + cur_privilege : Privilege; + x31 : 32 words$word; + x30 : 32 words$word; + x29 : 32 words$word; + x28 : 32 words$word; + x27 : 32 words$word; + x26 : 32 words$word; + x25 : 32 words$word; + x24 : 32 words$word; + x23 : 32 words$word; + x22 : 32 words$word; + x21 : 32 words$word; + x20 : 32 words$word; + x19 : 32 words$word; + x18 : 32 words$word; + x17 : 32 words$word; + x16 : 32 words$word; + x15 : 32 words$word; + x14 : 32 words$word; + x13 : 32 words$word; + x12 : 32 words$word; + x11 : 32 words$word; + x10 : 32 words$word; + x9 : 32 words$word; + x8 : 32 words$word; + x7 : 32 words$word; + x6 : 32 words$word; + x5 : 32 words$word; + x4 : 32 words$word; + x3 : 32 words$word; + x2 : 32 words$word; + x1 : 32 words$word; + Xs : ( 32 words$word) list; + instbits : 32 words$word; + nextPC : 32 words$word; + PC : 32 words$word |>`; + + + + + +(*val Counteren_of_regval : register_value -> maybe Counteren*) + +val _ = Define ` + ((Counteren_of_regval:register_value ->(Counteren)option) merge_var= + ((case merge_var of Regval_Counteren (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Counteren : Counteren -> register_value*) + +val _ = Define ` + ((regval_of_Counteren:Counteren -> register_value) v= (Regval_Counteren v))`; + + +(*val Mcause_of_regval : register_value -> maybe Mcause*) + +val _ = Define ` + ((Mcause_of_regval:register_value ->(Mcause)option) merge_var= + ((case merge_var of Regval_Mcause (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Mcause : Mcause -> register_value*) + +val _ = Define ` + ((regval_of_Mcause:Mcause -> register_value) v= (Regval_Mcause v))`; + + +(*val Medeleg_of_regval : register_value -> maybe Medeleg*) + +val _ = Define ` + ((Medeleg_of_regval:register_value ->(Medeleg)option) merge_var= + ((case merge_var of Regval_Medeleg (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Medeleg : Medeleg -> register_value*) + +val _ = Define ` + ((regval_of_Medeleg:Medeleg -> register_value) v= (Regval_Medeleg v))`; + + +(*val Minterrupts_of_regval : register_value -> maybe Minterrupts*) + +val _ = Define ` + ((Minterrupts_of_regval:register_value ->(Minterrupts)option) merge_var= + ((case merge_var of Regval_Minterrupts (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Minterrupts : Minterrupts -> register_value*) + +val _ = Define ` + ((regval_of_Minterrupts:Minterrupts -> register_value) v= (Regval_Minterrupts v))`; + + +(*val Misa_of_regval : register_value -> maybe Misa*) + +val _ = Define ` + ((Misa_of_regval:register_value ->(Misa)option) merge_var= ((case merge_var of Regval_Misa (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Misa : Misa -> register_value*) + +val _ = Define ` + ((regval_of_Misa:Misa -> register_value) v= (Regval_Misa v))`; + + +(*val Mstatus_of_regval : register_value -> maybe Mstatus*) + +val _ = Define ` + ((Mstatus_of_regval:register_value ->(Mstatus)option) merge_var= + ((case merge_var of Regval_Mstatus (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Mstatus : Mstatus -> register_value*) + +val _ = Define ` + ((regval_of_Mstatus:Mstatus -> register_value) v= (Regval_Mstatus v))`; + + +(*val Mtvec_of_regval : register_value -> maybe Mtvec*) + +val _ = Define ` + ((Mtvec_of_regval:register_value ->(Mtvec)option) merge_var= ((case merge_var of Regval_Mtvec (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Mtvec : Mtvec -> register_value*) + +val _ = Define ` + ((regval_of_Mtvec:Mtvec -> register_value) v= (Regval_Mtvec v))`; + + +(*val Pmpcfg_ent_of_regval : register_value -> maybe Pmpcfg_ent*) + +val _ = Define ` + ((Pmpcfg_ent_of_regval:register_value ->(Pmpcfg_ent)option) merge_var= + ((case merge_var of Regval_Pmpcfg_ent (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Pmpcfg_ent : Pmpcfg_ent -> register_value*) + +val _ = Define ` + ((regval_of_Pmpcfg_ent:Pmpcfg_ent -> register_value) v= (Regval_Pmpcfg_ent v))`; + + +(*val Privilege_of_regval : register_value -> maybe Privilege*) + +val _ = Define ` + ((Privilege_of_regval:register_value ->(Privilege)option) merge_var= + ((case merge_var of Regval_Privilege (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Privilege : Privilege -> register_value*) + +val _ = Define ` + ((regval_of_Privilege:Privilege -> register_value) v= (Regval_Privilege v))`; + + +(*val Sedeleg_of_regval : register_value -> maybe Sedeleg*) + +val _ = Define ` + ((Sedeleg_of_regval:register_value ->(Sedeleg)option) merge_var= + ((case merge_var of Regval_Sedeleg (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Sedeleg : Sedeleg -> register_value*) + +val _ = Define ` + ((regval_of_Sedeleg:Sedeleg -> register_value) v= (Regval_Sedeleg v))`; + + +(*val Sinterrupts_of_regval : register_value -> maybe Sinterrupts*) + +val _ = Define ` + ((Sinterrupts_of_regval:register_value ->(Sinterrupts)option) merge_var= + ((case merge_var of Regval_Sinterrupts (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_Sinterrupts : Sinterrupts -> register_value*) + +val _ = Define ` + ((regval_of_Sinterrupts:Sinterrupts -> register_value) v= (Regval_Sinterrupts v))`; + + +(*val TLB_Entry_9_32_34_32_of_regval : register_value -> maybe (TLB_Entry ty9 ty32 ty34 ty32)*) + +val _ = Define ` + ((TLB_Entry_9_32_34_32_of_regval:register_value ->(((9),(32),(34),(32))TLB_Entry)option) merge_var= + ((case merge_var of Regval_TLB_Entry_9_32_34_32 (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_TLB_Entry_9_32_34_32 : TLB_Entry ty9 ty32 ty34 ty32 -> register_value*) + +val _ = Define ` + ((regval_of_TLB_Entry_9_32_34_32:((9),(32),(34),(32))TLB_Entry -> register_value) v= (Regval_TLB_Entry_9_32_34_32 v))`; + + +(*val bool_of_regval : register_value -> maybe bool*) + +val _ = Define ` + ((bool_of_regval:register_value ->(bool)option) merge_var= ((case merge_var of Regval_bool (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_bool : bool -> register_value*) + +val _ = Define ` + ((regval_of_bool:bool -> register_value) v= (Regval_bool v))`; + + +(*val vector_32_dec_bit_of_regval : register_value -> maybe (mword ty32)*) + +val _ = Define ` + ((vector_32_dec_bit_of_regval:register_value ->((32)words$word)option) merge_var= + ((case merge_var of Regval_vector_32_dec_bit (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_vector_32_dec_bit : mword ty32 -> register_value*) + +val _ = Define ` + ((regval_of_vector_32_dec_bit:(32)words$word -> register_value) v= (Regval_vector_32_dec_bit v))`; + + +(*val vector_64_dec_bit_of_regval : register_value -> maybe (mword ty64)*) + +val _ = Define ` + ((vector_64_dec_bit_of_regval:register_value ->((64)words$word)option) merge_var= + ((case merge_var of Regval_vector_64_dec_bit (v) => SOME v | _ => NONE )))`; + + +(*val regval_of_vector_64_dec_bit : mword ty64 -> register_value*) + +val _ = Define ` + ((regval_of_vector_64_dec_bit:(64)words$word -> register_value) v= (Regval_vector_64_dec_bit v))`; + + + + +(*val vector_of_regval : forall 'a. (register_value -> maybe 'a) -> register_value -> maybe (list 'a)*) +val _ = Define ` + ((vector_of_regval:(register_value -> 'a option) -> register_value ->('a list)option) of_regval1= + (\x . (case x of + Regval_vector (_, _, v) => just_list (MAP of_regval1 v) + | _ => NONE + )))`; + + +(*val regval_of_vector : forall 'a. ('a -> register_value) -> integer -> bool -> list 'a -> register_value*) +val _ = Define ` + ((regval_of_vector:('a -> register_value) -> int -> bool -> 'a list -> register_value) regval_of1 size1 is_inc xs= (Regval_vector (size1, is_inc, MAP regval_of1 xs)))`; + + +(*val list_of_regval : forall 'a. (register_value -> maybe 'a) -> register_value -> maybe (list 'a)*) +val _ = Define ` + ((list_of_regval:(register_value -> 'a option) -> register_value ->('a list)option) of_regval1= + (\x . (case x of + Regval_list v => just_list (MAP of_regval1 v) + | _ => NONE + )))`; + + +(*val regval_of_list : forall 'a. ('a -> register_value) -> list 'a -> register_value*) +val _ = Define ` + ((regval_of_list:('a -> register_value) -> 'a list -> register_value) regval_of1 xs= (Regval_list (MAP regval_of1 xs)))`; + + +(*val option_of_regval : forall 'a. (register_value -> maybe 'a) -> register_value -> maybe (maybe 'a)*) +val _ = Define ` + ((option_of_regval:(register_value -> 'a option) -> register_value ->('a option)option) of_regval1= + (\x . (case x of + Regval_option v => SOME (OPTION_BIND v of_regval1) + | _ => NONE + )))`; + + +(*val regval_of_option : forall 'a. ('a -> register_value) -> maybe 'a -> register_value*) +val _ = Define ` + ((regval_of_option:('a -> register_value) -> 'a option -> register_value) regval_of1 v= (Regval_option (OPTION_MAP regval_of1 v)))`; + + + +val _ = Define ` + ((satp_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "satp"; + read_from := (\ s . s.satp); + write_to := (\ v s . (( s with<| satp := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((tlb32_ref:((regstate),(register_value),((((9),(32),(34),(32))TLB_Entry)option))register_ref)= (<| + name := "tlb32"; + read_from := (\ s . s.tlb32); + write_to := (\ v s . (( s with<| tlb32 := v |>))); + of_regval := (\ v . option_of_regval (\ v . TLB_Entry_9_32_34_32_of_regval v) v); + regval_of := (\ v . regval_of_option (\ v . regval_of_TLB_Entry_9_32_34_32 v) v) |>))`; + + +val _ = Define ` + ((htif_exit_code_ref:((regstate),(register_value),((64)words$word))register_ref)= (<| + name := "htif_exit_code"; + read_from := (\ s . s.htif_exit_code); + write_to := (\ v s . (( s with<| htif_exit_code := v |>))); + of_regval := (\ v . vector_64_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_64_dec_bit v) |>))`; + + +val _ = Define ` + ((htif_done_ref:((regstate),(register_value),(bool))register_ref)= (<| + name := "htif_done"; + read_from := (\ s . s.htif_done); + write_to := (\ v s . (( s with<| htif_done := v |>))); + of_regval := (\ v . bool_of_regval v); + regval_of := (\ v . regval_of_bool v) |>))`; + + +val _ = Define ` + ((htif_tohost_ref:((regstate),(register_value),((64)words$word))register_ref)= (<| + name := "htif_tohost"; + read_from := (\ s . s.htif_tohost); + write_to := (\ v s . (( s with<| htif_tohost := v |>))); + of_regval := (\ v . vector_64_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_64_dec_bit v) |>))`; + + +val _ = Define ` + ((mtimecmp_ref:((regstate),(register_value),((64)words$word))register_ref)= (<| + name := "mtimecmp"; + read_from := (\ s . s.mtimecmp); + write_to := (\ v s . (( s with<| mtimecmp := v |>))); + of_regval := (\ v . vector_64_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_64_dec_bit v) |>))`; + + +val _ = Define ` + ((utval_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "utval"; + read_from := (\ s . s.utval); + write_to := (\ v s . (( s with<| utval := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((ucause_ref:((regstate),(register_value),(Mcause))register_ref)= (<| + name := "ucause"; + read_from := (\ s . s.ucause); + write_to := (\ v s . (( s with<| ucause := v |>))); + of_regval := (\ v . Mcause_of_regval v); + regval_of := (\ v . regval_of_Mcause v) |>))`; + + +val _ = Define ` + ((uepc_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "uepc"; + read_from := (\ s . s.uepc); + write_to := (\ v s . (( s with<| uepc := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((uscratch_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "uscratch"; + read_from := (\ s . s.uscratch); + write_to := (\ v s . (( s with<| uscratch := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((utvec_ref:((regstate),(register_value),(Mtvec))register_ref)= (<| + name := "utvec"; + read_from := (\ s . s.utvec); + write_to := (\ v s . (( s with<| utvec := v |>))); + of_regval := (\ v . Mtvec_of_regval v); + regval_of := (\ v . regval_of_Mtvec v) |>))`; + + +val _ = Define ` + ((pmpaddr15_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr15"; + read_from := (\ s . s.pmpaddr15); + write_to := (\ v s . (( s with<| pmpaddr15 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr14_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr14"; + read_from := (\ s . s.pmpaddr14); + write_to := (\ v s . (( s with<| pmpaddr14 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr13_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr13"; + read_from := (\ s . s.pmpaddr13); + write_to := (\ v s . (( s with<| pmpaddr13 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr12_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr12"; + read_from := (\ s . s.pmpaddr12); + write_to := (\ v s . (( s with<| pmpaddr12 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr11_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr11"; + read_from := (\ s . s.pmpaddr11); + write_to := (\ v s . (( s with<| pmpaddr11 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr10_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr10"; + read_from := (\ s . s.pmpaddr10); + write_to := (\ v s . (( s with<| pmpaddr10 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr9_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr9"; + read_from := (\ s . s.pmpaddr9); + write_to := (\ v s . (( s with<| pmpaddr9 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr8_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr8"; + read_from := (\ s . s.pmpaddr8); + write_to := (\ v s . (( s with<| pmpaddr8 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr7_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr7"; + read_from := (\ s . s.pmpaddr7); + write_to := (\ v s . (( s with<| pmpaddr7 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr6_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr6"; + read_from := (\ s . s.pmpaddr6); + write_to := (\ v s . (( s with<| pmpaddr6 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr5_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr5"; + read_from := (\ s . s.pmpaddr5); + write_to := (\ v s . (( s with<| pmpaddr5 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr4_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr4"; + read_from := (\ s . s.pmpaddr4); + write_to := (\ v s . (( s with<| pmpaddr4 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr3_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr3"; + read_from := (\ s . s.pmpaddr3); + write_to := (\ v s . (( s with<| pmpaddr3 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr2_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr2"; + read_from := (\ s . s.pmpaddr2); + write_to := (\ v s . (( s with<| pmpaddr2 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr1_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr1"; + read_from := (\ s . s.pmpaddr1); + write_to := (\ v s . (( s with<| pmpaddr1 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmpaddr0_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "pmpaddr0"; + read_from := (\ s . s.pmpaddr0); + write_to := (\ v s . (( s with<| pmpaddr0 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((pmp15cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp15cfg"; + read_from := (\ s . s.pmp15cfg); + write_to := (\ v s . (( s with<| pmp15cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp14cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp14cfg"; + read_from := (\ s . s.pmp14cfg); + write_to := (\ v s . (( s with<| pmp14cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp13cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp13cfg"; + read_from := (\ s . s.pmp13cfg); + write_to := (\ v s . (( s with<| pmp13cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp12cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp12cfg"; + read_from := (\ s . s.pmp12cfg); + write_to := (\ v s . (( s with<| pmp12cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp11cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp11cfg"; + read_from := (\ s . s.pmp11cfg); + write_to := (\ v s . (( s with<| pmp11cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp10cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp10cfg"; + read_from := (\ s . s.pmp10cfg); + write_to := (\ v s . (( s with<| pmp10cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp9cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp9cfg"; + read_from := (\ s . s.pmp9cfg); + write_to := (\ v s . (( s with<| pmp9cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp8cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp8cfg"; + read_from := (\ s . s.pmp8cfg); + write_to := (\ v s . (( s with<| pmp8cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp7cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp7cfg"; + read_from := (\ s . s.pmp7cfg); + write_to := (\ v s . (( s with<| pmp7cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp6cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp6cfg"; + read_from := (\ s . s.pmp6cfg); + write_to := (\ v s . (( s with<| pmp6cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp5cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp5cfg"; + read_from := (\ s . s.pmp5cfg); + write_to := (\ v s . (( s with<| pmp5cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp4cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp4cfg"; + read_from := (\ s . s.pmp4cfg); + write_to := (\ v s . (( s with<| pmp4cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp3cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp3cfg"; + read_from := (\ s . s.pmp3cfg); + write_to := (\ v s . (( s with<| pmp3cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp2cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp2cfg"; + read_from := (\ s . s.pmp2cfg); + write_to := (\ v s . (( s with<| pmp2cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp1cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp1cfg"; + read_from := (\ s . s.pmp1cfg); + write_to := (\ v s . (( s with<| pmp1cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((pmp0cfg_ref:((regstate),(register_value),(Pmpcfg_ent))register_ref)= (<| + name := "pmp0cfg"; + read_from := (\ s . s.pmp0cfg); + write_to := (\ v s . (( s with<| pmp0cfg := v |>))); + of_regval := (\ v . Pmpcfg_ent_of_regval v); + regval_of := (\ v . regval_of_Pmpcfg_ent v) |>))`; + + +val _ = Define ` + ((tselect_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "tselect"; + read_from := (\ s . s.tselect); + write_to := (\ v s . (( s with<| tselect := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((stval_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "stval"; + read_from := (\ s . s.stval); + write_to := (\ v s . (( s with<| stval := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((scause_ref:((regstate),(register_value),(Mcause))register_ref)= (<| + name := "scause"; + read_from := (\ s . s.scause); + write_to := (\ v s . (( s with<| scause := v |>))); + of_regval := (\ v . Mcause_of_regval v); + regval_of := (\ v . regval_of_Mcause v) |>))`; + + +val _ = Define ` + ((sepc_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "sepc"; + read_from := (\ s . s.sepc); + write_to := (\ v s . (( s with<| sepc := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((sscratch_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "sscratch"; + read_from := (\ s . s.sscratch); + write_to := (\ v s . (( s with<| sscratch := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((stvec_ref:((regstate),(register_value),(Mtvec))register_ref)= (<| + name := "stvec"; + read_from := (\ s . s.stvec); + write_to := (\ v s . (( s with<| stvec := v |>))); + of_regval := (\ v . Mtvec_of_regval v); + regval_of := (\ v . regval_of_Mtvec v) |>))`; + + +val _ = Define ` + ((sideleg_ref:((regstate),(register_value),(Sinterrupts))register_ref)= (<| + name := "sideleg"; + read_from := (\ s . s.sideleg); + write_to := (\ v s . (( s with<| sideleg := v |>))); + of_regval := (\ v . Sinterrupts_of_regval v); + regval_of := (\ v . regval_of_Sinterrupts v) |>))`; + + +val _ = Define ` + ((sedeleg_ref:((regstate),(register_value),(Sedeleg))register_ref)= (<| + name := "sedeleg"; + read_from := (\ s . s.sedeleg); + write_to := (\ v s . (( s with<| sedeleg := v |>))); + of_regval := (\ v . Sedeleg_of_regval v); + regval_of := (\ v . regval_of_Sedeleg v) |>))`; + + +val _ = Define ` + ((mhartid_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "mhartid"; + read_from := (\ s . s.mhartid); + write_to := (\ v s . (( s with<| mhartid := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((marchid_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "marchid"; + read_from := (\ s . s.marchid); + write_to := (\ v s . (( s with<| marchid := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((mimpid_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "mimpid"; + read_from := (\ s . s.mimpid); + write_to := (\ v s . (( s with<| mimpid := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((mvendorid_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "mvendorid"; + read_from := (\ s . s.mvendorid); + write_to := (\ v s . (( s with<| mvendorid := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((minstret_written_ref:((regstate),(register_value),(bool))register_ref)= (<| + name := "minstret_written"; + read_from := (\ s . s.minstret_written); + write_to := (\ v s . (( s with<| minstret_written := v |>))); + of_regval := (\ v . bool_of_regval v); + regval_of := (\ v . regval_of_bool v) |>))`; + + +val _ = Define ` + ((minstret_ref:((regstate),(register_value),((64)words$word))register_ref)= (<| + name := "minstret"; + read_from := (\ s . s.minstret); + write_to := (\ v s . (( s with<| minstret := v |>))); + of_regval := (\ v . vector_64_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_64_dec_bit v) |>))`; + + +val _ = Define ` + ((mtime_ref:((regstate),(register_value),((64)words$word))register_ref)= (<| + name := "mtime"; + read_from := (\ s . s.mtime); + write_to := (\ v s . (( s with<| mtime := v |>))); + of_regval := (\ v . vector_64_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_64_dec_bit v) |>))`; + + +val _ = Define ` + ((mcycle_ref:((regstate),(register_value),((64)words$word))register_ref)= (<| + name := "mcycle"; + read_from := (\ s . s.mcycle); + write_to := (\ v s . (( s with<| mcycle := v |>))); + of_regval := (\ v . vector_64_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_64_dec_bit v) |>))`; + + +val _ = Define ` + ((scounteren_ref:((regstate),(register_value),(Counteren))register_ref)= (<| + name := "scounteren"; + read_from := (\ s . s.scounteren); + write_to := (\ v s . (( s with<| scounteren := v |>))); + of_regval := (\ v . Counteren_of_regval v); + regval_of := (\ v . regval_of_Counteren v) |>))`; + + +val _ = Define ` + ((mcounteren_ref:((regstate),(register_value),(Counteren))register_ref)= (<| + name := "mcounteren"; + read_from := (\ s . s.mcounteren); + write_to := (\ v s . (( s with<| mcounteren := v |>))); + of_regval := (\ v . Counteren_of_regval v); + regval_of := (\ v . regval_of_Counteren v) |>))`; + + +val _ = Define ` + ((mscratch_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "mscratch"; + read_from := (\ s . s.mscratch); + write_to := (\ v s . (( s with<| mscratch := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((mtval_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "mtval"; + read_from := (\ s . s.mtval); + write_to := (\ v s . (( s with<| mtval := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((mepc_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "mepc"; + read_from := (\ s . s.mepc); + write_to := (\ v s . (( s with<| mepc := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((mcause_ref:((regstate),(register_value),(Mcause))register_ref)= (<| + name := "mcause"; + read_from := (\ s . s.mcause); + write_to := (\ v s . (( s with<| mcause := v |>))); + of_regval := (\ v . Mcause_of_regval v); + regval_of := (\ v . regval_of_Mcause v) |>))`; + + +val _ = Define ` + ((mtvec_ref:((regstate),(register_value),(Mtvec))register_ref)= (<| + name := "mtvec"; + read_from := (\ s . s.mtvec); + write_to := (\ v s . (( s with<| mtvec := v |>))); + of_regval := (\ v . Mtvec_of_regval v); + regval_of := (\ v . regval_of_Mtvec v) |>))`; + + +val _ = Define ` + ((medeleg_ref:((regstate),(register_value),(Medeleg))register_ref)= (<| + name := "medeleg"; + read_from := (\ s . s.medeleg); + write_to := (\ v s . (( s with<| medeleg := v |>))); + of_regval := (\ v . Medeleg_of_regval v); + regval_of := (\ v . regval_of_Medeleg v) |>))`; + + +val _ = Define ` + ((mideleg_ref:((regstate),(register_value),(Minterrupts))register_ref)= (<| + name := "mideleg"; + read_from := (\ s . s.mideleg); + write_to := (\ v s . (( s with<| mideleg := v |>))); + of_regval := (\ v . Minterrupts_of_regval v); + regval_of := (\ v . regval_of_Minterrupts v) |>))`; + + +val _ = Define ` + ((mie_ref:((regstate),(register_value),(Minterrupts))register_ref)= (<| + name := "mie"; + read_from := (\ s . s.mie); + write_to := (\ v s . (( s with<| mie := v |>))); + of_regval := (\ v . Minterrupts_of_regval v); + regval_of := (\ v . regval_of_Minterrupts v) |>))`; + + +val _ = Define ` + ((mip_ref:((regstate),(register_value),(Minterrupts))register_ref)= (<| + name := "mip"; + read_from := (\ s . s.mip); + write_to := (\ v s . (( s with<| mip := v |>))); + of_regval := (\ v . Minterrupts_of_regval v); + regval_of := (\ v . regval_of_Minterrupts v) |>))`; + + +val _ = Define ` + ((mstatus_ref:((regstate),(register_value),(Mstatus))register_ref)= (<| + name := "mstatus"; + read_from := (\ s . s.mstatus); + write_to := (\ v s . (( s with<| mstatus := v |>))); + of_regval := (\ v . Mstatus_of_regval v); + regval_of := (\ v . regval_of_Mstatus v) |>))`; + + +val _ = Define ` + ((misa_ref:((regstate),(register_value),(Misa))register_ref)= (<| + name := "misa"; + read_from := (\ s . s.misa); + write_to := (\ v s . (( s with<| misa := v |>))); + of_regval := (\ v . Misa_of_regval v); + regval_of := (\ v . regval_of_Misa v) |>))`; + + +val _ = Define ` + ((cur_inst_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "cur_inst"; + read_from := (\ s . s.cur_inst); + write_to := (\ v s . (( s with<| cur_inst := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((cur_privilege_ref:((regstate),(register_value),(Privilege))register_ref)= (<| + name := "cur_privilege"; + read_from := (\ s . s.cur_privilege); + write_to := (\ v s . (( s with<| cur_privilege := v |>))); + of_regval := (\ v . Privilege_of_regval v); + regval_of := (\ v . regval_of_Privilege v) |>))`; + + +val _ = Define ` + ((x31_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x31"; + read_from := (\ s . s.x31); + write_to := (\ v s . (( s with<| x31 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x30_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x30"; + read_from := (\ s . s.x30); + write_to := (\ v s . (( s with<| x30 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x29_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x29"; + read_from := (\ s . s.x29); + write_to := (\ v s . (( s with<| x29 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x28_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x28"; + read_from := (\ s . s.x28); + write_to := (\ v s . (( s with<| x28 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x27_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x27"; + read_from := (\ s . s.x27); + write_to := (\ v s . (( s with<| x27 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x26_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x26"; + read_from := (\ s . s.x26); + write_to := (\ v s . (( s with<| x26 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x25_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x25"; + read_from := (\ s . s.x25); + write_to := (\ v s . (( s with<| x25 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x24_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x24"; + read_from := (\ s . s.x24); + write_to := (\ v s . (( s with<| x24 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x23_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x23"; + read_from := (\ s . s.x23); + write_to := (\ v s . (( s with<| x23 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x22_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x22"; + read_from := (\ s . s.x22); + write_to := (\ v s . (( s with<| x22 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x21_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x21"; + read_from := (\ s . s.x21); + write_to := (\ v s . (( s with<| x21 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x20_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x20"; + read_from := (\ s . s.x20); + write_to := (\ v s . (( s with<| x20 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x19_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x19"; + read_from := (\ s . s.x19); + write_to := (\ v s . (( s with<| x19 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x18_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x18"; + read_from := (\ s . s.x18); + write_to := (\ v s . (( s with<| x18 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x17_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x17"; + read_from := (\ s . s.x17); + write_to := (\ v s . (( s with<| x17 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x16_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x16"; + read_from := (\ s . s.x16); + write_to := (\ v s . (( s with<| x16 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x15_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x15"; + read_from := (\ s . s.x15); + write_to := (\ v s . (( s with<| x15 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x14_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x14"; + read_from := (\ s . s.x14); + write_to := (\ v s . (( s with<| x14 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x13_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x13"; + read_from := (\ s . s.x13); + write_to := (\ v s . (( s with<| x13 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x12_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x12"; + read_from := (\ s . s.x12); + write_to := (\ v s . (( s with<| x12 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x11_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x11"; + read_from := (\ s . s.x11); + write_to := (\ v s . (( s with<| x11 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x10_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x10"; + read_from := (\ s . s.x10); + write_to := (\ v s . (( s with<| x10 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x9_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x9"; + read_from := (\ s . s.x9); + write_to := (\ v s . (( s with<| x9 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x8_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x8"; + read_from := (\ s . s.x8); + write_to := (\ v s . (( s with<| x8 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x7_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x7"; + read_from := (\ s . s.x7); + write_to := (\ v s . (( s with<| x7 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x6_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x6"; + read_from := (\ s . s.x6); + write_to := (\ v s . (( s with<| x6 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x5_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x5"; + read_from := (\ s . s.x5); + write_to := (\ v s . (( s with<| x5 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x4_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x4"; + read_from := (\ s . s.x4); + write_to := (\ v s . (( s with<| x4 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x3_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x3"; + read_from := (\ s . s.x3); + write_to := (\ v s . (( s with<| x3 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x2_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x2"; + read_from := (\ s . s.x2); + write_to := (\ v s . (( s with<| x2 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((x1_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "x1"; + read_from := (\ s . s.x1); + write_to := (\ v s . (( s with<| x1 := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((Xs_ref:((regstate),(register_value),(((32)words$word)list))register_ref)= (<| + name := "Xs"; + read_from := (\ s . s.Xs); + write_to := (\ v s . (( s with<| Xs := v |>))); + of_regval := (\ v . vector_of_regval (\ v . vector_32_dec_bit_of_regval v) v); + regval_of := (\ v . regval_of_vector (\ v . regval_of_vector_32_dec_bit v)(( 32 : int)) F v) |>))`; + + +val _ = Define ` + ((instbits_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "instbits"; + read_from := (\ s . s.instbits); + write_to := (\ v s . (( s with<| instbits := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((nextPC_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "nextPC"; + read_from := (\ s . s.nextPC); + write_to := (\ v s . (( s with<| nextPC := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +val _ = Define ` + ((PC_ref:((regstate),(register_value),((32)words$word))register_ref)= (<| + name := "PC"; + read_from := (\ s . s.PC); + write_to := (\ v s . (( s with<| PC := v |>))); + of_regval := (\ v . vector_32_dec_bit_of_regval v); + regval_of := (\ v . regval_of_vector_32_dec_bit v) |>))`; + + +(*val get_regval : string -> regstate -> maybe register_value*) +val _ = Define ` + ((get_regval:string -> regstate ->(register_value)option) reg_name s= + (if reg_name = "satp" then SOME (satp_ref.regval_of (satp_ref.read_from s)) else + if reg_name = "tlb32" then SOME (tlb32_ref.regval_of (tlb32_ref.read_from s)) else + if reg_name = "htif_exit_code" then SOME (htif_exit_code_ref.regval_of (htif_exit_code_ref.read_from s)) else + if reg_name = "htif_done" then SOME (htif_done_ref.regval_of (htif_done_ref.read_from s)) else + if reg_name = "htif_tohost" then SOME (htif_tohost_ref.regval_of (htif_tohost_ref.read_from s)) else + if reg_name = "mtimecmp" then SOME (mtimecmp_ref.regval_of (mtimecmp_ref.read_from s)) else + if reg_name = "utval" then SOME (utval_ref.regval_of (utval_ref.read_from s)) else + if reg_name = "ucause" then SOME (ucause_ref.regval_of (ucause_ref.read_from s)) else + if reg_name = "uepc" then SOME (uepc_ref.regval_of (uepc_ref.read_from s)) else + if reg_name = "uscratch" then SOME (uscratch_ref.regval_of (uscratch_ref.read_from s)) else + if reg_name = "utvec" then SOME (utvec_ref.regval_of (utvec_ref.read_from s)) else + if reg_name = "pmpaddr15" then SOME (pmpaddr15_ref.regval_of (pmpaddr15_ref.read_from s)) else + if reg_name = "pmpaddr14" then SOME (pmpaddr14_ref.regval_of (pmpaddr14_ref.read_from s)) else + if reg_name = "pmpaddr13" then SOME (pmpaddr13_ref.regval_of (pmpaddr13_ref.read_from s)) else + if reg_name = "pmpaddr12" then SOME (pmpaddr12_ref.regval_of (pmpaddr12_ref.read_from s)) else + if reg_name = "pmpaddr11" then SOME (pmpaddr11_ref.regval_of (pmpaddr11_ref.read_from s)) else + if reg_name = "pmpaddr10" then SOME (pmpaddr10_ref.regval_of (pmpaddr10_ref.read_from s)) else + if reg_name = "pmpaddr9" then SOME (pmpaddr9_ref.regval_of (pmpaddr9_ref.read_from s)) else + if reg_name = "pmpaddr8" then SOME (pmpaddr8_ref.regval_of (pmpaddr8_ref.read_from s)) else + if reg_name = "pmpaddr7" then SOME (pmpaddr7_ref.regval_of (pmpaddr7_ref.read_from s)) else + if reg_name = "pmpaddr6" then SOME (pmpaddr6_ref.regval_of (pmpaddr6_ref.read_from s)) else + if reg_name = "pmpaddr5" then SOME (pmpaddr5_ref.regval_of (pmpaddr5_ref.read_from s)) else + if reg_name = "pmpaddr4" then SOME (pmpaddr4_ref.regval_of (pmpaddr4_ref.read_from s)) else + if reg_name = "pmpaddr3" then SOME (pmpaddr3_ref.regval_of (pmpaddr3_ref.read_from s)) else + if reg_name = "pmpaddr2" then SOME (pmpaddr2_ref.regval_of (pmpaddr2_ref.read_from s)) else + if reg_name = "pmpaddr1" then SOME (pmpaddr1_ref.regval_of (pmpaddr1_ref.read_from s)) else + if reg_name = "pmpaddr0" then SOME (pmpaddr0_ref.regval_of (pmpaddr0_ref.read_from s)) else + if reg_name = "pmp15cfg" then SOME (pmp15cfg_ref.regval_of (pmp15cfg_ref.read_from s)) else + if reg_name = "pmp14cfg" then SOME (pmp14cfg_ref.regval_of (pmp14cfg_ref.read_from s)) else + if reg_name = "pmp13cfg" then SOME (pmp13cfg_ref.regval_of (pmp13cfg_ref.read_from s)) else + if reg_name = "pmp12cfg" then SOME (pmp12cfg_ref.regval_of (pmp12cfg_ref.read_from s)) else + if reg_name = "pmp11cfg" then SOME (pmp11cfg_ref.regval_of (pmp11cfg_ref.read_from s)) else + if reg_name = "pmp10cfg" then SOME (pmp10cfg_ref.regval_of (pmp10cfg_ref.read_from s)) else + if reg_name = "pmp9cfg" then SOME (pmp9cfg_ref.regval_of (pmp9cfg_ref.read_from s)) else + if reg_name = "pmp8cfg" then SOME (pmp8cfg_ref.regval_of (pmp8cfg_ref.read_from s)) else + if reg_name = "pmp7cfg" then SOME (pmp7cfg_ref.regval_of (pmp7cfg_ref.read_from s)) else + if reg_name = "pmp6cfg" then SOME (pmp6cfg_ref.regval_of (pmp6cfg_ref.read_from s)) else + if reg_name = "pmp5cfg" then SOME (pmp5cfg_ref.regval_of (pmp5cfg_ref.read_from s)) else + if reg_name = "pmp4cfg" then SOME (pmp4cfg_ref.regval_of (pmp4cfg_ref.read_from s)) else + if reg_name = "pmp3cfg" then SOME (pmp3cfg_ref.regval_of (pmp3cfg_ref.read_from s)) else + if reg_name = "pmp2cfg" then SOME (pmp2cfg_ref.regval_of (pmp2cfg_ref.read_from s)) else + if reg_name = "pmp1cfg" then SOME (pmp1cfg_ref.regval_of (pmp1cfg_ref.read_from s)) else + if reg_name = "pmp0cfg" then SOME (pmp0cfg_ref.regval_of (pmp0cfg_ref.read_from s)) else + if reg_name = "tselect" then SOME (tselect_ref.regval_of (tselect_ref.read_from s)) else + if reg_name = "stval" then SOME (stval_ref.regval_of (stval_ref.read_from s)) else + if reg_name = "scause" then SOME (scause_ref.regval_of (scause_ref.read_from s)) else + if reg_name = "sepc" then SOME (sepc_ref.regval_of (sepc_ref.read_from s)) else + if reg_name = "sscratch" then SOME (sscratch_ref.regval_of (sscratch_ref.read_from s)) else + if reg_name = "stvec" then SOME (stvec_ref.regval_of (stvec_ref.read_from s)) else + if reg_name = "sideleg" then SOME (sideleg_ref.regval_of (sideleg_ref.read_from s)) else + if reg_name = "sedeleg" then SOME (sedeleg_ref.regval_of (sedeleg_ref.read_from s)) else + if reg_name = "mhartid" then SOME (mhartid_ref.regval_of (mhartid_ref.read_from s)) else + if reg_name = "marchid" then SOME (marchid_ref.regval_of (marchid_ref.read_from s)) else + if reg_name = "mimpid" then SOME (mimpid_ref.regval_of (mimpid_ref.read_from s)) else + if reg_name = "mvendorid" then SOME (mvendorid_ref.regval_of (mvendorid_ref.read_from s)) else + if reg_name = "minstret_written" then SOME (minstret_written_ref.regval_of (minstret_written_ref.read_from s)) else + if reg_name = "minstret" then SOME (minstret_ref.regval_of (minstret_ref.read_from s)) else + if reg_name = "mtime" then SOME (mtime_ref.regval_of (mtime_ref.read_from s)) else + if reg_name = "mcycle" then SOME (mcycle_ref.regval_of (mcycle_ref.read_from s)) else + if reg_name = "scounteren" then SOME (scounteren_ref.regval_of (scounteren_ref.read_from s)) else + if reg_name = "mcounteren" then SOME (mcounteren_ref.regval_of (mcounteren_ref.read_from s)) else + if reg_name = "mscratch" then SOME (mscratch_ref.regval_of (mscratch_ref.read_from s)) else + if reg_name = "mtval" then SOME (mtval_ref.regval_of (mtval_ref.read_from s)) else + if reg_name = "mepc" then SOME (mepc_ref.regval_of (mepc_ref.read_from s)) else + if reg_name = "mcause" then SOME (mcause_ref.regval_of (mcause_ref.read_from s)) else + if reg_name = "mtvec" then SOME (mtvec_ref.regval_of (mtvec_ref.read_from s)) else + if reg_name = "medeleg" then SOME (medeleg_ref.regval_of (medeleg_ref.read_from s)) else + if reg_name = "mideleg" then SOME (mideleg_ref.regval_of (mideleg_ref.read_from s)) else + if reg_name = "mie" then SOME (mie_ref.regval_of (mie_ref.read_from s)) else + if reg_name = "mip" then SOME (mip_ref.regval_of (mip_ref.read_from s)) else + if reg_name = "mstatus" then SOME (mstatus_ref.regval_of (mstatus_ref.read_from s)) else + if reg_name = "misa" then SOME (misa_ref.regval_of (misa_ref.read_from s)) else + if reg_name = "cur_inst" then SOME (cur_inst_ref.regval_of (cur_inst_ref.read_from s)) else + if reg_name = "cur_privilege" then SOME (cur_privilege_ref.regval_of (cur_privilege_ref.read_from s)) else + if reg_name = "x31" then SOME (x31_ref.regval_of (x31_ref.read_from s)) else + if reg_name = "x30" then SOME (x30_ref.regval_of (x30_ref.read_from s)) else + if reg_name = "x29" then SOME (x29_ref.regval_of (x29_ref.read_from s)) else + if reg_name = "x28" then SOME (x28_ref.regval_of (x28_ref.read_from s)) else + if reg_name = "x27" then SOME (x27_ref.regval_of (x27_ref.read_from s)) else + if reg_name = "x26" then SOME (x26_ref.regval_of (x26_ref.read_from s)) else + if reg_name = "x25" then SOME (x25_ref.regval_of (x25_ref.read_from s)) else + if reg_name = "x24" then SOME (x24_ref.regval_of (x24_ref.read_from s)) else + if reg_name = "x23" then SOME (x23_ref.regval_of (x23_ref.read_from s)) else + if reg_name = "x22" then SOME (x22_ref.regval_of (x22_ref.read_from s)) else + if reg_name = "x21" then SOME (x21_ref.regval_of (x21_ref.read_from s)) else + if reg_name = "x20" then SOME (x20_ref.regval_of (x20_ref.read_from s)) else + if reg_name = "x19" then SOME (x19_ref.regval_of (x19_ref.read_from s)) else + if reg_name = "x18" then SOME (x18_ref.regval_of (x18_ref.read_from s)) else + if reg_name = "x17" then SOME (x17_ref.regval_of (x17_ref.read_from s)) else + if reg_name = "x16" then SOME (x16_ref.regval_of (x16_ref.read_from s)) else + if reg_name = "x15" then SOME (x15_ref.regval_of (x15_ref.read_from s)) else + if reg_name = "x14" then SOME (x14_ref.regval_of (x14_ref.read_from s)) else + if reg_name = "x13" then SOME (x13_ref.regval_of (x13_ref.read_from s)) else + if reg_name = "x12" then SOME (x12_ref.regval_of (x12_ref.read_from s)) else + if reg_name = "x11" then SOME (x11_ref.regval_of (x11_ref.read_from s)) else + if reg_name = "x10" then SOME (x10_ref.regval_of (x10_ref.read_from s)) else + if reg_name = "x9" then SOME (x9_ref.regval_of (x9_ref.read_from s)) else + if reg_name = "x8" then SOME (x8_ref.regval_of (x8_ref.read_from s)) else + if reg_name = "x7" then SOME (x7_ref.regval_of (x7_ref.read_from s)) else + if reg_name = "x6" then SOME (x6_ref.regval_of (x6_ref.read_from s)) else + if reg_name = "x5" then SOME (x5_ref.regval_of (x5_ref.read_from s)) else + if reg_name = "x4" then SOME (x4_ref.regval_of (x4_ref.read_from s)) else + if reg_name = "x3" then SOME (x3_ref.regval_of (x3_ref.read_from s)) else + if reg_name = "x2" then SOME (x2_ref.regval_of (x2_ref.read_from s)) else + if reg_name = "x1" then SOME (x1_ref.regval_of (x1_ref.read_from s)) else + if reg_name = "Xs" then SOME (Xs_ref.regval_of (Xs_ref.read_from s)) else + if reg_name = "instbits" then SOME (instbits_ref.regval_of (instbits_ref.read_from s)) else + if reg_name = "nextPC" then SOME (nextPC_ref.regval_of (nextPC_ref.read_from s)) else + if reg_name = "PC" then SOME (PC_ref.regval_of (PC_ref.read_from s)) else + NONE))`; + + +(*val set_regval : string -> register_value -> regstate -> maybe regstate*) +val _ = Define ` + ((set_regval:string -> register_value -> regstate ->(regstate)option) reg_name v s= + (if reg_name = "satp" then OPTION_MAP (\ v . satp_ref.write_to v s) (satp_ref.of_regval v) else + if reg_name = "tlb32" then OPTION_MAP (\ v . tlb32_ref.write_to v s) (tlb32_ref.of_regval v) else + if reg_name = "htif_exit_code" then OPTION_MAP (\ v . htif_exit_code_ref.write_to v s) (htif_exit_code_ref.of_regval v) else + if reg_name = "htif_done" then OPTION_MAP (\ v . htif_done_ref.write_to v s) (htif_done_ref.of_regval v) else + if reg_name = "htif_tohost" then OPTION_MAP (\ v . htif_tohost_ref.write_to v s) (htif_tohost_ref.of_regval v) else + if reg_name = "mtimecmp" then OPTION_MAP (\ v . mtimecmp_ref.write_to v s) (mtimecmp_ref.of_regval v) else + if reg_name = "utval" then OPTION_MAP (\ v . utval_ref.write_to v s) (utval_ref.of_regval v) else + if reg_name = "ucause" then OPTION_MAP (\ v . ucause_ref.write_to v s) (ucause_ref.of_regval v) else + if reg_name = "uepc" then OPTION_MAP (\ v . uepc_ref.write_to v s) (uepc_ref.of_regval v) else + if reg_name = "uscratch" then OPTION_MAP (\ v . uscratch_ref.write_to v s) (uscratch_ref.of_regval v) else + if reg_name = "utvec" then OPTION_MAP (\ v . utvec_ref.write_to v s) (utvec_ref.of_regval v) else + if reg_name = "pmpaddr15" then OPTION_MAP (\ v . pmpaddr15_ref.write_to v s) (pmpaddr15_ref.of_regval v) else + if reg_name = "pmpaddr14" then OPTION_MAP (\ v . pmpaddr14_ref.write_to v s) (pmpaddr14_ref.of_regval v) else + if reg_name = "pmpaddr13" then OPTION_MAP (\ v . pmpaddr13_ref.write_to v s) (pmpaddr13_ref.of_regval v) else + if reg_name = "pmpaddr12" then OPTION_MAP (\ v . pmpaddr12_ref.write_to v s) (pmpaddr12_ref.of_regval v) else + if reg_name = "pmpaddr11" then OPTION_MAP (\ v . pmpaddr11_ref.write_to v s) (pmpaddr11_ref.of_regval v) else + if reg_name = "pmpaddr10" then OPTION_MAP (\ v . pmpaddr10_ref.write_to v s) (pmpaddr10_ref.of_regval v) else + if reg_name = "pmpaddr9" then OPTION_MAP (\ v . pmpaddr9_ref.write_to v s) (pmpaddr9_ref.of_regval v) else + if reg_name = "pmpaddr8" then OPTION_MAP (\ v . pmpaddr8_ref.write_to v s) (pmpaddr8_ref.of_regval v) else + if reg_name = "pmpaddr7" then OPTION_MAP (\ v . pmpaddr7_ref.write_to v s) (pmpaddr7_ref.of_regval v) else + if reg_name = "pmpaddr6" then OPTION_MAP (\ v . pmpaddr6_ref.write_to v s) (pmpaddr6_ref.of_regval v) else + if reg_name = "pmpaddr5" then OPTION_MAP (\ v . pmpaddr5_ref.write_to v s) (pmpaddr5_ref.of_regval v) else + if reg_name = "pmpaddr4" then OPTION_MAP (\ v . pmpaddr4_ref.write_to v s) (pmpaddr4_ref.of_regval v) else + if reg_name = "pmpaddr3" then OPTION_MAP (\ v . pmpaddr3_ref.write_to v s) (pmpaddr3_ref.of_regval v) else + if reg_name = "pmpaddr2" then OPTION_MAP (\ v . pmpaddr2_ref.write_to v s) (pmpaddr2_ref.of_regval v) else + if reg_name = "pmpaddr1" then OPTION_MAP (\ v . pmpaddr1_ref.write_to v s) (pmpaddr1_ref.of_regval v) else + if reg_name = "pmpaddr0" then OPTION_MAP (\ v . pmpaddr0_ref.write_to v s) (pmpaddr0_ref.of_regval v) else + if reg_name = "pmp15cfg" then OPTION_MAP (\ v . pmp15cfg_ref.write_to v s) (pmp15cfg_ref.of_regval v) else + if reg_name = "pmp14cfg" then OPTION_MAP (\ v . pmp14cfg_ref.write_to v s) (pmp14cfg_ref.of_regval v) else + if reg_name = "pmp13cfg" then OPTION_MAP (\ v . pmp13cfg_ref.write_to v s) (pmp13cfg_ref.of_regval v) else + if reg_name = "pmp12cfg" then OPTION_MAP (\ v . pmp12cfg_ref.write_to v s) (pmp12cfg_ref.of_regval v) else + if reg_name = "pmp11cfg" then OPTION_MAP (\ v . pmp11cfg_ref.write_to v s) (pmp11cfg_ref.of_regval v) else + if reg_name = "pmp10cfg" then OPTION_MAP (\ v . pmp10cfg_ref.write_to v s) (pmp10cfg_ref.of_regval v) else + if reg_name = "pmp9cfg" then OPTION_MAP (\ v . pmp9cfg_ref.write_to v s) (pmp9cfg_ref.of_regval v) else + if reg_name = "pmp8cfg" then OPTION_MAP (\ v . pmp8cfg_ref.write_to v s) (pmp8cfg_ref.of_regval v) else + if reg_name = "pmp7cfg" then OPTION_MAP (\ v . pmp7cfg_ref.write_to v s) (pmp7cfg_ref.of_regval v) else + if reg_name = "pmp6cfg" then OPTION_MAP (\ v . pmp6cfg_ref.write_to v s) (pmp6cfg_ref.of_regval v) else + if reg_name = "pmp5cfg" then OPTION_MAP (\ v . pmp5cfg_ref.write_to v s) (pmp5cfg_ref.of_regval v) else + if reg_name = "pmp4cfg" then OPTION_MAP (\ v . pmp4cfg_ref.write_to v s) (pmp4cfg_ref.of_regval v) else + if reg_name = "pmp3cfg" then OPTION_MAP (\ v . pmp3cfg_ref.write_to v s) (pmp3cfg_ref.of_regval v) else + if reg_name = "pmp2cfg" then OPTION_MAP (\ v . pmp2cfg_ref.write_to v s) (pmp2cfg_ref.of_regval v) else + if reg_name = "pmp1cfg" then OPTION_MAP (\ v . pmp1cfg_ref.write_to v s) (pmp1cfg_ref.of_regval v) else + if reg_name = "pmp0cfg" then OPTION_MAP (\ v . pmp0cfg_ref.write_to v s) (pmp0cfg_ref.of_regval v) else + if reg_name = "tselect" then OPTION_MAP (\ v . tselect_ref.write_to v s) (tselect_ref.of_regval v) else + if reg_name = "stval" then OPTION_MAP (\ v . stval_ref.write_to v s) (stval_ref.of_regval v) else + if reg_name = "scause" then OPTION_MAP (\ v . scause_ref.write_to v s) (scause_ref.of_regval v) else + if reg_name = "sepc" then OPTION_MAP (\ v . sepc_ref.write_to v s) (sepc_ref.of_regval v) else + if reg_name = "sscratch" then OPTION_MAP (\ v . sscratch_ref.write_to v s) (sscratch_ref.of_regval v) else + if reg_name = "stvec" then OPTION_MAP (\ v . stvec_ref.write_to v s) (stvec_ref.of_regval v) else + if reg_name = "sideleg" then OPTION_MAP (\ v . sideleg_ref.write_to v s) (sideleg_ref.of_regval v) else + if reg_name = "sedeleg" then OPTION_MAP (\ v . sedeleg_ref.write_to v s) (sedeleg_ref.of_regval v) else + if reg_name = "mhartid" then OPTION_MAP (\ v . mhartid_ref.write_to v s) (mhartid_ref.of_regval v) else + if reg_name = "marchid" then OPTION_MAP (\ v . marchid_ref.write_to v s) (marchid_ref.of_regval v) else + if reg_name = "mimpid" then OPTION_MAP (\ v . mimpid_ref.write_to v s) (mimpid_ref.of_regval v) else + if reg_name = "mvendorid" then OPTION_MAP (\ v . mvendorid_ref.write_to v s) (mvendorid_ref.of_regval v) else + if reg_name = "minstret_written" then OPTION_MAP (\ v . minstret_written_ref.write_to v s) (minstret_written_ref.of_regval v) else + if reg_name = "minstret" then OPTION_MAP (\ v . minstret_ref.write_to v s) (minstret_ref.of_regval v) else + if reg_name = "mtime" then OPTION_MAP (\ v . mtime_ref.write_to v s) (mtime_ref.of_regval v) else + if reg_name = "mcycle" then OPTION_MAP (\ v . mcycle_ref.write_to v s) (mcycle_ref.of_regval v) else + if reg_name = "scounteren" then OPTION_MAP (\ v . scounteren_ref.write_to v s) (scounteren_ref.of_regval v) else + if reg_name = "mcounteren" then OPTION_MAP (\ v . mcounteren_ref.write_to v s) (mcounteren_ref.of_regval v) else + if reg_name = "mscratch" then OPTION_MAP (\ v . mscratch_ref.write_to v s) (mscratch_ref.of_regval v) else + if reg_name = "mtval" then OPTION_MAP (\ v . mtval_ref.write_to v s) (mtval_ref.of_regval v) else + if reg_name = "mepc" then OPTION_MAP (\ v . mepc_ref.write_to v s) (mepc_ref.of_regval v) else + if reg_name = "mcause" then OPTION_MAP (\ v . mcause_ref.write_to v s) (mcause_ref.of_regval v) else + if reg_name = "mtvec" then OPTION_MAP (\ v . mtvec_ref.write_to v s) (mtvec_ref.of_regval v) else + if reg_name = "medeleg" then OPTION_MAP (\ v . medeleg_ref.write_to v s) (medeleg_ref.of_regval v) else + if reg_name = "mideleg" then OPTION_MAP (\ v . mideleg_ref.write_to v s) (mideleg_ref.of_regval v) else + if reg_name = "mie" then OPTION_MAP (\ v . mie_ref.write_to v s) (mie_ref.of_regval v) else + if reg_name = "mip" then OPTION_MAP (\ v . mip_ref.write_to v s) (mip_ref.of_regval v) else + if reg_name = "mstatus" then OPTION_MAP (\ v . mstatus_ref.write_to v s) (mstatus_ref.of_regval v) else + if reg_name = "misa" then OPTION_MAP (\ v . misa_ref.write_to v s) (misa_ref.of_regval v) else + if reg_name = "cur_inst" then OPTION_MAP (\ v . cur_inst_ref.write_to v s) (cur_inst_ref.of_regval v) else + if reg_name = "cur_privilege" then OPTION_MAP (\ v . cur_privilege_ref.write_to v s) (cur_privilege_ref.of_regval v) else + if reg_name = "x31" then OPTION_MAP (\ v . x31_ref.write_to v s) (x31_ref.of_regval v) else + if reg_name = "x30" then OPTION_MAP (\ v . x30_ref.write_to v s) (x30_ref.of_regval v) else + if reg_name = "x29" then OPTION_MAP (\ v . x29_ref.write_to v s) (x29_ref.of_regval v) else + if reg_name = "x28" then OPTION_MAP (\ v . x28_ref.write_to v s) (x28_ref.of_regval v) else + if reg_name = "x27" then OPTION_MAP (\ v . x27_ref.write_to v s) (x27_ref.of_regval v) else + if reg_name = "x26" then OPTION_MAP (\ v . x26_ref.write_to v s) (x26_ref.of_regval v) else + if reg_name = "x25" then OPTION_MAP (\ v . x25_ref.write_to v s) (x25_ref.of_regval v) else + if reg_name = "x24" then OPTION_MAP (\ v . x24_ref.write_to v s) (x24_ref.of_regval v) else + if reg_name = "x23" then OPTION_MAP (\ v . x23_ref.write_to v s) (x23_ref.of_regval v) else + if reg_name = "x22" then OPTION_MAP (\ v . x22_ref.write_to v s) (x22_ref.of_regval v) else + if reg_name = "x21" then OPTION_MAP (\ v . x21_ref.write_to v s) (x21_ref.of_regval v) else + if reg_name = "x20" then OPTION_MAP (\ v . x20_ref.write_to v s) (x20_ref.of_regval v) else + if reg_name = "x19" then OPTION_MAP (\ v . x19_ref.write_to v s) (x19_ref.of_regval v) else + if reg_name = "x18" then OPTION_MAP (\ v . x18_ref.write_to v s) (x18_ref.of_regval v) else + if reg_name = "x17" then OPTION_MAP (\ v . x17_ref.write_to v s) (x17_ref.of_regval v) else + if reg_name = "x16" then OPTION_MAP (\ v . x16_ref.write_to v s) (x16_ref.of_regval v) else + if reg_name = "x15" then OPTION_MAP (\ v . x15_ref.write_to v s) (x15_ref.of_regval v) else + if reg_name = "x14" then OPTION_MAP (\ v . x14_ref.write_to v s) (x14_ref.of_regval v) else + if reg_name = "x13" then OPTION_MAP (\ v . x13_ref.write_to v s) (x13_ref.of_regval v) else + if reg_name = "x12" then OPTION_MAP (\ v . x12_ref.write_to v s) (x12_ref.of_regval v) else + if reg_name = "x11" then OPTION_MAP (\ v . x11_ref.write_to v s) (x11_ref.of_regval v) else + if reg_name = "x10" then OPTION_MAP (\ v . x10_ref.write_to v s) (x10_ref.of_regval v) else + if reg_name = "x9" then OPTION_MAP (\ v . x9_ref.write_to v s) (x9_ref.of_regval v) else + if reg_name = "x8" then OPTION_MAP (\ v . x8_ref.write_to v s) (x8_ref.of_regval v) else + if reg_name = "x7" then OPTION_MAP (\ v . x7_ref.write_to v s) (x7_ref.of_regval v) else + if reg_name = "x6" then OPTION_MAP (\ v . x6_ref.write_to v s) (x6_ref.of_regval v) else + if reg_name = "x5" then OPTION_MAP (\ v . x5_ref.write_to v s) (x5_ref.of_regval v) else + if reg_name = "x4" then OPTION_MAP (\ v . x4_ref.write_to v s) (x4_ref.of_regval v) else + if reg_name = "x3" then OPTION_MAP (\ v . x3_ref.write_to v s) (x3_ref.of_regval v) else + if reg_name = "x2" then OPTION_MAP (\ v . x2_ref.write_to v s) (x2_ref.of_regval v) else + if reg_name = "x1" then OPTION_MAP (\ v . x1_ref.write_to v s) (x1_ref.of_regval v) else + if reg_name = "Xs" then OPTION_MAP (\ v . Xs_ref.write_to v s) (Xs_ref.of_regval v) else + if reg_name = "instbits" then OPTION_MAP (\ v . instbits_ref.write_to v s) (instbits_ref.of_regval v) else + if reg_name = "nextPC" then OPTION_MAP (\ v . nextPC_ref.write_to v s) (nextPC_ref.of_regval v) else + if reg_name = "PC" then OPTION_MAP (\ v . PC_ref.write_to v s) (PC_ref.of_regval v) else + NONE))`; + + +val _ = Define ` + ((register_accessors:(string -> regstate ->(register_value)option)#(string -> register_value -> regstate ->(regstate)option))= (get_regval, set_regval))`; + + + +val _ = type_abbrev((* ( 'a, 'r) *) "MR" , ``: (regstate, 'a, 'r, exception)monadR``); +val _ = type_abbrev((* 'a *) "M" , ``: (regstate, 'a, exception)monad``); +val _ = export_theory() + |