diff options
Diffstat (limited to 'ocaml_emulator')
| -rw-r--r-- | ocaml_emulator/platform.ml | 2 | ||||
| -rw-r--r-- | ocaml_emulator/riscv_ocaml_sim.ml | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/ocaml_emulator/platform.ml b/ocaml_emulator/platform.ml index 2f0aaaf..1d2f3de 100644 --- a/ocaml_emulator/platform.ml +++ b/ocaml_emulator/platform.ml @@ -10,6 +10,7 @@ let config_enable_writable_misa = ref true let config_enable_dirty_update = ref false let config_enable_misaligned_access = ref false let config_mtval_has_illegal_inst_bits = ref false +let config_enable_svinval = ref false let config_enable_zcb = ref false let config_enable_writable_fiom = ref true let config_enable_vext = ref true @@ -89,6 +90,7 @@ let enable_vext () = !config_enable_vext let enable_dirty_update () = !config_enable_dirty_update let enable_misaligned_access () = !config_enable_misaligned_access let mtval_has_illegal_inst_bits () = !config_mtval_has_illegal_inst_bits +let enable_svinval () = !config_enable_svinval let enable_zcb () = !config_enable_zcb let enable_zfinx () = false let enable_writable_fiom () = !config_enable_writable_fiom diff --git a/ocaml_emulator/riscv_ocaml_sim.ml b/ocaml_emulator/riscv_ocaml_sim.ml index 8dad8a4..56be8d8 100644 --- a/ocaml_emulator/riscv_ocaml_sim.ml +++ b/ocaml_emulator/riscv_ocaml_sim.ml @@ -53,6 +53,9 @@ let options = Arg.align ([("-dump-dts", ("-mtval-has-illegal-inst-bits", Arg.Set P.config_mtval_has_illegal_inst_bits, " mtval stores instruction bits on an illegal instruction exception"); + ("-enable-svinval", + Arg.Set P.config_enable_svinval, + " enable Svinval extension"); ("-enable-zcb", Arg.Set P.config_enable_zcb, " enable Zcb (simple code size) extension"); |