diff options
Diffstat (limited to 'model/riscv_vext_regs.sail')
| -rw-r--r-- | model/riscv_vext_regs.sail | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/model/riscv_vext_regs.sail b/model/riscv_vext_regs.sail index 7faa50b..b74e081 100644 --- a/model/riscv_vext_regs.sail +++ b/model/riscv_vext_regs.sail @@ -108,8 +108,8 @@ mapping vreg_name = { function dirty_v_context() -> unit = { assert(sys_enable_vext()); - mstatus->VS() = extStatus_to_bits(Dirty); - mstatus->SD() = 0b1 + mstatus[VS] = extStatus_to_bits(Dirty); + mstatus[SD] = 0b1 } function dirty_v_context_if_present() -> unit = { @@ -259,8 +259,8 @@ register vcsr : Vcsr val ext_write_vcsr : (bits(2), bits(1)) -> unit function ext_write_vcsr (vxrm_val, vxsat_val) = { - vcsr->vxrm() = vxrm_val; /* Note: frm can be an illegal value, 101, 110, 111 */ - vcsr->vxsat() = vxsat_val; + vcsr[vxrm] = vxrm_val; /* Note: frm can be an illegal value, 101, 110, 111 */ + vcsr[vxsat] = vxsat_val; dirty_v_context_if_present() } |