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-rw-r--r--model/riscv_types.sail3
1 files changed, 2 insertions, 1 deletions
diff --git a/model/riscv_types.sail b/model/riscv_types.sail
index cf3edac..c0e538f 100644
--- a/model/riscv_types.sail
+++ b/model/riscv_types.sail
@@ -435,13 +435,14 @@ function extStatus_of_bits(e) =
/* supervisor-level address translation modes */
type satp_mode = bits(4)
-enum SATPMode = {Sbare, Sv32, Sv39}
+enum SATPMode = {Sbare, Sv32, Sv39, Sv48}
function satp64Mode_of_bits(a : Architecture, m : satp_mode) -> option(SATPMode) =
match (a, m) {
(_, 0x0) => Some(Sbare),
(RV32, 0x1) => Some(Sv32),
(RV64, 0x8) => Some(Sv39),
+ (RV64, 0x9) => Some(Sv48),
(_, _) => None()
}