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-rw-r--r--model/riscv_fetch_rvfi.sail2
1 files changed, 1 insertions, 1 deletions
diff --git a/model/riscv_fetch_rvfi.sail b/model/riscv_fetch_rvfi.sail
index 03b6010..c2a5e74 100644
--- a/model/riscv_fetch_rvfi.sail
+++ b/model/riscv_fetch_rvfi.sail
@@ -5,7 +5,7 @@ function fetch() -> FetchResult =
else {
let i = rvfi_instruction.rvfi_insn();
rvfi_exec->rvfi_order() = minstret;
- rvfi_exec->rvfi_pc_rdata() = EXTZ(PC);
+ rvfi_exec->rvfi_pc_rdata() = EXTZ(get_arch_pc());
rvfi_exec->rvfi_insn() = EXTZ(i);
/* TODO: should we write these even if they're not really registers? */