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-rw-r--r--c_emulator/riscv_sim.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/c_emulator/riscv_sim.c b/c_emulator/riscv_sim.c
index 3a9bfc0..a24bf0c 100644
--- a/c_emulator/riscv_sim.c
+++ b/c_emulator/riscv_sim.c
@@ -49,12 +49,14 @@ const char *RV32ISA = "RV32IMAC";
#define CSR_MTVAL 0x343
#define CSR_MIP 0x344
-#define OPT_TRACE_OUTPUT 1000
-#define OPT_ENABLE_WRITABLE_FIOM 1001
-#define OPT_PMP_COUNT 1002
-#define OPT_PMP_GRAIN 1003
-#define OPT_ENABLE_SVINVAL 1004
-#define OPT_ENABLE_ZCB 10014
+enum {
+ OPT_TRACE_OUTPUT = 1000,
+ OPT_ENABLE_WRITABLE_FIOM,
+ OPT_PMP_COUNT,
+ OPT_PMP_GRAIN,
+ OPT_ENABLE_SVINVAL,
+ OPT_ENABLE_ZCB,
+};
static bool do_dump_dts = false;
static bool do_show_times = false;