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author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2018-07-03 14:47:59 -0700 |
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committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2018-07-03 14:48:04 -0700 |
commit | 6305b6a8c3b219286d1892940f59eddcb67be210 (patch) | |
tree | e22e2f1461f2658cb2fe117c6d00c6b091888f7d /platform_impl.ml | |
parent | d799ca781de4f93744c60b7c3bab660d4893e2a3 (diff) | |
download | sail-riscv-6305b6a8c3b219286d1892940f59eddcb67be210.zip sail-riscv-6305b6a8c3b219286d1892940f59eddcb67be210.tar.gz sail-riscv-6305b6a8c3b219286d1892940f59eddcb67be210.tar.bz2 |
Allow the riscv htif_tohost mmio port to be readable, and ack writes to that port.
Diffstat (limited to 'platform_impl.ml')
-rw-r--r-- | platform_impl.ml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/platform_impl.ml b/platform_impl.ml index aab272f..5c238a1 100644 --- a/platform_impl.ml +++ b/platform_impl.ml @@ -107,7 +107,7 @@ let cpu_hz = 1000000000;; let insns_per_tick = 100;; let mems = [ { addr = dram_base; - size = dram_size } ];; + size = dram_size } ];; let dts = spike_dts "rv64imac" cpu_hz insns_per_tick mems;; let bytes_to_string bytes = |