os-boot: Add a Spike-derivative DTS with chosen node for Hafnium

1 files changed, 53 insertions, 0 deletions

diff --git a/os-boot/rv64-2gb-hafnium.dts b/os-boot/rv64-2gb-hafnium.dts
new file mode 100644
index 0000000..d67bfb2
--- /dev/null
+++ b/os-boot/rv64-2gb-hafnium.dts
@@ -0,0 +1,53 @@
+/dts-v1/;
+
+/ {
+  #address-cells = <2>;
+  #size-cells = <2>;
+  compatible = "ucbbar,spike-bare-dev";
+  model = "ucbbar,spike-bare";
+  cpus {
+    #address-cells = <1>;
+    #size-cells = <0>;
+    timebase-frequency = <10000000>;
+    CPU0: cpu@0 {
+      device_type = "cpu";
+      reg = <0>;
+      status = "okay";
+      compatible = "riscv";
+      riscv,isa = "rv64imac";
+      mmu-type = "riscv,sv39";
+      clock-frequency = <1000000000>;
+      CPU0_intc: interrupt-controller {
+        #interrupt-cells = <1>;
+        interrupt-controller;
+        compatible = "riscv,cpu-intc";
+      };
+    };
+  };
+  memory@80000000 {
+    device_type = "memory";
+    reg = <0x0 0x80000000 0x0 0x80000000>;
+  };
+  soc {
+    #address-cells = <2>;
+    #size-cells = <2>;
+    compatible = "ucbbar,spike-bare-soc", "simple-bus";
+    ranges;
+    clint@2000000 {
+      compatible = "riscv,clint0";
+      interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7 >;
+      reg = <0x0 0x2000000 0x0 0xc0000>;
+    };
+  };
+  htif {
+    compatible = "ucb,htif0";
+  };
+  chosen {
+	  #address-cells = <2>;
+	  #size-cells = <2>;
+	  linux,initrd-end = <0 0>;
+	  linux,initrd-start = <0 0>;
+	  bootargs = "rdinit=/sbin/init";
+	  stdout-path = "";
+  };
+};