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| author | Jon French <jf451@cam.ac.uk> | 2019-04-12 14:42:33 +0100 |
|---|---|---|
| committer | Jon French <jf451@cam.ac.uk> | 2019-04-12 14:42:33 +0100 |
| commit | 4ddeb44d2eed3f97ddb3739f1a44af8973936b89 (patch) | |
| tree | bf8af6ab037e98c9630e61abf25d81990a53b42b /ocaml_emulator/platform.ml | |
| parent | d8cd74d5ea994957a607819267afc03f05f3566b (diff) | |
| parent | ca184a708aa5336efe573fed14d4dfcd9cb27dde (diff) | |
| download | sail-riscv-rmem_interpreter.zip sail-riscv-rmem_interpreter.tar.gz sail-riscv-rmem_interpreter.tar.bz2 | |
Merge branch 'master' into rmem_interpreterrmem_interpreter
Diffstat (limited to 'ocaml_emulator/platform.ml')
| -rw-r--r-- | ocaml_emulator/platform.ml | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/ocaml_emulator/platform.ml b/ocaml_emulator/platform.ml index 45e3d43..95e7c57 100644 --- a/ocaml_emulator/platform.ml +++ b/ocaml_emulator/platform.ml @@ -4,8 +4,10 @@ module Elf = Elf_loader;; (* Platform configuration *) -let config_enable_dirty_update = ref false -let config_enable_misaligned_access = ref false +let config_enable_rvc = ref true +let config_enable_writable_misa = ref true +let config_enable_dirty_update = ref false +let config_enable_misaligned_access = ref false let config_mtval_has_illegal_inst_bits = ref false let platform_arch = ref P.RV64 @@ -65,24 +67,27 @@ let make_rom arch start_pc = *) rom ) -let enable_dirty_update () = !config_enable_dirty_update -let enable_misaligned_access () = !config_enable_misaligned_access -let mtval_has_illegal_inst_bits () = !config_mtval_has_illegal_inst_bits +let enable_writable_misa () = !config_enable_writable_misa +let enable_rvc () = !config_enable_rvc +let enable_dirty_update () = !config_enable_dirty_update +let enable_misaligned_access () = !config_enable_misaligned_access +let mtval_has_illegal_inst_bits () = !config_mtval_has_illegal_inst_bits -let rom_base () = arch_bits_of_int64 P.rom_base -let rom_size () = arch_bits_of_int !rom_size_ref +let rom_base () = arch_bits_of_int64 P.rom_base +let rom_size () = arch_bits_of_int !rom_size_ref -let dram_base () = arch_bits_of_int64 P.dram_base -let dram_size () = arch_bits_of_int64 !P.dram_size_ref - -let htif_tohost () = - arch_bits_of_int64 (Big_int.to_int64 (Elf.elf_tohost ())) +let dram_base () = arch_bits_of_int64 P.dram_base +let dram_size () = arch_bits_of_int64 !P.dram_size_ref let clint_base () = arch_bits_of_int64 P.clint_base let clint_size () = arch_bits_of_int64 P.clint_size let insns_per_tick () = Big_int.of_int P.insns_per_tick +let htif_tohost () = + arch_bits_of_int64 (Big_int.to_int64 (Elf.elf_tohost ())) + + (* load reservation *) let speculate_conditional () = true |