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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-02-19 11:14:03 -0800 |
|---|---|---|
| committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-02-19 11:14:55 -0800 |
| commit | a238acdcd83f2db3c6d549775f16ac8b4ad2291e (patch) | |
| tree | a28438b5267d1161b8006165e9c7ec05863c979b /model/riscv_xlen64.sail | |
| parent | 0eef275efdad608046587cd5ed281746e0a31f97 (diff) | |
| download | sail-riscv-a238acdcd83f2db3c6d549775f16ac8b4ad2291e.zip sail-riscv-a238acdcd83f2db3c6d549775f16ac8b4ad2291e.tar.gz sail-riscv-a238acdcd83f2db3c6d549775f16ac8b4ad2291e.tar.bz2 | |
Adjust Makefile to use an ARCH argument. Undo xlen guards in riscv_analysis, instead conditionally include it in sources, depending on the ARCH.
Diffstat (limited to 'model/riscv_xlen64.sail')
| -rw-r--r-- | model/riscv_xlen64.sail | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/model/riscv_xlen64.sail b/model/riscv_xlen64.sail new file mode 100644 index 0000000..9130ec4 --- /dev/null +++ b/model/riscv_xlen64.sail @@ -0,0 +1,10 @@ +/* Define the XLEN value for the architecture. */ + +// type-level definitions +type xlen : Int = 64 +type xlen_bytes : Int = 8 +type xlenbits = bits(xlen) + +// value-level definitions +let xlen : int(xlen) = 64 +let xlen_bytes = 8 // byte-width of xlen bits |