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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-02-11 17:58:57 -0800 |
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| committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-02-11 18:45:48 -0800 |
| commit | b860868ed7bc762f31d29aaea50873e596db6861 (patch) | |
| tree | 315fad068e0affe670497e7c51842381f8fc8418 /model/riscv_vmem_common.sail | |
| parent | b9cccb81930ebe51f6e13621de3d9cf67f46ee6a (diff) | |
| download | sail-riscv-b860868ed7bc762f31d29aaea50873e596db6861.zip sail-riscv-b860868ed7bc762f31d29aaea50873e596db6861.tar.gz sail-riscv-b860868ed7bc762f31d29aaea50873e596db6861.tar.bz2 | |
Handle 32-bit accesses to the mmio regions and device registers of the clint and htif.
Diffstat (limited to 'model/riscv_vmem_common.sail')
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