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| author | Scott Johnson <scott.johnson@arilinc.com> | 2020-08-25 12:32:18 -0700 |
|---|---|---|
| committer | Scott Johnson <scott.johnson@arilinc.com> | 2020-08-25 12:32:34 -0700 |
| commit | 937a17e8f66f520fe2447591e066fdf9f14f0635 (patch) | |
| tree | 8d6eb07dbd350750fc983000bb597f2976b30d9b /model/riscv_sys_regs.sail | |
| parent | 21cde61d5a402737dc7dd098e9ebaa6f32697cf8 (diff) | |
| download | sail-riscv-937a17e8f66f520fe2447591e066fdf9f14f0635.zip sail-riscv-937a17e8f66f520fe2447591e066fdf9f14f0635.tar.gz sail-riscv-937a17e8f66f520fe2447591e066fdf9f14f0635.tar.bz2 | |
Implement mcountinhibit IR bit to squash minstret increment
Diffstat (limited to 'model/riscv_sys_regs.sail')
| -rw-r--r-- | model/riscv_sys_regs.sail | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/model/riscv_sys_regs.sail b/model/riscv_sys_regs.sail index d29fd4b..10f2dfb 100644 --- a/model/riscv_sys_regs.sail +++ b/model/riscv_sys_regs.sail @@ -436,7 +436,8 @@ register minstret_written : bool function retire_instruction() -> unit = { if minstret_written == true then minstret_written = false - else minstret = minstret + 1 + else if mcountinhibit.IR() == 0b0 + then minstret = minstret + 1 } /* informational registers */ |