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authorPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-01-25 12:00:20 -0800
committerPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-01-25 12:02:05 -0800
commit9fa19dea706381e2a9c0c4aa226124adaf328f1a (patch)
tree18ce5022763b8d3b159a99956923f91d32e6ddeb /model/riscv_step.sail
parent6aae2163fb13fc3f3ccd85c2304f20a4d1165b44 (diff)
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Add misa checks for instructions not in the base set.
Diffstat (limited to 'model/riscv_step.sail')
-rw-r--r--model/riscv_step.sail9
1 files changed, 7 insertions, 2 deletions
diff --git a/model/riscv_step.sail b/model/riscv_step.sail
index 755420d..0f3bb77 100644
--- a/model/riscv_step.sail
+++ b/model/riscv_step.sail
@@ -69,8 +69,13 @@ function step(step_no) = {
},
Some(ast) => {
print_instr("[" ^ string_of_int(step_no) ^ "] [" ^ cur_privilege ^ "]: " ^ BitStr(PC) ^ " (" ^ BitStr(h) ^ ") " ^ ast);
- nextPC = PC + 2;
- (execute(ast), true)
+ /* check for RVC once here instead of every RVC execute clause. */
+ if haveRVC() then {
+ nextPC = PC + 2;
+ (execute(ast), true)
+ } else {
+ (false, true)
+ }
}
}
},