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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-05-02 11:02:57 -0700 |
|---|---|---|
| committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-05-02 11:02:57 -0700 |
| commit | 9be6d5783ff2fa0df24691cfc3273c50528b534a (patch) | |
| tree | ca379ce217663c9b5eb888885a0831e6e7d26ce1 /model/riscv_regs.sail | |
| parent | 3c76b4a811c574452a031d95c544af40fea34d74 (diff) | |
| download | sail-riscv-9be6d5783ff2fa0df24691cfc3273c50528b534a.zip sail-riscv-9be6d5783ff2fa0df24691cfc3273c50528b534a.tar.gz sail-riscv-9be6d5783ff2fa0df24691cfc3273c50528b534a.tar.bz2 | |
rvfi: fixes for RV32
Diffstat (limited to 'model/riscv_regs.sail')
| -rw-r--r-- | model/riscv_regs.sail | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/model/riscv_regs.sail b/model/riscv_regs.sail index 3b656bb..cf46390 100644 --- a/model/riscv_regs.sail +++ b/model/riscv_regs.sail @@ -87,7 +87,7 @@ function rX r = { $ifdef RVFI_DII val rvfi_wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit effect {wreg} function rvfi_wX (r,v) = { - rvfi_exec->rvfi_rd_wdata() = v; + rvfi_exec->rvfi_rd_wdata() = EXTS(v); rvfi_exec->rvfi_rd_addr() = to_bits(8,r); } $else |