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| author | Tim Hutt <timothy.hutt@codasip.com> | 2023-08-11 16:00:51 +0100 |
|---|---|---|
| committer | Bill McSpadden <bill@riscv.org> | 2023-09-12 15:50:00 -0500 |
| commit | 4c77f62622c199f14e0bd6cdc6a6c427fe31b09e (patch) | |
| tree | af586e957a2c4e37cba06761960fc492aa220cd9 /model/riscv_pc_access.sail | |
| parent | e2e942c1e56ceea17a6a732a88391cc9b1276d0c (diff) | |
| download | sail-riscv-4c77f62622c199f14e0bd6cdc6a6c427fe31b09e.zip sail-riscv-4c77f62622c199f14e0bd6cdc6a6c427fe31b09e.tar.gz sail-riscv-4c77f62622c199f14e0bd6cdc6a6c427fe31b09e.tar.bz2 | |
Remove effects
Since Sail 0.15 (released Nov 2022), effects have had no effect. They now generate a deprecation warning. This commit removes all the effect annotations from the model, thus fixing the compiler warnings.
Diffstat (limited to 'model/riscv_pc_access.sail')
| -rw-r--r-- | model/riscv_pc_access.sail | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/model/riscv_pc_access.sail b/model/riscv_pc_access.sail index 9c3c742..dee566a 100644 --- a/model/riscv_pc_access.sail +++ b/model/riscv_pc_access.sail @@ -76,18 +76,18 @@ The value in the PC register is the absolute virtual address of the instruction to fetch. */ -val get_arch_pc : unit -> xlenbits effect {rreg} +val get_arch_pc : unit -> xlenbits function get_arch_pc() = PC -val get_next_pc : unit -> xlenbits effect {rreg} +val get_next_pc : unit -> xlenbits function get_next_pc() = nextPC -val set_next_pc : xlenbits -> unit effect {wreg} +val set_next_pc : xlenbits -> unit function set_next_pc(pc) = { nextPC = pc } -val tick_pc : unit -> unit effect {rreg, wreg} +val tick_pc : unit -> unit function tick_pc() = { PC = nextPC } |