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| author | Jessica Clarke <jrtc27@jrtc27.com> | 2021-11-17 15:42:40 +0000 |
|---|---|---|
| committer | Jessica Clarke <jrtc27@jrtc27.com> | 2021-11-17 15:42:48 +0000 |
| commit | af44432ce770349500e7fa07362cca5d7ef334f0 (patch) | |
| tree | 19f2dda1578a9b9ff0a68fca17d540f42fb98d4b /model/riscv_insts_cfext.sail | |
| parent | c5e62ea4b3d481fcd491b22b317cc319b089f05d (diff) | |
| download | sail-riscv-af44432ce770349500e7fa07362cca5d7ef334f0.zip sail-riscv-af44432ce770349500e7fa07362cca5d7ef334f0.tar.gz sail-riscv-af44432ce770349500e7fa07362cca5d7ef334f0.tar.bz2 | |
Revert "Initial introduction of zfinx (#75)"
This reverts commit c5e62ea4b3d481fcd491b22b317cc319b089f05d.
Diffstat (limited to 'model/riscv_insts_cfext.sail')
| -rw-r--r-- | model/riscv_insts_cfext.sail | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/model/riscv_insts_cfext.sail b/model/riscv_insts_cfext.sail index 98eea24..9aa94ef 100644 --- a/model/riscv_insts_cfext.sail +++ b/model/riscv_insts_cfext.sail @@ -77,9 +77,9 @@ union clause ast = C_FLWSP : (bits(6), regidx) mapping clause encdec_compressed = C_FLWSP(ui76 @ ui5 @ ui42, rd) - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() <-> 0b011 @ ui5 : bits(1) @ rd : regidx @ ui42 : bits(3) @ ui76 : bits(2) @ 0b10 - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() function clause execute (C_FLWSP(imm, rd)) = { let imm : bits(12) = EXTZ(imm @ 0b00); @@ -95,9 +95,9 @@ mapping clause assembly = C_FLWSP(imm, rd) union clause ast = C_FSWSP : (bits(6), regidx) mapping clause encdec_compressed = C_FSWSP(ui76 @ ui52, rs2) - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() <-> 0b111 @ ui52 : bits(4) @ ui76 : bits(2) @ rs2 : regidx @ 0b10 - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() function clause execute (C_FSWSP(uimm, rs2)) = { let imm : bits(12) = EXTZ(uimm @ 0b00); @@ -113,9 +113,9 @@ mapping clause assembly = C_FSWSP(uimm, rd) union clause ast = C_FLW : (bits(5), cregidx, cregidx) mapping clause encdec_compressed = C_FLW(ui6 @ ui53 @ ui2, rs1, rd) - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() <-> 0b011 @ ui53 : bits(3) @ rs1 : cregidx @ ui2 : bits(1) @ ui6 : bits(1) @ rd : cregidx @ 0b00 - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() function clause execute (C_FLW(uimm, rsc, rdc)) = { let imm : bits(12) = EXTZ(uimm @ 0b00); @@ -133,9 +133,9 @@ mapping clause assembly = C_FLW(uimm, rsc, rdc) union clause ast = C_FSW : (bits(5), cregidx, cregidx) mapping clause encdec_compressed = C_FSW(ui6 @ ui53 @ ui2, rs1, rs2) - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() <-> 0b111 @ ui53 : bits(3) @ rs1 : cregidx @ ui2 : bits(1) @ ui6 : bits(1) @ rs2 : cregidx @ 0b00 - if sizeof(xlen) == 32 & haveRVC() & haveFExt() & ~ (sys_enable_zfinx()) + if sizeof(xlen) == 32 & haveRVC() & haveFExt() function clause execute (C_FSW(uimm, rsc1, rsc2)) = { let imm : bits(12) = EXTZ(uimm @ 0b00); |