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author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-03-11 12:31:20 -0700 |
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committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-03-11 12:31:20 -0700 |
commit | e6e7443dd59c8cb7a325c6239fd1e4a4141f77eb (patch) | |
tree | a2f3ef073bc7013bdc9a9ef083ac51787c68792c /model/riscv_insts_base.sail | |
parent | c687c30e21bf4221692dcafcefe0d0a86ac11904 (diff) | |
download | sail-riscv-e6e7443dd59c8cb7a325c6239fd1e4a4141f77eb.zip sail-riscv-e6e7443dd59c8cb7a325c6239fd1e4a4141f77eb.tar.gz sail-riscv-e6e7443dd59c8cb7a325c6239fd1e4a4141f77eb.tar.bz2 |
Fixes for Sv39 TLB.
- fix and simplify model initialization, to enable generic TLB initialization
- re-enable sfence.vma
Diffstat (limited to 'model/riscv_insts_base.sail')
-rw-r--r-- | model/riscv_insts_base.sail | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/model/riscv_insts_base.sail b/model/riscv_insts_base.sail index d79639a..e6e272c 100644 --- a/model/riscv_insts_base.sail +++ b/model/riscv_insts_base.sail @@ -710,11 +710,16 @@ function clause execute SFENCE_VMA(rs1, rs2) = { else match (architecture(get_mstatus_SXL(mstatus)), mstatus.TVM()) { (Some(_), true) => { handle_illegal(); false }, (Some(_), false) => { - /* - let addr : option(vaddr39) = if rs1 == 0 then None() else Some(X(rs1)[38 .. 0]); - let asid : option(asid64) = if rs2 == 0 then None() else Some(X(rs2)[15 .. 0]); - flushTLB(asid, addr); - */ + if sizeof(xlen) == 64 + then { + let addr : option(vaddr39) = if rs1 == 0 then None() else Some(X(rs1)[38 .. 0]); + let asid : option(asid64) = if rs2 == 0 then None() else Some(X(rs2)[15 .. 0]); + flush_TLB(asid, addr) + } else { + let addr : option(vaddr32) = if rs1 == 0 then None() else Some(X(rs1)[31 .. 0]); + let asid : option(asid32) = if rs2 == 0 then None() else Some(X(rs2)[8 .. 0]); + flush_TLB(asid, addr) + }; true }, (_, _) => internal_error("unimplemented sfence architecture") |