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author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-06-24 16:55:18 -0700 |
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committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-06-24 18:11:18 -0700 |
commit | bbb65b3c3422d02989015a6135cf36107f10ad95 (patch) | |
tree | 98f7f7bc49e5a9779428eb6a38727e8913bb3b7b /model/riscv_insts_aext.sail | |
parent | 295175dd4d510cb416bdc4ef17c2ca96d84ed04e (diff) | |
download | sail-riscv-bbb65b3c3422d02989015a6135cf36107f10ad95.zip sail-riscv-bbb65b3c3422d02989015a6135cf36107f10ad95.tar.gz sail-riscv-bbb65b3c3422d02989015a6135cf36107f10ad95.tar.bz2 |
Add PMP checks to physical memory accesses.
- unify AccessType and ReadType since they were essentially redundant,
making it easier to implement PMP checks for ReadWrite/atomic accesses.
- add command line options to enable PMP in the platform
- also fix the matching for the case when all entries are off
Diffstat (limited to 'model/riscv_insts_aext.sail')
-rw-r--r-- | model/riscv_insts_aext.sail | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/model/riscv_insts_aext.sail b/model/riscv_insts_aext.sail index 91346ee..cd2f069 100644 --- a/model/riscv_insts_aext.sail +++ b/model/riscv_insts_aext.sail @@ -44,7 +44,7 @@ function clause execute(LOADRES(aq, rl, rs1, width, rd)) = { /* Get the address, X(rs1) (no offset). * Extensions might perform additional checks on address validity. */ - match ext_data_get_addr(rs1, zeros(), Read, Data, width) { + match ext_data_get_addr(rs1, zeros(), Read, width) { Ext_DataAddr_Error(e) => { ext_handle_data_check_error(e); RETIRE_FAIL }, Ext_DataAddr_OK(vaddr) => { let aligned : bool = @@ -62,12 +62,12 @@ function clause execute(LOADRES(aq, rl, rs1, width, rd)) = { */ if (~ (aligned)) then { handle_mem_exception(vaddr, E_Load_Addr_Align); RETIRE_FAIL } - else match translateAddr(vaddr, Read, Data) { + else match translateAddr(vaddr, Read) { TR_Failure(e) => { handle_mem_exception(vaddr, e); RETIRE_FAIL }, TR_Address(addr) => match (width, sizeof(xlen)) { - (WORD, _) => process_loadres(rd, vaddr, mem_read(Data, addr, 4, aq, rl, true), false), - (DOUBLE, 64) => process_loadres(rd, vaddr, mem_read(Data, addr, 8, aq, rl, true), false), + (WORD, _) => process_loadres(rd, vaddr, mem_read(Read, addr, 4, aq, rl, true), false), + (DOUBLE, 64) => process_loadres(rd, vaddr, mem_read(Read, addr, 8, aq, rl, true), false), _ => internal_error("LOADRES expected WORD or DOUBLE") } } @@ -103,7 +103,7 @@ function clause execute (STORECON(aq, rl, rs2, rs1, width, rd)) = { /* Get the address, X(rs1) (no offset). * Extensions might perform additional checks on address validity. */ - match ext_data_get_addr(rs1, zeros(), Read, Data, width) { + match ext_data_get_addr(rs1, zeros(), Write, width) { Ext_DataAddr_Error(e) => { ext_handle_data_check_error(e); RETIRE_FAIL }, Ext_DataAddr_OK(vaddr) => { let aligned : bool = @@ -123,7 +123,8 @@ function clause execute (STORECON(aq, rl, rs2, rs1, width, rd)) = { /* cannot happen in rmem */ X(rd) = EXTZ(0b1); cancel_reservation(); RETIRE_SUCCESS } else { - match translateAddr(vaddr, Write, Data) { + match translateAddr(vaddr, Write) { /* Write and ReadWrite are equivalent here: + * both result in a SAMO exception */ TR_Failure(e) => { handle_mem_exception(vaddr, e); RETIRE_FAIL }, TR_Address(addr) => { let eares : MemoryOpResult(unit) = match (width, sizeof(xlen)) { @@ -188,10 +189,10 @@ function clause execute (AMO(op, aq, rl, rs2, rs1, width, rd)) = { /* Get the address, X(rs1) (no offset). * Some extensions perform additional checks on address validity. */ - match ext_data_get_addr(rs1, zeros(), Read, Data, width) { + match ext_data_get_addr(rs1, zeros(), ReadWrite, width) { Ext_DataAddr_Error(e) => { ext_handle_data_check_error(e); RETIRE_FAIL }, Ext_DataAddr_OK(vaddr) => { - match translateAddr(vaddr, ReadWrite, Data) { + match translateAddr(vaddr, ReadWrite) { TR_Failure(e) => { handle_mem_exception(vaddr, e); RETIRE_FAIL }, TR_Address(addr) => { let eares : MemoryOpResult(unit) = match (width, sizeof(xlen)) { @@ -204,8 +205,8 @@ function clause execute (AMO(op, aq, rl, rs2, rs1, width, rd)) = { MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL }, MemValue(_) => { let rval : MemoryOpResult(xlenbits) = match (width, sizeof(xlen)) { - (WORD, _) => extend_value(false, mem_read(Data, addr, 4, aq, aq & rl, true)), - (DOUBLE, 64) => extend_value(false, mem_read(Data, addr, 8, aq, aq & rl, true)), + (WORD, _) => extend_value(false, mem_read(ReadWrite, addr, 4, aq, aq & rl, true)), + (DOUBLE, 64) => extend_value(false, mem_read(ReadWrite, addr, 8, aq, aq & rl, true)), _ => internal_error ("AMO expected WORD or DOUBLE") }; match (rval) { |