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authorPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-05-02 11:02:57 -0700
committerPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-05-02 11:02:57 -0700
commit9be6d5783ff2fa0df24691cfc3273c50528b534a (patch)
treeca379ce217663c9b5eb888885a0831e6e7d26ce1 /model/riscv_fetch_rvfi.sail
parent3c76b4a811c574452a031d95c544af40fea34d74 (diff)
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rvfi: fixes for RV32
Diffstat (limited to 'model/riscv_fetch_rvfi.sail')
-rw-r--r--model/riscv_fetch_rvfi.sail8
1 files changed, 4 insertions, 4 deletions
diff --git a/model/riscv_fetch_rvfi.sail b/model/riscv_fetch_rvfi.sail
index 1531ae1..822305a 100644
--- a/model/riscv_fetch_rvfi.sail
+++ b/model/riscv_fetch_rvfi.sail
@@ -5,12 +5,12 @@ function fetch() -> FetchResult =
else {
let i = rvfi_instruction.rvfi_insn();
rvfi_exec->rvfi_order() = minstret;
- rvfi_exec->rvfi_pc_rdata() = PC;
- rvfi_exec->rvfi_insn() = sail_zero_extend(i,64);
+ rvfi_exec->rvfi_pc_rdata() = EXTS(PC);
+ rvfi_exec->rvfi_insn() = EXTS(i);
/* TODO: should we write these even if they're not really registers? */
- rvfi_exec->rvfi_rs1_data() = X(i[19 .. 15]);
- rvfi_exec->rvfi_rs2_data() = X(i[24 .. 20]);
+ rvfi_exec->rvfi_rs1_data() = EXTS(X(i[19 .. 15]));
+ rvfi_exec->rvfi_rs2_data() = EXTS(X(i[24 .. 20]));
rvfi_exec->rvfi_rs1_addr() = sail_zero_extend(i[19 .. 15],8);
rvfi_exec->rvfi_rs2_addr() = sail_zero_extend(i[24 .. 20],8);