Perform PTE checks on DII fetch (with jrtc27)

1 files changed, 23 insertions, 16 deletions

diff --git a/model/riscv_fetch_rvfi.sail b/model/riscv_fetch_rvfi.sail
index 0f2ed4b..955dd4b 100644
--- a/model/riscv_fetch_rvfi.sail
+++ b/model/riscv_fetch_rvfi.sail
@@ -9,22 +9,29 @@ function fetch() -> FetchResult = {
       /* then check PC alignment */
       if   (use_pc[0] != bitzero | (use_pc[1] != bitzero & (~ (haveRVC()))))
       then F_Error(E_Fetch_Addr_Align(), PC)
-      else {
-        let i = rvfi_instruction.rvfi_insn();
-        rvfi_exec->rvfi_insn()     = EXTZ(i);
-        /* TODO: should we write these even if they're not really registers? */
-        rvfi_exec->rvfi_rs1_data() = EXTZ(X(i[19 .. 15]));
-        rvfi_exec->rvfi_rs2_data() = EXTZ(X(i[24 .. 20]));
-        rvfi_exec->rvfi_rs1_addr() = sail_zero_extend(i[19 .. 15],8);
-        rvfi_exec->rvfi_rs2_addr() = sail_zero_extend(i[24 .. 20],8);
-        if   (i[1 .. 0] != 0b11)
-        then F_RVC(i[15 .. 0])
-        else {
-          /* fetch PC check for the next instruction granule */
-          PC_hi : xlenbits = PC + 2;
-          match ext_fetch_check_pc(PC, PC_hi) {
-            Ext_FetchAddr_Error(e)      => F_Ext_Error(e),
-            Ext_FetchAddr_OK(use_pc_hi) => F_Base(i)
+      else match translateAddr(use_pc, Execute()) {
+        TR_Failure(e, _) => F_Error(e, PC),
+        TR_Address(_, _) => {
+          let i = rvfi_instruction.rvfi_insn();
+          rvfi_exec->rvfi_insn()     = EXTZ(i);
+          /* TODO: should we write these even if they're not really registers? */
+          rvfi_exec->rvfi_rs1_data() = EXTZ(X(i[19 .. 15]));
+          rvfi_exec->rvfi_rs2_data() = EXTZ(X(i[24 .. 20]));
+          rvfi_exec->rvfi_rs1_addr() = sail_zero_extend(i[19 .. 15],8);
+          rvfi_exec->rvfi_rs2_addr() = sail_zero_extend(i[24 .. 20],8);
+          if   (i[1 .. 0] != 0b11)
+          then F_RVC(i[15 .. 0])
+          else {
+            /* fetch PC check for the next instruction granule */
+            PC_hi : xlenbits = PC + 2;
+            match ext_fetch_check_pc(PC, PC_hi) {
+              Ext_FetchAddr_Error(e)      => F_Ext_Error(e),
+              Ext_FetchAddr_OK(use_pc_hi) =>
+                match translateAddr(use_pc_hi, Execute()) {
+                  TR_Failure(e, _) => F_Error(e, PC),
+                  TR_Address(_, _) => F_Base(i)
+              }
+            }
           }
         }
       }