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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2020-04-02 17:00:19 -0700 |
|---|---|---|
| committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2020-04-02 17:01:15 -0700 |
| commit | f9a480bbf0c2584defb1d743a6403fe30ddf3b93 (patch) | |
| tree | b155a475e1940cb1c015cb9a46a9533bd3daaf7d /model/riscv_fdext_control.sail | |
| parent | 0403086181fc303d54c85b700ab917554effbcdb (diff) | |
| download | sail-riscv-f9a480bbf0c2584defb1d743a6403fe30ddf3b93.zip sail-riscv-f9a480bbf0c2584defb1d743a6403fe30ddf3b93.tar.gz sail-riscv-f9a480bbf0c2584defb1d743a6403fe30ddf3b93.tar.bz2 | |
Fix a bug in the softfloat interface that caused exception flags not to get accrued into fcsr.
Diffstat (limited to 'model/riscv_fdext_control.sail')
| -rw-r--r-- | model/riscv_fdext_control.sail | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/model/riscv_fdext_control.sail b/model/riscv_fdext_control.sail index ac3169f..60497aa 100644 --- a/model/riscv_fdext_control.sail +++ b/model/riscv_fdext_control.sail @@ -17,8 +17,8 @@ function clause ext_read_CSR (0x001) = Some (EXTZ (fcsr.FFLAGS())) function clause ext_read_CSR (0x002) = Some (EXTZ (fcsr.FRM())) function clause ext_read_CSR (0x003) = Some (EXTZ (fcsr.bits())) -function clause ext_write_CSR (0x001, value) = { write_fcsr (fcsr.FRM(), value [4..0]); Some(EXTZ(fcsr.FFLAGS())) } -function clause ext_write_CSR (0x002, value) = { write_fcsr (value [2..0], fcsr.FFLAGS()); Some(EXTZ(fcsr.FRM())) } -function clause ext_write_CSR (0x003, value) = { write_fcsr (value [7..5], value [4..0]); Some(EXTZ(fcsr.bits())) } +function clause ext_write_CSR (0x001, value) = { ext_write_fcsr (fcsr.FRM(), value [4..0]); Some(EXTZ(fcsr.FFLAGS())) } +function clause ext_write_CSR (0x002, value) = { ext_write_fcsr (value [2..0], fcsr.FFLAGS()); Some(EXTZ(fcsr.FRM())) } +function clause ext_write_CSR (0x003, value) = { ext_write_fcsr (value [7..5], value [4..0]); Some(EXTZ(fcsr.bits())) } /* **************************************************************** */ |