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| author | KotorinMinami <huangshuo4@gmail.com> | 2024-05-10 04:18:38 +0800 |
|---|---|---|
| committer | KotorinMinami <huangshuo4@gmail.com> | 2024-05-11 02:10:05 +0800 |
| commit | 13c24db964578eb887002ced991591c8a6287c7f (patch) | |
| tree | 1c7ed41e5a9f8286a2dc48aef25ede235c273af9 /model/riscv_csr_ext.sail | |
| parent | e3c5b0a3016fa52bf1f167b5a918a60f24b634fa (diff) | |
| download | sail-riscv-13c24db964578eb887002ced991591c8a6287c7f.zip sail-riscv-13c24db964578eb887002ced991591c8a6287c7f.tar.gz sail-riscv-13c24db964578eb887002ced991591c8a6287c7f.tar.bz2 | |
Change immediates to be signed in assembly
These immediates are sign extended and usually interpreted as signed, so it's less confusing to use signed numbers. This also matches SPIKE's disassembly.
Diffstat (limited to 'model/riscv_csr_ext.sail')
0 files changed, 0 insertions, 0 deletions