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author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-04-24 17:56:32 -0700 |
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committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-04-24 17:58:26 -0700 |
commit | 3442aba5aa6545e76e066a199be45809784d495a (patch) | |
tree | 902e43defc518f9ec7004e288ab1c23165f60d88 /model/prelude_mem_metadata.sail | |
parent | ca5788f07ad099c3891a193d4d3d95ea71863961 (diff) | |
download | sail-riscv-3442aba5aa6545e76e066a199be45809784d495a.zip sail-riscv-3442aba5aa6545e76e066a199be45809784d495a.tar.gz sail-riscv-3442aba5aa6545e76e066a199be45809784d495a.tar.bz2 |
Add extended model from cheri-merge.
Diffstat (limited to 'model/prelude_mem_metadata.sail')
-rw-r--r-- | model/prelude_mem_metadata.sail | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/model/prelude_mem_metadata.sail b/model/prelude_mem_metadata.sail new file mode 100644 index 0000000..cb34f8e --- /dev/null +++ b/model/prelude_mem_metadata.sail @@ -0,0 +1,13 @@ +/* The default metadata carries no information, and is implemented + * using a unit type. + */ + +type mem_meta = unit + +let default_meta : mem_meta = () + +val __WriteRAM_Meta : forall 'n. (xlenbits, atom('n), mem_meta) -> unit effect {wmvt} +function __WriteRAM_Meta(addr, width, meta) = () + +val __ReadRAM_Meta : forall 'n. (xlenbits, atom('n)) -> mem_meta effect {rmem} +function __ReadRAM_Meta(addr, width) = () |