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authorJessica Clarke <jrtc27@jrtc27.com>2023-02-14 02:26:18 +0000
committerGitHub <noreply@github.com>2023-02-14 02:26:18 +0000
commite0818f80e4aeab1157ede89252c50a7cd76ee416 (patch)
tree253ce82fb152669a583128fd733f0dd1784660e9 /c_emulator
parent43b81eafc660ab584e1684668995957764a5e684 (diff)
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Revert "added 3 new command line switches (plus functionality): -X/--enable-experimental-extensions, --enable-smepmp, --enable-zicond (#219)" (#220)
Reverts #219. Merged without code review and with many issues. This reverts commit 43b81eafc660ab584e1684668995957764a5e684.
Diffstat (limited to 'c_emulator')
-rw-r--r--c_emulator/riscv_platform.c9
-rw-r--r--c_emulator/riscv_platform_impl.c5
-rw-r--r--c_emulator/riscv_platform_impl.h13
-rw-r--r--c_emulator/riscv_sim.c21
4 files changed, 1 insertions, 47 deletions
diff --git a/c_emulator/riscv_platform.c b/c_emulator/riscv_platform.c
index ec31963..2572dbc 100644
--- a/c_emulator/riscv_platform.c
+++ b/c_emulator/riscv_platform.c
@@ -21,15 +21,6 @@ bool sys_enable_fdext(unit u)
bool sys_enable_zfinx(unit u)
{ return rv_enable_zfinx; }
-bool sys_enable_smepmp(unit u)
-{ return ( (rv_enable_Smepmp == 0) ? false : true); }
-
-bool sys_enable_zicond(unit u)
-{ return ( (rv_enable_Zicond == 0) ? false : true); }
-
-bool sys_enable_experimental_extensions(unit u)
-{ return rv_enable_experimental_extensions; }
-
bool sys_enable_writable_misa(unit u)
{ return rv_enable_writable_misa; }
diff --git a/c_emulator/riscv_platform_impl.c b/c_emulator/riscv_platform_impl.c
index 49b8cfd..b1504a7 100644
--- a/c_emulator/riscv_platform_impl.c
+++ b/c_emulator/riscv_platform_impl.c
@@ -14,11 +14,6 @@ bool rv_enable_dirty_update = false;
bool rv_enable_misaligned = false;
bool rv_mtval_has_illegal_inst_bits = false;
-int rv_enable_Smepmp = 0;
-int rv_enable_Zicond = 0;
-
-bool rv_enable_experimental_extensions = false;
-
uint64_t rv_ram_base = UINT64_C(0x80000000);
uint64_t rv_ram_size = UINT64_C(0x4000000);
diff --git a/c_emulator/riscv_platform_impl.h b/c_emulator/riscv_platform_impl.h
index 8656bb1..165fb94 100644
--- a/c_emulator/riscv_platform_impl.h
+++ b/c_emulator/riscv_platform_impl.h
@@ -17,11 +17,6 @@ extern bool rv_enable_dirty_update;
extern bool rv_enable_misaligned;
extern bool rv_mtval_has_illegal_inst_bits;
-extern int rv_enable_Smepmp;
-extern int rv_enable_Zicond;
-
-extern bool rv_enable_experimental_extensions;
-
extern uint64_t rv_ram_base;
extern uint64_t rv_ram_size;
@@ -39,11 +34,3 @@ extern uint64_t rv_insns_per_tick;
extern int term_fd;
void plat_term_write_impl(char c);
-
-// for command line options and getopt()
-extern char *optarg;
-extern int optind, opterr, optopt;
-
-
-
-
diff --git a/c_emulator/riscv_sim.c b/c_emulator/riscv_sim.c
index c4e46bc..5ad83e9 100644
--- a/c_emulator/riscv_sim.c
+++ b/c_emulator/riscv_sim.c
@@ -123,10 +123,6 @@ static struct option options[] = {
{"report-arch", no_argument, 0, 'a'},
{"test-signature", required_argument, 0, 'T'},
{"signature-granularity", required_argument, 0, 'g'},
- {"enable-experimental-extensions", no_argument, 0, 'X'}, // follows naming convention of LLVM
- {"enable-Smepmp", no_argument, &rv_enable_Smepmp, 0 },
- {"enable-Zicond", no_argument, &rv_enable_Zicond, 0 },
-
#ifdef RVFI_DII
{"rvfi-dii", required_argument, 0, 'r'},
#endif
@@ -221,9 +217,6 @@ char *process_args(int argc, char **argv)
int c;
uint64_t ram_size = 0;
while(true) {
- int this_option_optind = optind ? optind : 1;
- int option_index = 0;
-
c = getopt_long(argc, argv,
"a"
"d"
@@ -249,20 +242,12 @@ char *process_args(int argc, char **argv)
"v::"
"l:"
"x"
- "X"
#ifdef SAILCOV
"c:"
#endif
- , options, &option_index);
+ , options, NULL);
if (c == -1) break;
switch (c) {
- case 0: // Not the character '0', but the NULL value.
- printf ("option %s", options[option_index].name);
- if (optarg) {
- printf (" with arg %s", optarg);
- }
- printf ("\n");
- break;
case 'a':
report_arch();
break;
@@ -355,10 +340,6 @@ char *process_args(int argc, char **argv)
rv_enable_zfinx = true;
rv_enable_fdext = false;
break;
- case 'X':
- fprintf(stderr, "enabling experimental support.\n");
- rv_enable_experimental_extensions = true;
- break;
#ifdef SAILCOV
case 'c':
sailcov_file = strdup(optarg);