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| author | Tim Hutt <timothy.hutt@codasip.com> | 2023-09-16 13:47:00 +0100 |
|---|---|---|
| committer | Bill McSpadden <bill@riscv.org> | 2023-10-25 09:02:23 -0500 |
| commit | 208d441d4e53e0c62d73fac85e7ac9aaf68fac1e (patch) | |
| tree | 8cbc73913d9ba74e31f1e11d9b835b01d7db1649 /c_emulator/riscv_softfloat.c | |
| parent | c90cf2e6eff5fa4ef7b93cc2020166dea7453fc6 (diff) | |
| download | sail-riscv-208d441d4e53e0c62d73fac85e7ac9aaf68fac1e.zip sail-riscv-208d441d4e53e0c62d73fac85e7ac9aaf68fac1e.tar.gz sail-riscv-208d441d4e53e0c62d73fac85e7ac9aaf68fac1e.tar.bz2 | |
Simplify softfloat interface by removing write_fflags
Instead of keeping a mirror register in sync with fflags, just return the new flags.
Diffstat (limited to 'c_emulator/riscv_softfloat.c')
| -rw-r--r-- | c_emulator/riscv_softfloat.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/c_emulator/riscv_softfloat.c b/c_emulator/riscv_softfloat.c index 914f4ff..2c2d0d2 100644 --- a/c_emulator/riscv_softfloat.c +++ b/c_emulator/riscv_softfloat.c @@ -16,7 +16,7 @@ static uint_fast8_t uint8_of_rm(mach_bits rm) #define SOFTFLOAT_POSTLUDE(res) \ zfloat_result = res.v; \ - zfloat_fflags |= (mach_bits)softfloat_exceptionFlags + zfloat_fflags = (mach_bits)softfloat_exceptionFlags unit softfloat_f16add(mach_bits rm, mach_bits v1, mach_bits v2) { |