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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2021-01-06 19:56:40 -0800 |
|---|---|---|
| committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2021-02-11 19:14:19 -0800 |
| commit | 99be0960a2d1027b0ace9dbe066bf38bb16b9b97 (patch) | |
| tree | 6470b5179823c797629bae2f65f5a9d60cbc83f0 /c_emulator/riscv_sim.c | |
| parent | 33cacbd88289bf0503b07433ee0c2923e32ef946 (diff) | |
| download | sail-riscv-99be0960a2d1027b0ace9dbe066bf38bb16b9b97.zip sail-riscv-99be0960a2d1027b0ace9dbe066bf38bb16b9b97.tar.gz sail-riscv-99be0960a2d1027b0ace9dbe066bf38bb16b9b97.tar.bz2 | |
Make N extension configurable.
Diffstat (limited to 'c_emulator/riscv_sim.c')
| -rw-r--r-- | c_emulator/riscv_sim.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/c_emulator/riscv_sim.c b/c_emulator/riscv_sim.c index 7f52af9..0d78a3a 100644 --- a/c_emulator/riscv_sim.c +++ b/c_emulator/riscv_sim.c @@ -100,6 +100,7 @@ static struct option options[] = { {"enable-dirty-update", no_argument, 0, 'd'}, {"enable-misaligned", no_argument, 0, 'm'}, {"enable-pmp", no_argument, 0, 'P'}, + {"enable-next", no_argument, 0, 'N'}, {"ram-size", required_argument, 0, 'z'}, {"disable-compressed", no_argument, 0, 'C'}, {"disable-writable-misa", no_argument, 0, 'I'}, @@ -205,6 +206,7 @@ char *process_args(int argc, char **argv) "d" "m" "C" + "N" "I" "i" "s" @@ -241,6 +243,10 @@ char *process_args(int argc, char **argv) fprintf(stderr, "disabling RVC compressed instructions.\n"); rv_enable_rvc = false; break; + case 'N': + fprintf(stderr, "enabling N extension.\n"); + rv_enable_next = true; + break; case 'I': fprintf(stderr, "disabling writable misa CSR.\n"); rv_enable_writable_misa = false; |