diff options
| author | Robert Norton <rmn30@cam.ac.uk> | 2019-07-09 15:04:08 +0100 |
|---|---|---|
| committer | Robert Norton <rmn30@cam.ac.uk> | 2019-07-09 15:04:08 +0100 |
| commit | 6541c02412d6c8744f4c3a137ec302ea40d8117d (patch) | |
| tree | 8b7e2e64c62e812a2fc455c4a240fa5ad70f07f5 /c_emulator/riscv_sim.c | |
| parent | cc53e6272416ac3ba680849d0b29b0571e2bbcbd (diff) | |
| download | sail-riscv-6541c02412d6c8744f4c3a137ec302ea40d8117d.zip sail-riscv-6541c02412d6c8744f4c3a137ec302ea40d8117d.tar.gz sail-riscv-6541c02412d6c8744f4c3a137ec302ea40d8117d.tar.bz2 | |
Add ext_rvfi_init to allow model to be initialised differently for rvfi.
Diffstat (limited to 'c_emulator/riscv_sim.c')
| -rw-r--r-- | c_emulator/riscv_sim.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/c_emulator/riscv_sim.c b/c_emulator/riscv_sim.c index 5cef660..5fb9dbf 100644 --- a/c_emulator/riscv_sim.c +++ b/c_emulator/riscv_sim.c @@ -469,6 +469,7 @@ void init_sail(uint64_t elf_entry) zinit_model(UNIT); #ifdef RVFI_DII if (rvfi_dii) { + zext_rvfi_init(UNIT); rv_ram_base = UINT64_C(0x80000000); rv_ram_size = UINT64_C(0x10000); rv_rom_base = UINT64_C(0); |