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authorIbrahim Abu Kharmeh <abukharmeh@gmail.com>2021-11-17 15:41:15 +0000
committerGitHub <noreply@github.com>2021-11-17 15:41:15 +0000
commitc5e62ea4b3d481fcd491b22b317cc319b089f05d (patch)
tree5ddc23d7d67d434cd54b59dd8e3ae207f10fb430 /c_emulator/riscv_platform.c
parent01720566318e292df12693bba1fe5f09ea0857df (diff)
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Initial introduction of zfinx (#75)
* Adds Zfinx enable flag * Hardwire misa.{f,d} and mstats.FS to 0 * Moving nan boxing functions to fdext_reg * Swaps register names for floating point instructions Adds new mapping to swap register names, and use it in all assembly clauses * Disable Floating point loads, stores and moves * Add X_or_F_s and X_or_F_d functions, and use them to access all registers for floating points Changes register accessed for floating point instructions and modify nan boxing functions for zfinx * Formatting Remove couple of misplaced whitespace, unnecessary parens * Fix inconsistent indentation in insts_dext file * Fix spacing in fdext_regs * Remove redundant comparasion with true/ false * Constistant tuples spacing and removes couple of unnecessary parens. * Consistent functions declaration & calls spacing and removes couple of unnecessary parens. * Consistent spacing and removes couple of unnecessary comparasion with true/false * Make spacing consistent * Remove checks from execution stage * Add checks to encdec stage
Diffstat (limited to 'c_emulator/riscv_platform.c')
-rw-r--r--c_emulator/riscv_platform.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/c_emulator/riscv_platform.c b/c_emulator/riscv_platform.c
index a528bee..2572dbc 100644
--- a/c_emulator/riscv_platform.c
+++ b/c_emulator/riscv_platform.c
@@ -18,6 +18,9 @@ bool sys_enable_next(unit u)
bool sys_enable_fdext(unit u)
{ return rv_enable_fdext; }
+bool sys_enable_zfinx(unit u)
+{ return rv_enable_zfinx; }
+
bool sys_enable_writable_misa(unit u)
{ return rv_enable_writable_misa; }