diff options
| author | Jon French <jf451@cam.ac.uk> | 2019-04-12 14:42:33 +0100 |
|---|---|---|
| committer | Jon French <jf451@cam.ac.uk> | 2019-04-12 14:42:33 +0100 |
| commit | 4ddeb44d2eed3f97ddb3739f1a44af8973936b89 (patch) | |
| tree | bf8af6ab037e98c9630e61abf25d81990a53b42b /c_emulator/riscv_platform.c | |
| parent | d8cd74d5ea994957a607819267afc03f05f3566b (diff) | |
| parent | ca184a708aa5336efe573fed14d4dfcd9cb27dde (diff) | |
| download | sail-riscv-rmem_interpreter.zip sail-riscv-rmem_interpreter.tar.gz sail-riscv-rmem_interpreter.tar.bz2 | |
Merge branch 'master' into rmem_interpreterrmem_interpreter
Diffstat (limited to 'c_emulator/riscv_platform.c')
| -rw-r--r-- | c_emulator/riscv_platform.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/c_emulator/riscv_platform.c b/c_emulator/riscv_platform.c index d1b1f6e..dcc5766 100644 --- a/c_emulator/riscv_platform.c +++ b/c_emulator/riscv_platform.c @@ -9,6 +9,11 @@ static mach_bits reservation = 0; static bool reservation_valid = false; +bool sys_enable_rvc(unit u) +{ return rv_enable_rvc; } +bool sys_enable_writable_misa(unit u) +{ return rv_enable_writable_misa; } + bool plat_enable_dirty_update(unit u) { return rv_enable_dirty_update; } |