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| author | Thomas Bauereiss <tb592@cl.cam.ac.uk> | 2019-12-05 15:31:58 +0000 |
|---|---|---|
| committer | Thomas Bauereiss <tb592@cl.cam.ac.uk> | 2019-12-05 15:31:58 +0000 |
| commit | 1546516cc34c7b6f2665217164c68a459c4f9bcd (patch) | |
| tree | 9172771cc1443821b03e82c85451a7e54b461c56 /Makefile | |
| parent | 392dba44738d9c4702ef822a44772b73099b0d92 (diff) | |
| download | sail-riscv-1546516cc34c7b6f2665217164c68a459c4f9bcd.zip sail-riscv-1546516cc34c7b6f2665217164c68a459c4f9bcd.tar.gz sail-riscv-1546516cc34c7b6f2665217164c68a459c4f9bcd.tar.bz2 | |
Fix RVFI build
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -54,7 +54,7 @@ SAIL_ARCH_SRCS = $(PRELUDE) SAIL_ARCH_SRCS += riscv_types_ext.sail riscv_types.sail SAIL_ARCH_SRCS += riscv_vmem_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail SAIL_ARCH_SRCS += riscv_mem.sail $(SAIL_VM_SRCS) -SAIL_ARCH_RVFI_SRCS = $(PRELUDE) rvfi_dii.sail riscv_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail riscv_mem.sail $(SAIL_VM_SRCS) +SAIL_ARCH_RVFI_SRCS = $(PRELUDE) rvfi_dii.sail riscv_types_ext.sail riscv_types.sail riscv_vmem_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail riscv_mem.sail $(SAIL_VM_SRCS) SAIL_STEP_SRCS = riscv_step_common.sail riscv_step_ext.sail riscv_decode_ext.sail riscv_fetch.sail riscv_step.sail RVFI_STEP_SRCS = riscv_step_common.sail riscv_step_rvfi.sail riscv_decode_ext.sail riscv_fetch_rvfi.sail riscv_step.sail |