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authorTim Hutt <timothy.hutt@codasip.com>2024-03-06 11:27:29 +0000
committerBill McSpadden <bill@riscv.org>2024-03-24 19:46:11 -0500
commitfd21acc266716d9bd04fc96d60fed375005d6888 (patch)
treeaa57dff37f32a682603a510d17332e18bece7c0f
parentc287c34df944647fcfd1923e37f4d97466f264bd (diff)
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Add RV32 restriction for compressed shift instructions
The restriction was present for `C.SLLI` but was missing for `C.SRLI` and `C.SRAI`. The format is copied from `C.SLLI`. Fixes #356
-rw-r--r--model/riscv_insts_cext.sail8
1 files changed, 4 insertions, 4 deletions
diff --git a/model/riscv_insts_cext.sail b/model/riscv_insts_cext.sail
index 2f8c390..2cf3b41 100644
--- a/model/riscv_insts_cext.sail
+++ b/model/riscv_insts_cext.sail
@@ -224,9 +224,9 @@ mapping clause assembly = C_LUI(imm, rd)
union clause ast = C_SRLI : (bits(6), cregidx)
mapping clause encdec_compressed = C_SRLI(nzui5 @ nzui40, rsd)
- if nzui5 @ nzui40 != 0b000000
+ if nzui5 @ nzui40 != 0b000000 & (sizeof(xlen) == 64 | nzui5 == 0b0)
<-> 0b100 @ nzui5 : bits(1) @ 0b00 @ rsd : cregidx @ nzui40 : bits(5) @ 0b01
- if nzui5 @ nzui40 != 0b000000
+ if nzui5 @ nzui40 != 0b000000 & (sizeof(xlen) == 64 | nzui5 == 0b0)
function clause execute (C_SRLI(shamt, rsd)) = {
let rsd = creg2reg_idx(rsd);
@@ -242,9 +242,9 @@ mapping clause assembly = C_SRLI(shamt, rsd)
union clause ast = C_SRAI : (bits(6), cregidx)
mapping clause encdec_compressed = C_SRAI(nzui5 @ nzui40, rsd)
- if nzui5 @ nzui40 != 0b000000
+ if nzui5 @ nzui40 != 0b000000 & (sizeof(xlen) == 64 | nzui5 == 0b0)
<-> 0b100 @ nzui5 : bits(1) @ 0b01 @ rsd : cregidx @ nzui40 : bits(5) @ 0b01
- if nzui5 @ nzui40 != 0b000000
+ if nzui5 @ nzui40 != 0b000000 & (sizeof(xlen) == 64 | nzui5 == 0b0)
function clause execute (C_SRAI(shamt, rsd)) = {
let rsd = creg2reg_idx(rsd);