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authorMartin Berger <contact@martinfriedrichberger.net>2024-04-29 23:26:40 +0100
committerBill McSpadden <bill@riscv.org>2024-05-07 19:56:04 -0500
commit34e43b27fa47472cf0abd035f49114734a283d29 (patch)
tree30203c7389fb4167a875e62989f013fd8d7e1b14
parentc5ee87dfcc862a69ccad6e560423da4bb0e99dd6 (diff)
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Add Svinval extension.
These changes add the "Svinval" Standard Extension for Fine-Grained Address-Translation Cache Invalidation, Version 1.0 to the sail-riscv model. This extension defines five new instructions: SINVAL.VMA, SFENCE.W.INVAL, SFENCE.INVAL.IR, HINVAL.VVMA, HINVAL.GVMA. HINVAL.VVMA & HINVAL.GVMA are omitted since they build on the Hypervisor Extension which is yet to be included in the model. SFENCE.W.INVAL & SFENCE.INVAL.IR are treated as nops pending integration of the coherency model (rmem) with sail. The specification says that SINVAL.VMA behaves just as SFENCE.VMA, except there are additional ordering constraints with respect to the new SFENCE.W.INVAL & SFENCE.INVAL.IR instructions. Since these are nops, we can treat SINVAL.VMA as if it were SFENCE.VMA.
-rw-r--r--model/riscv_insts_base.sail46
1 files changed, 46 insertions, 0 deletions
diff --git a/model/riscv_insts_base.sail b/model/riscv_insts_base.sail
index 9c4630b..f102cbd 100644
--- a/model/riscv_insts_base.sail
+++ b/model/riscv_insts_base.sail
@@ -794,3 +794,49 @@ function clause execute SFENCE_VMA(rs1, rs2) = {
mapping clause assembly = SFENCE_VMA(rs1, rs2)
<-> "sfence.vma" ^ spc() ^ reg_name(rs1) ^ sep() ^ reg_name(rs2)
+
+/* ****************************************************************** */
+union clause ast = SINVAL_VMA : (regidx, regidx)
+
+mapping clause encdec =
+ SINVAL_VMA(rs1, rs2) if haveSvinval()
+ <-> 0b0001011 @ rs2 : regidx @ rs1 : regidx @ 0b000 @ 0b00000 @ 0b1110011 if haveSvinval()
+
+function clause execute SINVAL_VMA(rs1, rs2) = {
+ execute(SFENCE_VMA(rs1, rs2))
+}
+
+mapping clause assembly = SINVAL_VMA(rs1, rs2)
+ <-> "sinval.vma" ^ spc() ^ reg_name(rs1) ^ sep() ^ reg_name(rs2)
+
+/* ****************************************************************** */
+union clause ast = SFENCE_W_INVAL : unit
+
+mapping clause encdec =
+ SFENCE_W_INVAL() if haveSvinval()
+ <-> 0b0001100 @ 0b00000 @ 0b00000 @ 0b000 @ 0b00000 @ 0b1110011 if haveSvinval()
+
+function clause execute SFENCE_W_INVAL() = {
+ if cur_privilege == User
+ then { handle_illegal(); RETIRE_FAIL }
+ else { RETIRE_SUCCESS }
+}
+
+mapping clause assembly = SFENCE_W_INVAL() <-> "sfence.w.inval"
+
+/* ****************************************************************** */
+union clause ast = SFENCE_INVAL_IR : unit
+
+mapping clause encdec =
+ SFENCE_INVAL_IR() if haveSvinval()
+ <-> 0b0001100 @ 0b00001 @ 0b00000 @ 0b000 @ 0b00000 @ 0b1110011 if haveSvinval()
+
+function clause execute SFENCE_INVAL_IR() = {
+ if cur_privilege == User
+ then { handle_illegal(); RETIRE_FAIL }
+ else { RETIRE_SUCCESS }
+}
+
+mapping clause assembly = SFENCE_INVAL_IR() <-> "sfence.inval.ir"
+
+/* ****************************************************************** */