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# SPDX-License-Identifier: GPL-2.0-or-later
# Maxim Integrated MAX3263X OpenOCD target configuration file
# www.maximintegrated.com
# adapter speed
adapter speed 4000
# reset pin configuration
reset_config srst_only
if {[using_jtag]} {
jtag newtap max3263x cpu -irlen 4 -irmask 0xf -expected-id 0x4ba00477 -ignore-version
jtag newtap maxtest tap -irlen 4 -irmask 0xf -ircapture 0x1 -expected-id 0x07f76197 -ignore-version
} else {
swd newdap max3263x cpu -irlen 4 -irmask 0xf -expected-id 0x2ba01477 -ignore-version
}
# target configuration
target create max3263x.cpu cortex_m -chain-position max3263x.cpu
max3263x.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000
# Config Command: flash bank name driver base size chip_width bus_width target [driver_options]
# flash bank <name> max32xxx <base> <size> 0 0 <target> <flc base> <sector> <clk> <burst>
# max3263x flash base address 0x00000000
# max3263x flash size 0x200000 (2MB)
# max3263x FLC base address 0x40002000
# max3263x sector (page) size 0x2000 (8kB)
# max3263x clock speed 96 (MHz)
flash bank max3263x.flash max32xxx 0x00000000 0x200000 0 0 max3263x.cpu 0x40002000 0x2000 96
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