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# SPDX-License-Identifier: GPL-2.0-or-later
# Intel Cyclone 10 FPGA
# see: https://www.intel.com/content/www/us/en/docs/programmable/683777/current/bst-operation-control.html
# and: https://www.intel.cn/content/dam/support/us/en/programmable/kdb/pdfs/literature/hb/cyclone-10/c10gx-51003.pdf
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME cyclone10
}
array set _CYCLONE_10_DATA {
0x020f10dd { 603 226 10cl006_10cl010}
0x020f20dd {1080 409 10cl016}
0x020f30dd { 732 286 10cl025}
0x020f40dd {1632 604 10cl040}
0x020f50dd {1164 442 10cl055}
0x020f60dd {1314 502 10cl080}
0x020f70dd {1620 613 10cl120}
0x02e120dd {1339 -1 GX085}
0x02e320dd {1339 -1 GX105}
0x02e720dd {1339 -1 GX150}
0x02ef20dd {1339 -1 GX220}
}
set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
foreach id [array names _CYCLONE_10_DATA] {
set cmd [concat "-expected-id" id]
}
eval $jtag_newtap_cmd
source [find fpga/altera_common_init.cfg]
pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cyclone10
jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_10_DATA}"
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