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2021-03-10arm_tpiu_swo: add support for independent TPIU and SWOAntonio Borneo3-0/+1009
This is supposed to replace big part of armv7m_trace.[ch], since TPIU is not only the one implemented in Cortex-M3 and M4. Change-Id: I7588d16cbefe9cdb371c52fb0aa5cdfb48518804 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5858 Tested-by: jenkins
2021-03-10itm: rework itm commands before 'init'Antonio Borneo3-6/+11
If the command 'itm port[s]' is issued before 'init', the ITM can not be programmed because OpenOCD cannot access the target yet. The configuration is recorded and applied after target examine. The current test to trigger the ITM delayed-programming is based on the TPIU configuration. This is allowed because the only use of ITM it so send data through TPIU. In case of system TPIU, not belonging anymore to the target, there is no more association between target ITM and system TPIU. Add a flag to record the pending ITM configuration requested before 'init' and test the flag to trigger the delayed-programming of the ITM. Change-Id: I101eb97a116d7925cd2ff068f3e8813fc008b08e Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6029 Tested-by: jenkins
2021-03-10stlink: fix execution order in stlink_config_trace()Antonio Borneo1-1/+1
The change [1] guarantees that the value pointed by 'prescaler' gets always set, even when the adapter does not support the specific mode requested (e.g. sync), or during trace disabling. This works fine with the code in armv7m_trace_tpiu_config(), but requires all the parameters to be valid also to disable the trace (with 'enable==false'), otherwise returns error on incorrect parameters or even causes segmentation fault if pointers 'trace_freq' or 'prescaler' are NULL. Another problem in stlink_config_trace(), not linked with [1], is caused by a tentative to change the settings on an already enabled trace; the trace is disabled before the new parameters are fully validated and in case of invalid parameters the trace is not re-enabled. It would be more logical to first check all the parameters, then disable the trace, change the settings and re-enable the trace. Practically revert [1] by checking 'enable==false' at function entry, then disable trace and exit without any further check on the other parameters. For the case 'enable==true', validate all the function parameters then disable the trace, update the trace settings and re-enable the trace. Modify the caller armv7m_trace_tpiu_config() to initialize the variable 'prescaler' to a safe value to avoid the issue targeted by [1]. [1] commit 38277fa75280 ("jtag/drivers/stlink_usb: fix SWO prescaler") Change-Id: Ia6530682162ca2c9f5ac64301f2456f70cc07ed2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5934 Tested-by: jenkins Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2021-03-10armv7m_trace_itm_config: wait for ITMBusy to be clearedAdrian Negreanu2-0/+30
pg315 of CoreSight Components: It is recommended that the ITMEn bit is cleared and waits for the ITMBusy bit to be cleared, before changing any fields in the Control Register, otherwise the behavior can be unpredictable. Change-Id: Ie9a2b842825c98ee5edc9a35776320c668047769 Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com> Reviewed-on: http://openocd.zylin.com/6043 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10target: Remove redundant initialization of endiannessYasushi SHOJI1-3/+0
target->endianness is initialized to TARGET_ENDIAN_UNKNOWN at 34 lines below, before calling target_configure. This initialization is redundant and not needed. Change-Id: Iea2d5e17a13c1a8b0b209ba7c20043736b520ef6 Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com> Reviewed-on: http://openocd.zylin.com/6039 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10target/mips: Remove typedef'd structMarc Schink4-10/+10
The C style guide forbids typedef'd structs, see 'Naming Rules'. Change-Id: I449590251056c478c05105cdc18014ab4eb77ed8 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/6033 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-04target: avoid polling during 'resumed' event handlerAntonio Borneo1-0/+11
OpenOCD is based on a single main loop that schedules all the activities. At the execution of a TCL command, the timestamp is checked to eventually trigger the polling of the targets. This means that by executing a TCL command the polling can be triggered and detect a change of target's state. When openocd 'resumes' a target, the target can halt again by hitting a breakpoint. The 'resumed' event handler is started just after the target has been resumed, but it triggers a polling before the execution of its very first instruction. If the polling finds the target halted, it will run the 'halted' event handler, that will then be executed 'before' the pending 'resumed' handler. In case of gdb, a 'continue' command will restart the target but, polling (and halt detection) executed before the end of the resume process will hide the halt. As a consequence, the gdb will not be informed of the halt and will remains waiting as if the target is still running without showing the prompt. This can be verified by running on the target a firmware with a loop, run openocd with a dummy 'resumed' event, and let gdb to set a breakpoint in the loop. A 'continue' command will cause the target to halt again by hitting the breakpoint at the next loop iteration, but gdb will loose it and will not return the prompt. openocd -f board/st_nucleo_f4.cfg -c \ 'stm32f4x.cpu configure -event resumed {echo hello}' arm-none-eabi-gdb -ex 'target remote :3333' -ex 'b *$pc' -ex c Disable the polling while executing target's resume(). Document it and provide hints to developers to cope with future implementation. Change-Id: I3be830a8e7c2ef6278617cb4547a4d676b0ddeb5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reported-by: Габитов Александр Фаритович <gabitov@planarchel.ru> Reviewed-on: http://openocd.zylin.com/6074 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2021-02-13target: use proper macro for parsing watchpoint addressPeter Mamonov1-4/+4
Currently wp/rwp commands fail on 64-bit targets: > wp 0xffffffff80001400 4 addr option value ('0xffffffff80001400') is not valid Change-Id: I94d4af906b02b7bd463c8d79a6235a3646dfc434 Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Reviewed-on: http://openocd.zylin.com/6058 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18cortex_m: [FIX] ARMv8-M does not support VECTRESETTarek BOCHKATI1-2/+2
ref: Arm®v8-M Architecture Reference Manual (DDI0553B.m) D1.2.3: AIRCR, Application Interrupt and Reset Control Register Bit [0] is RES0 Change-Id: I6ef451b2c114487e2732852a60e86c292ffa6a50 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-on: http://openocd.zylin.com/6014 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18target/riscv: fix build error with -Werror=maybe-uninitializedTarek BOCHKATI1-1/+1
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized we get this error: /src/target/riscv/riscv.c: In function ‘riscv_address_translate’: /src/target/riscv/riscv.c:1536:13: error: ‘pte’ may be used uninitialized Change-Id: I51e180b43f9b6996e4e4058db49c179b9f81bcdc Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-on: http://openocd.zylin.com/6013 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-13openocd: fix doxygen parameters of functionsAntonio Borneo7-43/+47
Add to doxygen comment the missing parameters. Remove from doxygen comment any non-existing parameter. Fix the parameter names in doxygen comment to match the one in the function prototype. Where the parameter name in the doxygen description seems better than the one in the code, change the code. Escape the character '<' to prevent doxygen to interpret it as an xml tag. Change-Id: I22da723339ac7d7a7a64ac4c1cc4336e2416c2cc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6002 Tested-by: jenkins
2021-01-13openocd: fix incorrect doxygen commentsAntonio Borneo1-12/+12
Use '@param' in front of function's parameters and '@a' when the parameter is recalled in the description. This fixes doxygen complains: warning: Found unknown command '@buff16' While there, fix a minor typo s/occured/occurred/ in a comment and the typo s/@apram/@param/ in a doxygen comment. Change-Id: I5cd86a80adef552331310a21c55ec5d11354be21 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6001 Tested-by: jenkins
2021-01-13target: fix memory leak on multiple '-gdb-port' flagAntonio Borneo1-0/+1
In the odd case of multiple flags '-gdb-port' during 'target create' or following 'configure', the new strdup()'ed value will replace the old one without freeing it. Free the old value (if it exists) before replacing it. Change-Id: I1673346613ce7023880046e3a9ba473e75f18b8a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6005 Tested-by: jenkins
2020-12-26cortex-a: fix reset on dapdirect transportsAntonio Borneo1-2/+2
The target code for assert reset on cortex_a has been patched on commit b0698501b0e7 ("cortex_a: fix cortex_a_assert_reset() if srst_gates_jtag") then in cdba6ba0ad63 ("cortex_a: fix reset for SWD transport") to workaround the mismatch between jtag and swd implementations. See discussion for the second patch at http://openocd.zylin.com/3641/ While all of these mismatches should hopefully be cleaned by the reset framework rework, an extension of the workaround of the second patch is required for dapdirect transports, either dapdirect_swd and dapdirect_jtag. Extend the existing workaround to all non-jtag transports. Change-Id: Ia6a9d43bab524cbb3de4c37ce24c45f25187353d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5979 Tested-by: jenkins
2020-12-26armv7m_trace: stop getting traces from adapter at exitAntonio Borneo3-0/+21
If OpenOCD is reading trace data from the target, at exit it should stop the adapter to gather data, but should left the target still producing them. Add a helper in armv7m_trace to disable the adapter's trace and call it during OpenOCD teardown. This also provides a workaround for an issue in the firmware of ST-Link V3 till version V3J7. If the SWD connection is closed when trace is active, at following connection the trace does not work anymore. Change-Id: I47ccab61405384938555096c5aca789eaa090d27 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5978 Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Tested-by: jenkins
2020-12-05target/register: use an array of uint8_t for register's valueAntonio Borneo6-7/+7
The use of 'void *' makes the pointer arithmetic incompatible with standard C, even if this is allowed by GCC extensions. The use of 'void *' can also hide incorrect pointer assignments. Switch to 'uint8_t *' and add GCC warning flag to track any use of pointer arithmetic extension. Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5937 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05mips_mips64: fix minor host endianness bugAntonio Borneo1-1/+1
Commit 80f1a92bd798 ("mips64: Add generic mips64 target support") adds a log of the target's program counter in function mips_mips64_debug_entry() by directly casting the little-endian buffer in pc->value. This is going to print an incorrect value on big-endian hosts. Use the function buf_get_u64() to return the register value. Not tested on real HW. Issue identified with GCC compiler flag '-Wcast-align=strict' after change http://openocd.zylin.com/5937/ ("target/register: use an array of uint8_t for register's value"). Change-Id: Icbda2b54a03fdec287c804e623f5db4252f9cd2a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 80f1a92bd798 ("mips64: Add generic mips64 target support") Reviewed-on: http://openocd.zylin.com/5944 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05arm7_9_common: fix host endianness bug in arm7_9_full_context()Antonio Borneo1-4/+20
The original code passes to ->read_core_regs() and to ->read_xpsr() the pointer to the little-endian buffer reg.value. This is incorrect because the two functions above require a pointer to uint32_t, since they already run the conversion with arm_le_to_h_u32() in the jtag callback. This causes a mismatch on big-endian host and the registers get read with the incorrect endianness. Use an intermediate buffer to read the registers as uint32_t and to track the destination reg.value pointer, then copy the value in reg.value after the call to jtag_execute_queue(). Tested with qemu-armeb and an OpenOCD built through buildroot configured for cortex-a7 big-endian. Note that if jtag_execute_queue() fails, the openocd register cache is not updated, so the already modified flags 'valid' and 'dirty' are incorrect. This part should be moved after the call to jtag_execute_queue() too. Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5943 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05armv4_5: fix output of command 'arm reg'Antonio Borneo1-0/+3
Commit fc2abe63fd3c ("armv7m: use generic arm::core_mode") adds two special modes for ARMv6M and ARMv7M in struct arm_mode_data[]. While these modes do not have any additional register to be dumped by command 'arm reg', the command still prints an header for these modes but not followed by any register. Detect the special modes for ARMv6M and ARMv7M and skip them to avoid printing the useless header. Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: fc2abe63fd3c ("armv7m: use generic arm::core_mode") Reviewed-on: http://openocd.zylin.com/5942 Tested-by: jenkins
2020-12-05armv4_5: fix segmentation fault in command 'arm reg'Antonio Borneo1-0/+1
Commit fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor mode") introduces the secure mode 28 of ARMv6 as a synonymous of mode 22 (MON), but does not add it in the switch/case in command 'arm reg'. When command 'arm reg' scans the array arm_mode_data[] on targets without secure modes, it does not detect the new secure mode as not supported by the architecture, thus triggers a segmentation fault when it try to read the register's value from unallocated memory. Issue detected with target arm926ejs. Add the new mode in the switch/case and treat it as the mode MON. Change-Id: I2b72cc558e097879a7ee6ea601200bfda6b60270 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor mode") Reviewed-on: http://openocd.zylin.com/5941 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-02Add initial RTT supportMarc Schink5-2/+482
Real Time Transfer (RTT) is an interface specified by SEGGER based on basic memory reads and writes to transfer data bidirectionally between target and host. Every target that supports so called "background memory access", which means that the target memory can be accessed by the debugger while the target is running, can be used. RTT is especially of interest for targets which do not support Serial Wire Output (SWO) (e.g. ARM Cortex-M0) or where using semihosting is not possible (e.g. real-time applications) [1]. The data transfer is organized in channels where each channel consists of an up- and/or down-channel. See [2] for more details. Channels are exposed via TCP connections. One or more RTT server can be assigned to each channel to make them accessible to an unlimited number of TCP connections. The current implementation does not respect buffer flags which are used to determine what happens when writing to a full buffer. Note that the implementation is designed in a way that the RTT operations can be directly performed by an adapter (e.g. J-Link). [1] https://devzone.nordicsemi.com/tutorials/6/ [2] https://www.segger.com/jlink-rtt.html Change-Id: I8bc8a1b381fb74e08b8752d5cf53804cc573c1e0 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/4055 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-02adi_v5_swd: wait for readable DPIDR, ABORT if stalledTomas Vanek1-13/+56
Reading of DPIDR is the very first operation after JTAG to SWD sequence. Without this change if DPIDR read fails then swd connect fails. Keep trying JTAG to SWD sequence and DPIDR read until success or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport mostly unnecessary. Also test for ERROR_WAIT (which should not occur according to IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled then issue abort to make the next connect possible. Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5730 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-02arm_adi_v5: prevent possibly endless recursion in dap_dp_init()Tomas Vanek3-23/+43
If dap_dp_read_atomic() in 30 trials loop fails, dap->do_reconnect is set. Following dap_dp_read_atomic() calls dap_queue_dp_read() which in case of SWD transport calls swd_queue_dp_read(). It starts with swd_check_reconnect() and it calls swd_connect() because dap->do_reconnect is set. swd_connect() does some initialization, reads DPIDR and calls dap_dp_init() again! Moreover if dap_dp_init() is called from cortex_m_reset_(de)assert() one level of recursion is necessary to reconnect the target. Introduce dap_dp_init_or_reconnect() for use in cortex_m reset and similar. Remove loop of 30 atomic reads of DP_STAT to prevent unwanted recursion. Change-Id: I54052fdefe50bf5f7c7b59fe751fe2063d5710c9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5729 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-11-15target/armv7m, cortex_m: fix misleading commentsTomas Vanek2-6/+9
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5876 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/cortex_m: remove wrong xPSR.ICI/IT bits handlingTomas Vanek1-6/+0
If a Cortex-M (not M0, M0+) target was stopped in the middle of a conditional IT block or in the load/store multiple instruction, cortex_m_debug_entry() used wrong xPSR bits to detect it and then cleared 8 bits of the exception number from xPSR - probably wrong bit mask again. I believe clearing of the ICI/IT bits in cortex_m_debug_entry() has no reason as Cortex-M does not use instruction injecting. Remove the wrong code. The change was originally a part of http://openocd.zylin.com/4862 It is now re-submitted as #4862 is not ready. Change-Id: If91cd91d1b81b2684f7d5f10cf20452cde1a7f56 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5874 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: use arch_info[i].value instead of allocated memoryTomas Vanek2-6/+1
Change-Id: I9422cab484d0769404516947e16da1baa001a4e0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5328 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15cortex_m: use the new enum ARMV7M_REGSEL_nameAntonio Borneo1-1/+1
Register xPSR is indexed directly with its value 16 or with the incorrect enum ARMV7M_xPSR. Replace them with the new enum ARMV7M_REGSEL_xPSR. Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5873 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15target/cortex_m,hla_target: rework Cortex-M register handling part 4Tomas Vanek2-227/+8
Consolidate low level register read/write. Floating point registers were handled by target_read/write_u32 unlike other registers handled by cortexm_dap_read/write_coreregister_u32 There is no reason to do so in cortex_m. Remove cortexm_dap_read/write_coreregister_u32 and use cortex_m_load/store_core_reg_u32 directly. Similarly HLA adapters register read/write interface supports all registers so use it for any floating point and other registers. Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5864 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: rework Cortex-M register handling part 3Tomas Vanek4-165/+159
Move primask/basepri/faultmask/control packing/unpacking from cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg() and armv7m_write_core_reg() where also the FP 32/64-bit registers conversion takes place. Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL for packing/unpacking of special registers in the register cache. The new packing/unpacking is endianess safe. While on it improve returned error codes and LOG_ messages. Just minimal changes in cortex_m.c and hla_target.c, will be consolidated in the next patch. Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5863 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: rework Cortex-M register handling part 2Tomas Vanek2-37/+3
Make arm register id coherent with reg_list index. Without this reg_list[ARMV7M_R12] was possible but reg_list[ARMV7M_FPSCR] was out of bounds. Remove unused items from reg_list index. Change-Id: I84d3b5c496fc1839d07a5b74cb1fd1c3d4ff8989 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5862 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15target/armv7m: rework Cortex-M register handling part 1Tomas Vanek4-107/+194
Define a new enum with DCRSR.REGSEL selectors. Introduce armv7m_map_id_to_regsel() to unify mapping in one place. Use DCRSR.REGSEL selectors for low level register read/write. Change-Id: Ida0ccdfa9cdb1257a1900b8bfbf172b076374d39 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5327 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15target, register: allow a register hidden from gdb and 'reg' cmdTomas Vanek3-2/+4
Introduce a 'hidden' flag in struct reg to support a register cache containing different views of same data: e.g. Cortex-M has primask, basepri, faultmask and control registers accessed as one word. With the hidden flag we can add an reg_list item corresponding to hw access without exposing the register to user level. All the struct reg are allocated with calloc() but one in xscale.c allocated by malloc(). Change this one to use calloc() as well to guarantee initial value hidden=false Change-Id: I8da9f5a5a60777ae7ef943a841307487bd80fc6f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5325 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15flash/stmqspi: minor fixes on coding styleAntonio Borneo1-1/+1
Add space around operators; use BIT() macro in place of left shifting constant 1; remove space between cast operator and value; do not check a pointer before free() it; add parenthesis around parameters in macros; fix indentation using only TABs; remove line continuation '\' at code lines out of macros. Change-Id: I809e8ee72d7bfe49d0edf10afb36efe2458de77c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: e44539d66c89 ("Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface") Reviewed-on: http://openocd.zylin.com/5932 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-11target/cortex_m: Change sleep to running stateKevin Yang2-7/+3
When the core is in sleep mode, the core is no longer retiring instructions. Cortext M remains in "unknown" state. This patch converts sleep mode to "running" state. Change-Id: I1e9b6c9be51fd0f1f6ce81af9b1f5f9f1f43c661 Signed-off-by: Kevin Yang <kangyang@google.com> Reviewed-on: http://openocd.zylin.com/5921 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2020-11-08Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interfaceAndreas Bolsch4-4/+170
- write speed up to 150 kByte/s on STM32F469I-disco (due to SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in dual 4-line mode or STM32H73BI-Disco in octal mode - tested with STM32L476G-disco (64MBit flash, 3-byte addr), STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and STM32L476G-Disco (all 128Mbit flash, 3-byte addr), STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr) STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr) STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr) STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr) - suitable cfg for Discovery boards included - limited parsing of SFDP data if flash device not hardcoded (tested only in single/quad mode as most devices either don't support SFDP at all or have empty(!) SFDP memory) - 'set' command for auto detection override (e. g. for EEPROMs) - 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.) - makefile for creation of binary loader files - tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg - tcl/board/stm32f7discovery.cfg removed as name is ambiguous (superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg) - dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI with two W25Q128FV, sample cfg files included and on STM32H745I-Disco, STM32H747I-Disco, STM32H750B-Disco - read/verify/erase_check uses indirect read mode to work around silicon bug in H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last bytes causes debug interface to hang) - octospi supported only in single/dual 1-line, 2-line, 4-line and single 8-line modes, (not in hyper flash mode) Requirements: GPIOs must be initialized appropriately, and SPI flash chip be configured appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip specific, cf. included cfg files. The driver infers most parameters from current setting in CR, CCR, ... registers. Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4321 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-07target/arm7tdmi: remove unused/deprecated function parameterAntonio Borneo1-81/+78
The function arm7tdmi_clock_out() has one unused 'deprecated' parameter. Drop the unused 'deprecated' parameter and the FIXME above it. Change-Id: Ia8de41f5b8258825faccc737bba622e44c81a7ea Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5912 Tested-by: jenkins
2020-11-07target: Examine subsequent targets after failureKevin Yang1-3/+5
When a target examination fails, continue to examine subsequent targets. Return the number of targets that failed to examine. Change-Id: I883a0c445edc7eb00f496b79271d773771ec6b66 Signed-off-by: Kevin Yang <kangyang@google.com> Reviewed-on: http://openocd.zylin.com/5855 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07target/image: Use proper data typesMarc Schink5-42/+32
While at it, fix some coding style issues. Change-Id: Id521394d89e0bf787a6f812701c2cc0fe7e4e63f Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5919 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07semihosting: print the semihosting operation idAdrian Negreanu2-2/+2
Change-Id: If5c3568bd1c99a48ac492137f48da0d9764efe14 Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com> Reviewed-on: http://openocd.zylin.com/5923 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Reviewed-by: Tim Newsome <tim@sifive.com>
2020-11-07armv7m: add a TCP channel to stream captured traceTarek BOCHKATI2-19/+120
When trace capturing the trace is enabled using 'tpiu_config internal' (via the internal mode), OpenOCD can collect the trace buffers then append it to a specified file or named pipe and propagate the trace to 'tcl_trace' command. This change is allowing OpenOCD to stream the captured trace over TCP. When using this configuration OpenOCD acts like a server and multiple clients can connect and receive the captured trace. Example on STM32F7 running at 216MHz: itm port 0 on tpiu config internal :3344 uart off 216000000 Change-Id: Idea43e7e26e87b98a33da7fb9acf7ea50fe3b345 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5345 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07server: permit the add_service function to return the created serviceTarek BOCHKATI1-1/+2
returning the created service seems useful: as the only method to get the freshly created service is by getting the last item in the services linked list, and this seems to be like an intrusion to service internal mechanism. possibly, we could get the service from a connection but this is possible only from [new_connection|input|connection_closed]_handler_t, but this is not always practical: example: armv7m: add a TCP channel to stream captured trace http://openocd.zylin.com/#/c/5345/ here we poll for trace and broadcast to all connections outside of these xxx_handler_t functions also, storing one of the connections in new_connection_handler_t and get the service from it is possible, but this will make the code less readable. Change-Id: I5fef1baecec1e054953c6faf5b99d864ecc97f02 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5717 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2020-11-04target/adi_v5_jtag: remove unused global variableAntonio Borneo1-1/+1
Change-Id: Ia4e8b90359c23f4be1d3677b44b0ebd063bb8dcc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5901 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04cortex_m: declare local functions as staticAntonio Borneo2-6/+3
Functions that are not used outside the file should be declared as static. Change-Id: Ie81f6bdce91e2a1456364b47f30aa4d35c7ee7bc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5900 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Tested-by: jenkins
2020-11-04target: declare local symbols as staticAntonio Borneo19-51/+48
Functions and variables that are not used outside the file should be declared as static. Change-Id: I9f97571a528f0cb3c3c26f873577ab16fdec3cdc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5895 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04target: handle command 'target current' when no target is presentAntonio Borneo1-1/+3
Is it possible to run OpenOCD without any target, for example to only dump the rom-tables of an arm dap, or to perform low level jtag operations. But without any target created, the command 'target current' causes OpenOCD to abruptly exit. Handle in command 'target current' the case of no targets. Change-Id: Ide15cb13bec84b88ccc3e7126523c04a6d70e636 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5881 Tested-by: jenkins
2020-11-04gdb_server: allow multiple GDB connections to selected targetsAntonio Borneo2-3/+27
The default way of working is to have a single GDB attached to one target, so OpenOCD accepts only one connection to the GDB port of each targets and rejects any further connection. There are some barely safe use cases in which it could get useful having a second GDB connection to the same target. One such use case is while using GDB as a 'non-intrusive memory inspector', as explained in the OpenOCD documentation. One GDB can be left running an infinite loop to dump some memory area, or even analysing the content, while keeping a second GDB ready for user interaction or spot memory check. Add a target configure option to specify the maximum number of GDB connections allowed for that target, keeping the default to 1. Change-Id: I4985a602e61588df0b527d2f2aa5b955c93e125e Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5865 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-11-04target/arm_cti: use adiv5_jim_mem_ap_spot_configure()Antonio Borneo2-101/+47
To avoid code duplication, reorganize the code to replace cti_configure() with adiv5_jim_mem_ap_spot_configure(). Reorganize 'struct arm_cti_object' and its sub-'struct arm_cti' moving DAP and mem-AP info in a 'struct adiv5_mem_ap_spot'. Replace cti_configure() with adiv5_jim_mem_ap_spot_configure(). Deprecate the use of '-ctibase' in favor of '-baseaddr'. Change-Id: I43740a37c80de67c0f5e4dc79c3400b91a12e9e8 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5869 Tested-by: jenkins
2020-11-04target/arm_adi_v5: add helper to get mem_ap spot in configure/cgetAntonio Borneo2-85/+135
This is somehow an extension of existing adiv5_jim_configure(), but includes the 'address' in the mem_ap. Rewrite adiv5_jim_configure() using the new helper. Change-Id: Ia7effeeece044004d459b45126ed4961a98b8568 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5857 Tested-by: jenkins
2020-10-30target: restore last run state after profilingChristopher Head1-1/+13
Now that it’s possible to start profiling from either a running or a halted state, rather than unconditionally halting after profiling finishes, it makes more sense to restore the processor to whatever state (running or halted) it was in before profiling started. Change-Id: If6f6e70a1a365c1ce3b348a306c435c220b8bf12 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5237 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30target/cortex_m: reduce duplication in profilingChristopher Head3-47/+24
The Cortex-M implementation of profiling contains a bunch of conditionals and checks to handle both chips which have PCSR and chips which do not. However, the net effect of the non-PCSR branches is actually exactly the same as what target_profiling_default does. Rather than duplicating this code, just detect the situation where PCSR isn’t available and delegate to target_profiling_default. Change-Id: I1be57ac77f983816ab6bf644a3cfca77b67d6f70 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5236 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
generated by cgit v1.1 at 2024-10-21 11:12:55 +0000