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AgeCommit message (Expand)AuthorFilesLines
2020-10-30target: allow profiling from runningChristopher Head2-4/+6
2020-10-24target/arc: introduce watchpoints supportEvgeniy Didin1-3/+165
2020-10-22cortex_m: support control.FPCASylvain Chouleur3-7/+7
2020-10-14riscv: fix compile errorAntonio Borneo1-2/+2
2020-10-14Upstream tons of RISC-V changes.Tim Newsome14-2659/+7226
2020-10-11target/aarch64: fix use of 'target->private_config'Antonio Borneo1-0/+5
2020-10-11target/aarch64: Use apnum settingKevin Yang1-10/+14
2020-10-03target/cortex_m.c: vector_catch command checks if a target is examinedDaniel Trnka1-0/+5
2020-10-03target/aarch64: a64 disassemblerMete Balci4-1/+218
2020-09-27Use capstone for ARM disassemblerMarc Schink4-1615/+112
2020-09-20cortex_m: add detection of Cortex M35P and M55Tarek BOCHKATI2-3/+9
2020-09-20cortex_m: read and display core security stateTarek BOCHKATI3-1/+25
2020-09-20armv8-m: add SecureFault exceptionTarek BOCHKATI3-1/+12
2020-09-05target: avoid checking for non NULL pointer to free itAntonio Borneo11-87/+43
2020-09-05openrisc: Fix segv jsp due to free of unallocated dataStafford Horne1-6/+0
2020-09-05openocd: fix command's usage stringAntonio Borneo2-5/+5
2020-09-05target/arc: fix command's usage stringAntonio Borneo1-10/+10
2020-09-05target: use proper format with uint32_tAntonio Borneo30-121/+121
2020-09-05adi_v5: use macro DP_APSEL_MAX to allocate struct adiv5_apAntonio Borneo1-1/+1
2020-09-05Fix debug prints when loading to flashSamuel Obuch1-6/+6
2020-08-08target: fix memory leaks on target_create() failAntonio Borneo1-14/+55
2020-08-08target: fix registers reading from non examined targetMikhail Rasputin1-1/+10
2020-08-02target/arm11: fix memory leaks, including register cacheAntonio Borneo3-0/+20
2020-08-02target: use one second timeout while halting target at gdb attachAntonio Borneo1-1/+1
2020-07-26target: fix minor typos and duplicated wordsAntonio Borneo47-114/+114
2020-07-26target/arm720t: fix memory leak of register cacheAntonio Borneo1-0/+6
2020-07-26target/arm7tdmi: fix memory leak of register cacheAntonio Borneo2-0/+14
2020-07-26target/xscale: fix memory leak of register cacheAntonio Borneo1-0/+24
2020-07-26target: fix memory leaks on targets based on arm9tdmiAntonio Borneo7-0/+62
2020-07-26src/target/arm_adi_v5.c: add Cortex-A35 related entriesJiri Kastner1-0/+4
2020-07-26src/target/arm_adi_v5.c: resorted idsJiri Kastner1-4/+4
2020-07-26target/arc: Introduce Actionpoints supportEvgeniy Didin3-9/+360
2020-07-08coding style: add arguments to function prototypesAntonio Borneo3-22/+22
2020-07-08coding style: fix space separationAntonio Borneo9-232/+232
2020-07-08coding style: fix print of hex values as decimalAntonio Borneo1-1/+1
2020-07-08target/arm926ejs: fix memory leaksAntonio Borneo7-0/+44
2020-06-27target: do not print an error on shutdown in target eventsAntonio Borneo1-2/+6
2020-06-27target/arc: Introduce L1I,L1D,L2 caches supportEvgeniy Didin4-5/+328
2020-06-27aarch64: Add support for debugging in HYP mode on ARMv8-A coresLucas3-2/+12
2020-06-18target/armv7m_trace: Calculate prescaler for external capture devicesMarc Schink1-0/+16
2020-06-06coding style: fix multi-line dereferencingAntonio Borneo1-2/+2
2020-06-06target/cortex_a: fix memory leak of register cacheAntonio Borneo4-0/+25
2020-06-06target/mem_ap: fix two memory leaksAntonio Borneo1-0/+10
2020-06-06target/cortex-m: enable C_DEBUGEN during examineAntonio Borneo1-0/+13
2020-06-06arm_adi_v5: dap_ti_be_32_quirks_command minor simplificationTarek BOCHKATI1-18/+2
2020-06-06arm_adi_v5: enhance command error reportingTarek BOCHKATI1-17/+32
2020-05-24openocd: properly use jim data typesAntonio Borneo2-3/+4
2020-05-24stm8 target: make adapter speed settings workAke Rehnman1-11/+29
2020-05-24swim: fix adapter speed handlingAntonio Borneo1-1/+1
2020-05-24swim: abstract the transport in stm8 targetAntonio Borneo1-53/+16
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