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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2020-10-14 10:41:12 +0200 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-10-14 11:05:22 +0100 |
| commit | 4fc61a2f9d60e49b8134ab7e0929cfb2b3a4f771 (patch) | |
| tree | ec43627f620e38ffb053108aa4c04220b82f1fd5 /src/target | |
| parent | b68674a1da7249c52b00b511fe0ceb20ace5ae4d (diff) | |
| download | riscv-openocd-4fc61a2f9d60e49b8134ab7e0929cfb2b3a4f771.zip riscv-openocd-4fc61a2f9d60e49b8134ab7e0929cfb2b3a4f771.tar.gz riscv-openocd-4fc61a2f9d60e49b8134ab7e0929cfb2b3a4f771.tar.bz2 | |
riscv: fix compile error
The commit b68674a1da72 ("Upstream tons of RISC-V changes.") was
proposed well before commit 3ac010bb9f10 ("Fix debug prints when
loading to flash"), but the merge got in different order.
After latest merge, the master branch fails to compile.
Fix the compile error.
Change-Id: Ia3bd21d970d589343a3b9b2d58c89e0c49f30015
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5856
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/riscv/riscv.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 4ef969b..53af07e 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3452,7 +3452,7 @@ static int register_get(struct reg *reg) buf_set_u64(reg->value, 0, reg->size, value); } reg->valid = gdb_regno_cacheable(reg->number, false); - char *str = buf_to_str(reg->value, reg->size, 16); + char *str = buf_to_hex_str(reg->value, reg->size); LOG_DEBUG("[%d]{%d} read 0x%s from %s (valid=%d)", target->coreid, riscv_current_hartid(target), str, reg->name, reg->valid); free(str); @@ -3465,7 +3465,7 @@ static int register_set(struct reg *reg, uint8_t *buf) struct target *target = reg_info->target; RISCV_INFO(r); - char *str = buf_to_str(buf, reg->size, 16); + char *str = buf_to_hex_str(buf, reg->size); LOG_DEBUG("[%d]{%d} write 0x%s to %s (valid=%d)", target->coreid, riscv_current_hartid(target), str, reg->name, reg->valid); free(str); |