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AgeCommit message (Expand)AuthorFilesLines
2024-01-06target/mips32: optimize pracc accessWalter Ji5-39/+208
2024-01-06target/mips32: add mips ejtag commandWalter Ji3-2/+91
2024-01-06target/mips32: update coprocessor 0 commandWalter Ji2-40/+281
2024-01-06target/mips32: add cpu info detectionWalter Ji3-87/+424
2023-12-30target/cortex_m: Add Cortex-M85 partMarc Schink2-0/+7
2023-12-30jtag: add -ir-bypass option to newtapHenrik Nordström2-0/+3
2023-12-30target/armv8: Add more support for decoding memory attributesPeter Collingbourne1-3/+76
2023-12-29target/adi_v5_swd: optimize sequences in swd_connect_multidrop()Tomas Vanek1-3/+30
2023-12-29target/arm_adi_v5,arm_dap: introduce pre_connect_init() dap operationTomas Vanek2-0/+12
2023-12-29target/arm_adi_v5: fix DP SELECT logicTomas Vanek4-101/+164
2023-12-24break from long loops on shutdown requestEvgeniy Naydanov2-1/+22
2023-12-16jtag: Rename 'hasidcode' to 'has_idcode'Marc Schink1-1/+1
2023-12-16target: use bool for backup_working_areaAntonio Borneo2-5/+5
2023-12-10target: Increase maximum profile sample count to 1000000Karl Palsson1-1/+1
2023-12-10target: Add some info messages about examination process.Kirill Radkin1-0/+5
2023-12-10target/espressif: add algorithm support to xtensa chipsErhan Kurubas9-1/+192
2023-12-10target/xtensa: add algorithm supportErhan Kurubas2-0/+234
2023-12-10target/espressif: add algorithm support to execute code on targetErhan Kurubas5-2/+1103
2023-12-01target/target: Fix 'wp' command usageMarc Schink1-1/+1
2023-12-01target: clarify usage of `coreid`Evgeniy Naydanov6-17/+17
2023-12-01target/mips32: pracc write cp0 status register firstWalter Ji1-2/+5
2023-11-24target: Throw error in 'debug_reason' commandMarc Schink1-1/+11
2023-11-24target: remove `target_number`Evgeniy Naydanov3-59/+15
2023-11-18mips32: MIPS32_OP_SRL was using SRA opcode.Tobias Diedrich1-2/+4
2023-11-18aarch64: Use 64-bit reads/writes to access SCTLR_EL1Peter Collingbourne2-6/+6
2023-11-18openocd: src/target: Correctly handle CCSIDR_EL1.Associativity=0Peter Collingbourne1-2/+3
2023-11-18breakpoints: Add target logging to breakpoints and watchpointsMarek Vrbka2-21/+19
2023-11-18breakpoints: Fix endless loop in bp/wp_clear_targetKirill Radkin1-23/+12
2023-11-18xtensa: update XDM register map for TRAX supportianst3-0/+117
2023-11-18target: Remove break/watchpoints in target_destroy()Marc Schink1-0/+3
2023-11-18target: fix segmentation fault on target createAntonio Borneo1-1/+1
2023-11-18target: use boolean values for 'valid' and 'dirty' flagsAntonio Borneo4-19/+19
2023-11-11target: Add a debug_reason commandPeter Collingbourne1-0/+19
2023-11-11target/breakpoints: make breakpoint_watchpoint_remove_all staticErhan Kurubas1-1/+1
2023-11-11target: fix a memory leak in image_openEvgeniy Naydanov1-8/+14
2023-11-11target/mips32: update mips32 config register parsingWalter Ji2-7/+321
2023-11-11target: Fix get_reg, prevent returning invalid dataMarek Vrbka1-1/+1
2023-11-11target/target: Use boolean values for 'valid' flagMarc Schink1-2/+2
2023-10-25target/mips32: check read regs result in save contextWalter Ji1-1/+5
2023-10-25target/mips32: rework mips core register related functionsWalter Ji6-173/+508
2023-10-14target: check if target is not examined on reg commandParshintsev Anatoly1-0/+4
2023-10-14target: Change the watchpoint type print from number to letterMarek Vrbka1-2/+3
2023-10-14breakpoints: add rwp all commandMarek Vrbka3-39/+91
2023-10-14target: Fix an issue with rwp/rbp command in smp targetsKirill Radkin1-4/+8
2023-10-14arm_opcode: Add support for ARM MCRR/MRRCFlorian Fainelli6-0/+262
2023-10-07target: return error if attempting to access non-existing registersParshintsev Anatoly1-2/+2
2023-10-07target/arc: do not invalidate icache when (un)setting breakpointsArtemiy Volkov1-6/+0
2023-10-07armv8_dpm: fix registers read at debug entryAntonio Borneo1-2/+9
2023-10-02target/cortex_m: support Infineon Cortex-M33 from SLx2 MCUAhmed Boughanmi3-13/+20
2023-10-02image: log error when unknown image type is specifiedMarek Vrbka1-7/+9
generated by cgit v1.1 at 2024-09-18 09:32:05 +0000