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2024-03-28Merge up to a35e254c5383008cdacf7838a777f7f17af5eeb1 from upstreamEvgeniy Naydanov11-61/+748
Checkpatch-ignore: MACRO_ARG_REUSE, MACRO_ARG_PRECEDENCE Change-Id: Icd10f44d162054f8f32019a579ccbdda2cee7a91
2024-03-24target/adi_v5_swd: move setting of do_reconnect one level upTomas Vanek1-12/+10
Move setting of do_reconnect flag from swd_run_inner() to swd_run(). Reconnect is not used at the inner level and the flag had to be cleared after swd_run_inner() to prevent recursion. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: Ib1de80bbdf10d1cbfb1dd351c6a5658e50d12af2 Reviewed-on: https://review.openocd.org/c/openocd/+/8155 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-03-24helper/list: include the correct header fileAntonio Borneo1-0/+1
The file 'list.h', copied from FreeBSD, does not depend from any OpenOCD specific include file, but only needs 'stddef.h' for the type 'size_t'. Let 'list.h' to include the correct header file, then fix the now broken dependencies in the other files that were incorrectly relying on 'list.h' to include 'helper/types.h' Change-Id: Idd31b5bf607e226cac44ef41b2aa335ae4dbf519 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8173 Tested-by: jenkins
2024-03-21[NFC] target/riscv: refactor `init_registers()`Evgeniy Naydanov3-379/+529
The logic in `init_registers()` was quite convoluted. Initialization of each `struct reg` field is separated into function `gdb_regno_<field_name>()`. IMHO, this makes it much easier to reason about the code. Change-Id: Id7faa1464ce026cc5025585d0a6a95a01fb39cee Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-03-16target/mips32: add fpu access supportWalter Ji4-12/+245
Add access to fpr and cp1 registers. GDB can now check the FPRs with `info reg f` and change them. Checkpatch-ignore: MACRO_ARG_REUSE Change-Id: I63896ab6f6737054d8108db105a13a58e1446fbc Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7866 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-16target: aarch64: add support for 32 bit MON modeAntonio Borneo1-0/+3
Extend the existing code to support Monitor mode in AArch32. Change-Id: Ia43df98d1497baac48aea67b92d81344c24f0635 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8169 Tested-by: jenkins
2024-03-16target/adi_v5_swd: fix DP registers bankingTomas Vanek1-6/+9
ADIv6 brought more complicated rules for DP reg 0 banking. Neither the original implementation [1] nor the later modification [2] respected that the DP reg 0 is banked for read only, not for write. Enforcing of an useless SELECT write before a write to ABORT register may trigger FAULT (CTRL/STAT bits ORUNDETECT and STICKYORUN are set) or WAIT (DP is stalled by an outstanding previous operation) and therefore make ABORT register virtually unusable on some adapters (bitbang, CMSIS-DAP). There are DP ABORT specific functions swd_queue_ap_abort() and swd_clear_sticky_errors() which worked around the problem using the lowest level swd->write_reg(). Using a specific write procedure for a single DP register was error prone (there are other DP_ABORT writes using swd_queue_dp_write_inner()) and also the Tcl command 'xx.dap dpreg 0 value' suffered from unwanted SELECT write. Other smaller discords in DP banking probably do not influence normal DP operation however they may complicate debugging in corner cases. Adhere strictly to the DP banking rules for both ADI versions. Fixes: [1] commit 72fb88613f02 ("adiv6: add low level swd transport") Fixes: [2] commit ee3fb5a0eacb ("target/arm_adi_v5: fix DP SELECT logic") Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I3328748c1c3e0661c5ecd6eb070ac519b190ace2 Reviewed-on: https://review.openocd.org/c/openocd/+/8154 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-16target/arm_adi_v5: introduce adiv5_jim_configure_ext()Tomas Vanek4-26/+29
Allow direct pointer to struct adiv5_private_config for targets with adiv5_private_config inside of a bigger private config container. Use it instead of the private_config pointer toggling hack in aarch64.c Allow optional use of -dap parameter and use it instead of the static variable hack in xtensa_chip.c Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I7260c79332940adfa49d57b45cae39325cdaf432 Reviewed-on: https://review.openocd.org/c/openocd/+/8138 Tested-by: jenkins Reviewed-by: Ian Thompson <ianst@cadence.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-09target/mips32: add dsp access supportWalter Ji2-1/+447
Add access to dsp registers and a command for dsp related operations. Checkpatch-ignore: MACRO_ARG_REUSE Change-Id: I30aec0b9e4984896965edb1663f74216ad41101e Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7867 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-09mem_ap: fix GDB connectionsAntonio Borneo1-4/+4
After commit d9b2607ca094 ("gdb_server: support sparse register maps"), GDB crashes while requesting the value of 'cpsr' because the fake register is tagged as not existing. Change the logic and set all register as existing, while still limiting the list for the initial GDB request at connect. Change-Id: I1c4e274c06147683db2a59a8920ae5ccd863e15c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8163 Tested-by: jenkins
2024-03-07Merge up to 07141132a7d787005c0829618a60b4a842be7847 from upstreamEvgeniy Naydanov4-71/+74
Change-Id: Ibca0c8093e2983e1ee199f79ed777f5136794195
2024-03-02target/esp_xtensa_smp: don't use coreid as an SMP indexErhan Kurubas1-2/+5
For the sake of https://review.openocd.org/c/openocd/+/7957 Instead of "coreid", 'target smp' command call order used as an index Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: Iab86b81868d37c0bf8663707ee11367c41f6b96d Reviewed-on: https://review.openocd.org/c/openocd/+/8162 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-02-27Merge pull request #977 from kr-sc/kr-sc/improve-riscv-controlsEvgeniy Naydanov2-80/+68
target/riscv: Improve riscv controls that manage the set of available triggers for watchpoints
2024-02-24src/target/riscv: Help older compilersSevan Janiyan1-1/+1
find members of a union, nested in struct. Allows file to be compiled with GCC 4.0 Signed-off-by: Sevan Janiyan <venture37@geeklan.co.uk> Change-Id: Ied68668d3b5f811573a20e11e83aceff268963eb Reviewed-on: https://review.openocd.org/c/openocd/+/8120 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-02-24Merge pull request #1018 from en-sc/en-sc/from_upstreamEvgeniy Naydanov1-36/+12
Merge up to efdd5e0 from upstream
2024-02-21Merge pull request #1014 from riscv-collab/riscv-batch-cleanupEvgeniy Naydanov5-82/+93
Fixes and cleanup in riscv batch and related functions
2024-02-16Merge pull request #1016 from tom-van/free-dm-target_listEvgeniy Naydanov1-0/+25
Free dm and target_list structures
2024-02-15Fixes of review findingsriscv-batch-cleanupJan Matyas1-3/+7
Change-Id: Ie9889d995d7b2a6e458ad5f66cc3d990888f54ec Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2024-02-15portability fix: Switch binary literals to hexSevan Janiyan2-68/+68
Allows build with legacy toolchains which do not support C23 nor GCC extension for binary literals. Change-Id: I742d3a8a86bf16f81421d11c59d3cb155ee17aed Signed-off-by: Sevan Janiyan <venture37@geeklan.co.uk> Reviewed-on: https://review.openocd.org/c/openocd/+/8123 Tested-by: jenkins Reviewed-by: Jörg Wunsch <openocd@uriah.heep.sax.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-02-15Merge up to efdd5e09b1108e3bd35898a684817c01dc95cd93 from upstreamEvgeniy Naydanov1-36/+12
There is an ongoing discussion on https://review.openocd.org/c/openocd/+/8124 regarding 0d3d4c981ac77b600ce95c9ea6f1cdb280127342, but AFAIU it seems that the patch does not break anything. Change-Id: I48037504300e517b14e41a00f3bf978a16172d14
2024-02-13target/riscv: Improve riscv controls that manage the set of available ↵Kirill Radkin2-80/+68
triggers for watchpoints Add more debug messages connected with triggers. Update names for internal flags to make them more clarified. Change-Id: I5642346ce4a1e9bf79b22cdbf36bd757a7beffa8 Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
2024-02-12Merge pull request #1011 from en-sc/en-sc/wa-halt-groupsJan Matyas1-0/+6
target/riscv: set `state` and `debug_reason` in `riscv_halt_go_all_harts()`
2024-02-11target/cortex_m: fix couple of commentsTomas Vanek1-8/+6
Fix obsoleted references to Cortex-M3 from the time when M3 was the only supported Cortex. Fix typo. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I6f93265f1b9328fec063fecd819210deb28aaf2c Reviewed-on: https://review.openocd.org/c/openocd/+/8099 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-02-11target/cortex_m: drop useless target_halt() callTomas Vanek1-27/+4
In 2008 the commit 182936125371 ("define resetting the target into the halted or running state as an atomic operation.") introduced the target_halt() call to the end of cortex_m3_assert_reset(), Checkpatch-ignore: GIT_COMMIT_ID A year later the commit ed36a8d15dfd ("... Updated halt handling for cortex_m3") prevented cortex_m3_halt() take any action in case of TARGET_RESET state. This narrowed the target_halt() called from cortex_m3_assert_reset() to setting target->halt_issued and storing a time stamp. Introducing ocd_process_reset(_inner) made the setting of halt_issued and halt_issued_time useless. The Tcl function waits for halt of all targets if applicable. cortex_m_halt() and also target_halt() does not work as expected if the cached target state is TARGET_RESET (although the core could be out of reset and ready to be halted, just have not been polled). Explicit Tcl arp_poll must be issued in many scenarios. Remove the useless hack. Also remove the explicit error return from cortex_m_halt_one() in case of RESET_SRST_PULLS_TRST and asserted srst. If the communication with the target is gated by any reset, cortex_m_write_debug_halt_mask() fails. Propagate the error return of this call instead. Change-Id: I0da05b87f43c3d0facb78e54d8f00c1728fe7c46 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8098 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-02-11target/cortex_m: prevent asserting reset if examine is deferredTomas Vanek1-1/+2
In a corner case when debug_ap is not available, cortex_m_assert_reset() asserts reset to restore communication with the target. Prevent to do so on targets with defer_examine, as such targets need some special handling to enable them after reset anyway. The change makes possible to handle a multicore Cortex-M SoC with an auxiliary Cortex-M core(s) switched of by default even with 'reset_config srst_gates_jtag' Change-Id: I8cec7a816423e588d5e2e4f7904c81c776eddc42 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8097 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-02-11target/riscv: free dm and target_list structuresTomas Vanek1-0/+25
Fix memory leak on exit. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I6a89ac0c93b11da35b90eec3abcc5b6fd5d1be68
2024-02-09Merge pull request #1013 from riscv/dm-calls-cleanupJan Matyas1-10/+11
Cosmetic cleanup of dm_*() calls in riscv-013.c
2024-02-09Merge pull request #1008 from en-sc/en-sc/from_upstreamJan Matyas14-76/+107
Merge up to 9659a9b5e28dc615dfb508d301fdd8fa426c191b from upstream
2024-02-06riscv/program: Removed dead code for restoring register valuesJan Matyas2-23/+0
Function riscv_program_exec() contains code for restoring of register values after progbuf execution. This code is not used anymore by current OpenOCD, and hence removed. Related discussion can be found under: https://github.com/riscv/riscv-openocd/issues/982 Change-Id: I4c79bec081522b6fc0d16367cef51ed19a131962 Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2024-02-06Fixes and cleanup in riscv batch and related functionsJan Matyas5-81/+88
Fixes: - Data types of address & data parameters in riscv_batch_add_*() and riscv*_fill_dm*() changed to uint64_t and uint32_t. - Corrected the comparison in riscv_batch_full(). - Corrected assertions in riscv_batch_get_dmi_read_op() and riscv_batch_get_dmi_read_data(). Cleanup: - Simplified calloc() fail handling in riscv_batch_alloc(). - Added explicit NULL assignments in riscv_batch_alloc() for clarity and readability. Don't rely on calloc(). - Removed suffix `_u64` from riscv_*_fill_dm*() since it does not have any meaning. - Renamed *dmi_write_u64_bits() to *get_dmi_scan_length() which better describes its purpose. Change-Id: Id70e5968528d64b2ee5476f1c00e08459a1e291d Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2024-02-05Cosmetic cleanup of dm_*() calls in riscv-013.cJan Matyas1-10/+11
Cleanup, non-functional changes: - Replaced one call of low-level function dm_op() by high-level dm_read(). - Made sure that truncation of values passed to dm_* is explicit. (Added explicit casts.) Change-Id: I1d1b2f29a822b6841373f3313de2b1e96f514116 Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2024-02-02target/riscv: set `state` and `debug_reason` in `riscv_halt_go_all_harts()`Evgeniy Naydanov1-0/+6
If targets are in a halt group, and a target in the group reaches a breakpoint, the target's state was able to remain `TARGET_RUNNING`. Addresses issue #1010 Change-Id: I734bc6da71d289c4d05b417c8bf67a7d1a56574f Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-01-29Merge pull request #1006 from en-sc/en-sc/break-ll-revertJan Matyas6-40/+1
Revert "break from long loops on shutdown request"
2024-01-29Merge up to 9659a9b5e28dc615dfb508d301fdd8fa426c191b from upstreamEvgeniy Naydanov14-76/+107
Change-Id: I2fda9689d3465b3d8c8f3459b1ed954cb1d70fdc
2024-01-29target/mips32: fix false positive from clangAntonio Borneo1-8/+9
clang build triggers an error for an uninitialized value of the variable 'instr'. This is a false positive, as the macro #define MIPS32_CONFIG3_ISA_MASK (3 << MIPS32_CONFIG3_ISA_SHIFT) guarantees the switch/case already covers all the possible values with cases 0, 1, 2 and 3. Silent clang by adding a useless default case to the switch. While there, fix the indentation of the switch/case accordingly to OpenOCD coding style. Change-Id: I0ae316754ce7d091dd8366bf314b8e6ee780e313 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 7de4b1202d50 ("target/mips32: add cpu info detection") Reviewed-on: https://review.openocd.org/c/openocd/+/8065 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2024-01-29target/xtensa: enable xtensa algo supportianst3-4/+23
- Add extra error checking - Cache PS; lower PS.INTLEVEL to allow breakpoint trigger (LX) - Xtensa algo support functional on LX per functional flash driver - Test on NX via manual algo validation Change-Id: Ie7cff4933979a0551308b382fa33c33c66376f25 Signed-off-by: ianst <ianst@cadence.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8075 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com> Tested-by: jenkins
2024-01-29target: drop deprecated code for mem2array and array2memAntonio Borneo2-441/+35
Commit e370e06b724f ("target: Deprecate 'array2mem' and 'mem2array''") has already replaced the deprecated root versions of commands mem2array and array2mem with TCL proc's that use 'read_memory' and 'write_memory'. It has left the deprecated code of the target's version of the commands because the effort to code the TCL replacement was not considered valuable. To drop the last jim_handler commands, I consider much easier and less error-prone to code them in TCL instead of converting the deprecated code to COMMAND_HANDLER. Drop the code in target.c and extend the TCL proc's. While there, add the TCL procs to _telnet_autocomplete_skip. Change-Id: I97d2370d8af479434ddf5af68541f90913982bc0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8052 Tested-by: jenkins
2024-01-29LICENSES: drop SPDX tag 'GPL-2.0' and use 'GPL-2.0-only'Antonio Borneo1-1/+1
The SPDX tag 'GPL-2.0' has been deprecated in https://spdx.org/licenses/GPL-2.0.html and the preferred tag is now 'GPL-2.0-only' https://spdx.org/licenses/GPL-2.0-only.html Update the LICENSES documents and the SPDX of the only file that reports the deprecated tag. Change-Id: I3c3215438bc4378ff470bb9fa8fa962505a9ae50 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8064 Tested-by: jenkins
2024-01-29target/arc: skip over breakpoints in arc_resume()Evgeniy Didin1-1/+58
When requested by the core code (handle_breakpoints = true), arc_resume() should be able to advance over a potential breakpoint set at the resume address instead of getting stuck in one place. This is achieved by removing the breakpoint, executing one instruction, resetting the breakpoint, then proceeding forward as normal. With this patch applied, openocd is now able to resume from a breakpoint halt when debugging ARCv2 targets via telnet. This has previously been committed to the Zephyr project's openocd repo (see https://github.com/zephyrproject-rtos/openocd/pull/31). Change-Id: I17dba0dcea311d394b303c587bc2dfaa99d67859 Signed-off-by: Evgeniy Didin <didin@synopsys.com> Signed-off-by: Stephanos Ioannidis <root@stephanos.io> Signed-off-by: Artemiy Volkov <artemiy@synopsys.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7817 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-01-29target/arc: restore breakpoints in arc_resume()Evgeniy Didin1-0/+36
Presently, we rely on gdb to restore break/watchpoints upon resuming execution in arc_resume(). To match this behavior in absence of gdb (more specifically, when handle_breakpoints is true), this patch explicitly re-enables all breakpoints and watchpoints in arc_resume(). This has previously been committed to the Zephyr project's openocd repo (see https://github.com/zephyrproject-rtos/openocd/pull/31). Change-Id: I59e9c91270ef0b5fd19cfc570663dc67a6022dbd Signed-off-by: Evgeniy Didin <didin@synopsys.com> Signed-off-by: Stephanos Ioannidis <root@stephanos.io> Signed-off-by: Artemiy Volkov <artemiy@synopsys.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7816 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2024-01-29target/xtensa: extra debug info for "xtensa exe" failuresianst1-6/+12
- Read and display EXCCAUSE on exe error - Clean up error messages - Clarify "xtensa exe" documentation Signed-off-by: ianst <ianst@cadence.com> Change-Id: I90ed39f6afb6543c0c873301501435384b4dccbe Reviewed-on: https://review.openocd.org/c/openocd/+/7982 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-29cortex_m: add detection of MVE feature for Armv8.1-M coresTarek BOCHKATI2-19/+34
For Armv8.1-M based cores, detect if the core implements the optional M-profile vector extension (MVE), using MVFR1 register. While at there rework armv7m->fp_feature detection based on MVFR0 and MVFR1 registers. Change-Id: I92d5b1759aea9f7561d285f46acdec51d6efb7b4 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6950 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-01-28target/esirisc: free memory at OpenOCD exitAntonio Borneo1-0/+40
The target esirisc does not free the allocated memory resources, causing memory leaks at OpenOCD exit. Add esirisc_free_reg_cache() and esirisc_deinit_target() and use them to free all the allocated resources. Change-Id: I17b8ebff54906fa25a37f2d96c01d010a98cffbd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8094 Tested-by: jenkins Reviewed-by: Steven Stallion <sstallion@gmail.com>
2024-01-28target: get_gdb_arch() accepts target via const pointerEvgeniy Naydanov13-15/+15
The function in question does not need to change target state. It is a target-type-dependant function, however, IMHO, it is safe to assume that any target type would not need to change type-independant state of a target to figure out the arch. Change-Id: I607cb3aee6529cd5a97bc1200a0226cf6ef43caf Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8093 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-28target: pass target to observers via const pointerEvgeniy Naydanov2-13/+13
There are quite a lot of "getters" in target interface. They do not change target structure, nevertheless the structure is passed to these functions via a plain pointer. The intention is to clarify the purpouse of these functions by passing the `target` structure as a pointer to constant data. Change-Id: Ida4a798da94938753b86a293a308d93b091d1bf3 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8092 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-26Revert "break from long loops on shutdown request"Evgeniy Naydanov6-40/+1
This reverts commits 2e920a212fbe2de705811d547c169c1ae1611a02 and 8dbb1250f587484774752e8610f04a98157ca10a. The reason is, after `openocd_is_shutdown_pending()` becomes true, arbitrary command may be executed: * In `target_destroy()` and the corresponding `target->type->deinit_target()`. * In user-specifyed `pre_shutdown_commands` list. Change-Id: Icd00d1d954cd45e255880a6f76c3a74c098d6a17 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-01-25Merge pull request #997 from en-sc/en-sc/priv-accessJan Matyas2-9/+14
target/riscv: move read redirection for `priv` to `riscv-013.c`
2024-01-25Merge pull request #1002 from en-sc/en-sc/arch-stateJan Matyas1-0/+8
target/riscv: report info about target during `poll`
2024-01-25Merge pull request #995 from en-sc/en-sc/ctx-fixJan Matyas2-5/+9
target/riscv: cleanup `get_riscv_debug_reg_ctx()`
2024-01-24target/riscv: report info about target during `poll`Evgeniy Naydanov1-0/+8
Addresses issue #196. Change-Id: I71146c7bc769cb9727e57da33e9f514eedef9ce4 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
generated by cgit v1.1 at 2024-08-16 13:54:31 +0000