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author | Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com> | 2024-02-09 07:02:29 +0100 |
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committer | GitHub <noreply@github.com> | 2024-02-09 07:02:29 +0100 |
commit | 4f17df0d1d8332d323a1b853f3ce701dece9fdd7 (patch) | |
tree | 2f9006ffa1c1a42da76e083d429ea7292d525461 /src/target | |
parent | 2fc7360190602c626a72634e9e06924684eaf3e4 (diff) | |
parent | 16e7adbd9cc7374a5abb86037e0a2a939ba67405 (diff) | |
download | riscv-openocd-4f17df0d1d8332d323a1b853f3ce701dece9fdd7.zip riscv-openocd-4f17df0d1d8332d323a1b853f3ce701dece9fdd7.tar.gz riscv-openocd-4f17df0d1d8332d323a1b853f3ce701dece9fdd7.tar.bz2 |
Merge pull request #1008 from en-sc/en-sc/from_upstream
Merge up to 9659a9b5e28dc615dfb508d301fdd8fa426c191b from upstream
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/adi_v5_dapdirect.c | 3 | ||||
-rw-r--r-- | src/target/arm.h | 6 | ||||
-rw-r--r-- | src/target/armv4_5.c | 2 | ||||
-rw-r--r-- | src/target/armv8.c | 2 | ||||
-rw-r--r-- | src/target/esirisc.c | 42 | ||||
-rw-r--r-- | src/target/esirisc.h | 2 | ||||
-rw-r--r-- | src/target/mem_ap.c | 2 | ||||
-rw-r--r-- | src/target/riscv/riscv.c | 2 | ||||
-rw-r--r-- | src/target/stm8.c | 2 | ||||
-rw-r--r-- | src/target/target.c | 12 | ||||
-rw-r--r-- | src/target/target.h | 16 | ||||
-rw-r--r-- | src/target/target_type.h | 2 | ||||
-rw-r--r-- | src/target/xtensa/xtensa.c | 88 | ||||
-rw-r--r-- | src/target/xtensa/xtensa.h | 2 |
14 files changed, 107 insertions, 76 deletions
diff --git a/src/target/adi_v5_dapdirect.c b/src/target/adi_v5_dapdirect.c index f3a90c0..d198dac 100644 --- a/src/target/adi_v5_dapdirect.c +++ b/src/target/adi_v5_dapdirect.c @@ -118,7 +118,8 @@ static const struct command_registration dapdirect_jtag_subcommand_handlers[] = { .name = "cget", .mode = COMMAND_EXEC, - .jim_handler = jim_jtag_configure, + .handler = handle_jtag_configure, + .usage = "", }, { .name = "names", diff --git a/src/target/arm.h b/src/target/arm.h index d5053af..486666b 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -257,7 +257,7 @@ struct arm { }; /** Convert target handle to generic ARM target state handle. */ -static inline struct arm *target_to_arm(struct target *target) +static inline struct arm *target_to_arm(const struct target *target) { assert(target); return target->arch_info; @@ -293,11 +293,11 @@ extern const struct command_registration arm_command_handlers[]; extern const struct command_registration arm_all_profiles_command_handlers[]; int arm_arch_state(struct target *target); -const char *arm_get_gdb_arch(struct target *target); +const char *arm_get_gdb_arch(const struct target *target); int arm_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class); -const char *armv8_get_gdb_arch(struct target *target); +const char *armv8_get_gdb_arch(const struct target *target); int armv8_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class); diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 7debb94..1886d5e 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -1264,7 +1264,7 @@ const struct command_registration arm_command_handlers[] = { * same way as a gdb for arm. This can be changed later on. User can still * set the specific architecture variant with the gdb command. */ -const char *arm_get_gdb_arch(struct target *target) +const char *arm_get_gdb_arch(const struct target *target) { return "arm"; } diff --git a/src/target/armv8.c b/src/target/armv8.c index daf1ffc..bf582ff 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -1865,7 +1865,7 @@ const struct command_registration armv8_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -const char *armv8_get_gdb_arch(struct target *target) +const char *armv8_get_gdb_arch(const struct target *target) { struct arm *arm = target_to_arm(target); return arm->core_state == ARM_STATE_AARCH64 ? "aarch64" : "arm"; diff --git a/src/target/esirisc.c b/src/target/esirisc.c index 561edb2..0f76b59 100644 --- a/src/target/esirisc.c +++ b/src/target/esirisc.c @@ -1248,7 +1248,7 @@ static int esirisc_arch_state(struct target *target) return ERROR_OK; } -static const char *esirisc_get_gdb_arch(struct target *target) +static const char *esirisc_get_gdb_arch(const struct target *target) { struct esirisc_common *esirisc = target_to_esirisc(target); @@ -1486,6 +1486,32 @@ static struct reg_cache *esirisc_build_reg_cache(struct target *target) return cache; } +static void esirisc_free_reg_cache(struct target *target) +{ + struct esirisc_common *esirisc = target_to_esirisc(target); + struct reg_cache *cache = esirisc->reg_cache; + struct reg *reg_list = cache->reg_list; + + for (int i = 0; i < esirisc->num_regs; ++i) { + struct reg *reg = reg_list + esirisc_regs[i].number; + + free(reg->arch_info); + free(reg->value); + free(reg->reg_data_type); + } + + for (size_t i = 0; i < ARRAY_SIZE(esirisc_csrs); ++i) { + struct reg *reg = reg_list + esirisc_csrs[i].number; + + free(reg->arch_info); + free(reg->value); + free(reg->reg_data_type); + } + + free(reg_list); + free(cache); +} + static int esirisc_identify(struct target *target) { struct esirisc_common *esirisc = target_to_esirisc(target); @@ -1584,6 +1610,19 @@ static int esirisc_init_target(struct command_context *cmd_ctx, struct target *t return ERROR_OK; } +static void esirisc_deinit_target(struct target *target) +{ + struct esirisc_common *esirisc = target_to_esirisc(target); + + if (!target_was_examined(target)) + return; + + esirisc_free_reg_cache(target); + + free(esirisc->gdb_arch); + free(esirisc); +} + static int esirisc_examine(struct target *target) { struct esirisc_common *esirisc = target_to_esirisc(target); @@ -1822,5 +1861,6 @@ struct target_type esirisc_target = { .target_create = esirisc_target_create, .init_target = esirisc_init_target, + .deinit_target = esirisc_deinit_target, .examine = esirisc_examine, }; diff --git a/src/target/esirisc.h b/src/target/esirisc.h index 7496b1e..6f8cd14 100644 --- a/src/target/esirisc.h +++ b/src/target/esirisc.h @@ -106,7 +106,7 @@ struct esirisc_reg { int (*write)(struct reg *reg); }; -static inline struct esirisc_common *target_to_esirisc(struct target *target) +static inline struct esirisc_common *target_to_esirisc(const struct target *target) { return (struct esirisc_common *)target->arch_info; } diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c index 50dc91c..5c81e3a 100644 --- a/src/target/mem_ap.c +++ b/src/target/mem_ap.c @@ -182,7 +182,7 @@ static struct reg_arch_type mem_ap_reg_arch_type = { .set = mem_ap_reg_set, }; -static const char *mem_ap_get_gdb_arch(struct target *target) +static const char *mem_ap_get_gdb_arch(const struct target *target) { return "arm"; } diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 97de017..c65f995 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -2639,7 +2639,7 @@ static int riscv_write_memory(struct target *target, target_addr_t address, return tt->write_memory(target, physical_addr, size, count, buffer); } -static const char *riscv_get_gdb_arch(struct target *target) +static const char *riscv_get_gdb_arch(const struct target *target) { switch (riscv_xlen(target)) { case 32: diff --git a/src/target/stm8.c b/src/target/stm8.c index ad4a452..227101b 100644 --- a/src/target/stm8.c +++ b/src/target/stm8.c @@ -1158,7 +1158,7 @@ static int stm8_write_core_reg(struct target *target, unsigned int num) return ERROR_OK; } -static const char *stm8_get_gdb_arch(struct target *target) +static const char *stm8_get_gdb_arch(const struct target *target) { return "stm8"; } diff --git a/src/target/target.c b/src/target/target.c index 630e47e..0c57292 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -245,7 +245,7 @@ static const struct nvp nvp_reset_modes[] = { { .name = NULL, .value = -1 }, }; -const char *debug_reason_name(struct target *t) +const char *debug_reason_name(const struct target *t) { const char *cp; @@ -258,7 +258,7 @@ const char *debug_reason_name(struct target *t) return cp; } -const char *target_state_name(struct target *t) +const char *target_state_name(const struct target *t) { const char *cp; cp = nvp_value2name(nvp_target_state, t->state)->name; @@ -743,7 +743,7 @@ int target_examine(void) return retval; } -const char *target_type_name(struct target *target) +const char *target_type_name(const struct target *target) { return target->type->name; } @@ -1364,7 +1364,7 @@ int target_hit_watchpoint(struct target *target, return target->type->hit_watchpoint(target, hit_watchpoint); } -const char *target_get_gdb_arch(struct target *target) +const char *target_get_gdb_arch(const struct target *target) { if (!target->type->get_gdb_arch) return NULL; @@ -1404,7 +1404,7 @@ int target_get_gdb_reg_list_noread(struct target *target, return target_get_gdb_reg_list(target, reg_list, reg_list_size, reg_class); } -bool target_supports_gdb_connection(struct target *target) +bool target_supports_gdb_connection(const struct target *target) { /* * exclude all the targets that don't provide get_gdb_reg_list @@ -4835,7 +4835,7 @@ static int target_jim_set_reg(Jim_Interp *interp, int argc, /** * Returns true only if the target has a handler for the specified event. */ -bool target_has_event_action(struct target *target, enum target_event event) +bool target_has_event_action(const struct target *target, enum target_event event) { struct target_event_action *teap; diff --git a/src/target/target.h b/src/target/target.h index 8b50dcc..303d5e6 100644 --- a/src/target/target.h +++ b/src/target/target.h @@ -228,19 +228,19 @@ struct gdb_fileio_info { }; /** Returns a description of the endianness for the specified target. */ -static inline const char *target_endianness(struct target *target) +static inline const char *target_endianness(const struct target *target) { return (target->endianness == TARGET_ENDIAN_UNKNOWN) ? "unknown" : (target->endianness == TARGET_BIG_ENDIAN) ? "big endian" : "little endian"; } /** Returns the instance-specific name of the specified target. */ -static inline const char *target_name(struct target *target) +static inline const char *target_name(const struct target *target) { return target->cmd_name; } -const char *debug_reason_name(struct target *t); +const char *debug_reason_name(const struct target *t); enum target_event { @@ -307,7 +307,7 @@ struct target_event_action { struct target_event_action *next; }; -bool target_has_event_action(struct target *target, enum target_event event); +bool target_has_event_action(const struct target *target, enum target_event event); struct target_event_callback { int (*callback)(struct target *target, enum target_event event, void *priv); @@ -427,7 +427,7 @@ struct target *get_target(const char *id); * This routine is a wrapper for the target->type->name field. * Note that this is not an instance-specific name for his target. */ -const char *target_type_name(struct target *target); +const char *target_type_name(const struct target *target); /** * Examine the specified @a target, letting it perform any @@ -507,7 +507,7 @@ int target_hit_watchpoint(struct target *target, * * This routine is a wrapper for target->type->get_gdb_arch. */ -const char *target_get_gdb_arch(struct target *target); +const char *target_get_gdb_arch(const struct target *target); /** * Obtain the registers for GDB. @@ -533,7 +533,7 @@ int target_get_gdb_reg_list_noread(struct target *target, * * Some target do not implement the necessary code required by GDB. */ -bool target_supports_gdb_connection(struct target *target); +bool target_supports_gdb_connection(const struct target *target); /** * Step the target. @@ -700,7 +700,7 @@ unsigned target_address_bits(struct target *target); unsigned int target_data_bits(struct target *target); /** Return the *name* of this targets current state */ -const char *target_state_name(struct target *target); +const char *target_state_name(const struct target *target); /** Return the *name* of a target event enumeration value */ const char *target_event_name(enum target_event event); diff --git a/src/target/target_type.h b/src/target/target_type.h index 678ce0f..bc42c2d 100644 --- a/src/target/target_type.h +++ b/src/target/target_type.h @@ -83,7 +83,7 @@ struct target_type { * if dynamic allocation is used for this value, it must be managed by * the target, ideally by caching the result for subsequent calls. */ - const char *(*get_gdb_arch)(struct target *target); + const char *(*get_gdb_arch)(const struct target *target); /** * Target register access for GDB. Do @b not call this function diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c index 1ec091c..fb7748a 100644 --- a/src/target/xtensa/xtensa.c +++ b/src/target/xtensa/xtensa.c @@ -3442,7 +3442,7 @@ void xtensa_target_deinit(struct target *target) free(xtensa->core_config); } -const char *xtensa_get_gdb_arch(struct target *target) +const char *xtensa_get_gdb_arch(const struct target *target) { return "xtensa"; } @@ -3459,8 +3459,8 @@ static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target) const char *parm = CMD_ARGV[0]; unsigned int parm_len = strlen(parm); if ((parm_len >= 64) || (parm_len & 1)) { - LOG_ERROR("Invalid parameter length (%d): must be even, < 64 characters", parm_len); - return ERROR_FAIL; + command_print(CMD, "Invalid parameter length (%d): must be even, < 64 characters", parm_len); + return ERROR_COMMAND_ARGUMENT_INVALID; } uint8_t ops[32]; @@ -3480,7 +3480,7 @@ static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target) */ int status = xtensa_write_dirty_registers(target); if (status != ERROR_OK) { - LOG_ERROR("%s: Failed to write back register cache.", target_name(target)); + command_print(CMD, "%s: Failed to write back register cache.", target_name(target)); return ERROR_FAIL; } xtensa_reg_val_t exccause = xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE); @@ -3498,18 +3498,18 @@ static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target) xtensa_queue_exec_ins_wide(xtensa, ops, oplen); /* Handles endian-swap */ status = xtensa_dm_queue_execute(&xtensa->dbg_mod); if (status != ERROR_OK) { - LOG_TARGET_ERROR(target, "exec: queue error %d", status); + command_print(CMD, "exec: queue error %d", status); } else { status = xtensa_core_status_check(target); if (status != ERROR_OK) - LOG_TARGET_ERROR(target, "exec: status error %d", status); + command_print(CMD, "exec: status error %d", status); } /* Reread register cache and restore saved regs after instruction execution */ if (xtensa_fetch_all_regs(target) != ERROR_OK) - LOG_TARGET_ERROR(target, "post-exec: register fetch error"); + command_print(CMD, "post-exec: register fetch error"); if (status != ERROR_OK) { - LOG_TARGET_ERROR(target, "post-exec: EXCCAUSE 0x%02" PRIx32, + command_print(CMD, "post-exec: EXCCAUSE 0x%02" PRIx32, xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE)); } xtensa_reg_set(target, XT_REG_IDX_EXCCAUSE, exccause); @@ -3534,8 +3534,8 @@ COMMAND_HELPER(xtensa_cmd_xtdef_do, struct xtensa *xtensa) } else if (strcasecmp(core_name, "NX") == 0) { xtensa->core_config->core_type = XT_NX; } else { - LOG_ERROR("xtdef [LX|NX]\n"); - return ERROR_COMMAND_SYNTAX_ERROR; + command_print(CMD, "xtdef [LX|NX]\n"); + return ERROR_COMMAND_ARGUMENT_INVALID; } return ERROR_OK; } @@ -3592,7 +3592,7 @@ COMMAND_HELPER(xtensa_cmd_xtopt_do, struct xtensa *xtensa) if (!xtensa_cmd_xtopt_legal_val("excmlevel", opt_val, 1, 6)) return ERROR_COMMAND_ARGUMENT_INVALID; if (!xtensa->core_config->high_irq.enabled) { - LOG_ERROR("xtopt excmlevel requires hipriints\n"); + command_print(CMD, "xtopt excmlevel requires hipriints\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } xtensa->core_config->high_irq.excm_level = opt_val; @@ -3605,7 +3605,7 @@ COMMAND_HELPER(xtensa_cmd_xtopt_do, struct xtensa *xtensa) return ERROR_COMMAND_ARGUMENT_INVALID; } if (!xtensa->core_config->high_irq.enabled) { - LOG_ERROR("xtopt intlevels requires hipriints\n"); + command_print(CMD, "xtopt intlevels requires hipriints\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } xtensa->core_config->high_irq.level_num = opt_val; @@ -3662,10 +3662,8 @@ COMMAND_HELPER(xtensa_cmd_xtmem_do, struct xtensa *xtensa) int mem_access = 0; bool is_dcache = false; - if (CMD_ARGC == 0) { - LOG_ERROR("xtmem <type> [parameters]\n"); + if (CMD_ARGC == 0) return ERROR_COMMAND_SYNTAX_ERROR; - } const char *mem_name = CMD_ARGV[0]; if (strcasecmp(mem_name, "icache") == 0) { @@ -3696,25 +3694,21 @@ COMMAND_HELPER(xtensa_cmd_xtmem_do, struct xtensa *xtensa) memp = &xtensa->core_config->srom; mem_access = XT_MEM_ACCESS_READ; } else { - LOG_ERROR("xtmem types: <icache|dcache|l2cache|l2addr|iram|irom|dram|drom|sram|srom>\n"); + command_print(CMD, "xtmem types: <icache|dcache|l2cache|l2addr|iram|irom|dram|drom|sram|srom>\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } if (cachep) { - if ((CMD_ARGC != 4) && (CMD_ARGC != 5)) { - LOG_ERROR("xtmem <cachetype> <linebytes> <cachebytes> <ways> [writeback]\n"); + if (CMD_ARGC != 4 && CMD_ARGC != 5) return ERROR_COMMAND_SYNTAX_ERROR; - } cachep->line_size = strtoul(CMD_ARGV[1], NULL, 0); cachep->size = strtoul(CMD_ARGV[2], NULL, 0); cachep->way_count = strtoul(CMD_ARGV[3], NULL, 0); cachep->writeback = ((CMD_ARGC == 5) && is_dcache) ? strtoul(CMD_ARGV[4], NULL, 0) : 0; } else if (memp) { - if (CMD_ARGC != 3) { - LOG_ERROR("xtmem <memtype> <baseaddr> <bytes>\n"); + if (CMD_ARGC != 3) return ERROR_COMMAND_SYNTAX_ERROR; - } struct xtensa_local_mem_region_config *memcfgp = &memp->regions[memp->count]; memcfgp->base = strtoul(CMD_ARGV[1], NULL, 0); memcfgp->size = strtoul(CMD_ARGV[2], NULL, 0); @@ -3734,10 +3728,8 @@ COMMAND_HANDLER(xtensa_cmd_xtmem) /* xtmpu <num FG seg> <min seg size> <lockable> <executeonly> */ COMMAND_HELPER(xtensa_cmd_xtmpu_do, struct xtensa *xtensa) { - if (CMD_ARGC != 4) { - LOG_ERROR("xtmpu <num FG seg> <min seg size> <lockable> <executeonly>\n"); + if (CMD_ARGC != 4) return ERROR_COMMAND_SYNTAX_ERROR; - } unsigned int nfgseg = strtoul(CMD_ARGV[0], NULL, 0); unsigned int minsegsize = strtoul(CMD_ARGV[1], NULL, 0); @@ -3745,16 +3737,16 @@ COMMAND_HELPER(xtensa_cmd_xtmpu_do, struct xtensa *xtensa) unsigned int execonly = strtoul(CMD_ARGV[3], NULL, 0); if ((nfgseg > 32)) { - LOG_ERROR("<nfgseg> must be within [0..32]\n"); + command_print(CMD, "<nfgseg> must be within [0..32]\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } else if (minsegsize & (minsegsize - 1)) { - LOG_ERROR("<minsegsize> must be a power of 2 >= 32\n"); + command_print(CMD, "<minsegsize> must be a power of 2 >= 32\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } else if (lockable > 1) { - LOG_ERROR("<lockable> must be 0 or 1\n"); + command_print(CMD, "<lockable> must be 0 or 1\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } else if (execonly > 1) { - LOG_ERROR("<execonly> must be 0 or 1\n"); + command_print(CMD, "<execonly> must be 0 or 1\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } @@ -3775,18 +3767,16 @@ COMMAND_HANDLER(xtensa_cmd_xtmpu) /* xtmmu <NIREFILLENTRIES> <NDREFILLENTRIES> <IVARWAY56> <DVARWAY56> */ COMMAND_HELPER(xtensa_cmd_xtmmu_do, struct xtensa *xtensa) { - if (CMD_ARGC != 2) { - LOG_ERROR("xtmmu <NIREFILLENTRIES> <NDREFILLENTRIES>\n"); + if (CMD_ARGC != 2) return ERROR_COMMAND_SYNTAX_ERROR; - } unsigned int nirefillentries = strtoul(CMD_ARGV[0], NULL, 0); unsigned int ndrefillentries = strtoul(CMD_ARGV[1], NULL, 0); if ((nirefillentries != 16) && (nirefillentries != 32)) { - LOG_ERROR("<nirefillentries> must be 16 or 32\n"); + command_print(CMD, "<nirefillentries> must be 16 or 32\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } else if ((ndrefillentries != 16) && (ndrefillentries != 32)) { - LOG_ERROR("<ndrefillentries> must be 16 or 32\n"); + command_print(CMD, "<ndrefillentries> must be 16 or 32\n"); return ERROR_COMMAND_ARGUMENT_INVALID; } @@ -3809,13 +3799,13 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa) if (CMD_ARGC == 1) { int32_t numregs = strtoul(CMD_ARGV[0], NULL, 0); if ((numregs <= 0) || (numregs > UINT16_MAX)) { - LOG_ERROR("xtreg <numregs>: Invalid 'numregs' (%d)", numregs); - return ERROR_COMMAND_SYNTAX_ERROR; + command_print(CMD, "xtreg <numregs>: Invalid 'numregs' (%d)", numregs); + return ERROR_COMMAND_ARGUMENT_INVALID; } if ((xtensa->genpkt_regs_num > 0) && (numregs < (int32_t)xtensa->genpkt_regs_num)) { - LOG_ERROR("xtregs (%d) must be larger than numgenregs (%d) (if xtregfmt specified)", + command_print(CMD, "xtregs (%d) must be larger than numgenregs (%d) (if xtregfmt specified)", numregs, xtensa->genpkt_regs_num); - return ERROR_COMMAND_SYNTAX_ERROR; + return ERROR_COMMAND_ARGUMENT_INVALID; } xtensa->total_regs_num = numregs; xtensa->core_regs_num = 0; @@ -3844,17 +3834,17 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa) const char *regname = CMD_ARGV[0]; unsigned int regnum = strtoul(CMD_ARGV[1], NULL, 0); if (regnum > UINT16_MAX) { - LOG_ERROR("<regnum> must be a 16-bit number"); + command_print(CMD, "<regnum> must be a 16-bit number"); return ERROR_COMMAND_ARGUMENT_INVALID; } if ((xtensa->num_optregs + xtensa->core_regs_num) >= xtensa->total_regs_num) { if (xtensa->total_regs_num) - LOG_ERROR("'xtreg %s 0x%04x': Too many registers (%d expected, %d core %d extended)", + command_print(CMD, "'xtreg %s 0x%04x': Too many registers (%d expected, %d core %d extended)", regname, regnum, xtensa->total_regs_num, xtensa->core_regs_num, xtensa->num_optregs); else - LOG_ERROR("'xtreg %s 0x%04x': Number of registers unspecified", + command_print(CMD, "'xtreg %s 0x%04x': Number of registers unspecified", regname, regnum); return ERROR_FAIL; } @@ -3934,7 +3924,7 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa) idx = XT_NX_REG_IDX_MESRCLR; if (idx < XT_NX_REG_IDX_NUM) { if (xtensa->nx_reg_idx[idx] != 0) { - LOG_ERROR("nx_reg_idx[%d] previously set to %d", + command_print(CMD, "nx_reg_idx[%d] previously set to %d", idx, xtensa->nx_reg_idx[idx]); return ERROR_FAIL; } @@ -3981,9 +3971,9 @@ COMMAND_HELPER(xtensa_cmd_xtregfmt_do, struct xtensa *xtensa) if ((numgregs <= 0) || ((numgregs > xtensa->total_regs_num) && (xtensa->total_regs_num > 0))) { - LOG_ERROR("xtregfmt: if specified, numgregs (%d) must be <= numregs (%d)", + command_print(CMD, "xtregfmt: if specified, numgregs (%d) must be <= numregs (%d)", numgregs, xtensa->total_regs_num); - return ERROR_COMMAND_SYNTAX_ERROR; + return ERROR_COMMAND_ARGUMENT_INVALID; } xtensa->genpkt_regs_num = numgregs; } @@ -4099,7 +4089,7 @@ COMMAND_HELPER(xtensa_cmd_perfmon_dump_do, struct xtensa *xtensa) "%-12" PRIu64 "%s", result.value, result.overflow ? " (overflow)" : ""); - LOG_INFO("%s", result_buf); + command_print(CMD, "%s", result_buf); } return ERROR_OK; @@ -4349,21 +4339,21 @@ COMMAND_HELPER(xtensa_cmd_tracedump_do, struct xtensa *xtensa, const char *fname } memsz = trace_config.memaddr_end - trace_config.memaddr_start + 1; - LOG_INFO("Total trace memory: %d words", memsz); + command_print(CMD, "Total trace memory: %d words", memsz); if ((trace_config.addr & ((TRAXADDR_TWRAP_MASK << TRAXADDR_TWRAP_SHIFT) | TRAXADDR_TWSAT)) == 0) { /*Memory hasn't overwritten itself yet. */ wmem = trace_config.addr & TRAXADDR_TADDR_MASK; - LOG_INFO("...but trace is only %d words", wmem); + command_print(CMD, "...but trace is only %d words", wmem); if (wmem < memsz) memsz = wmem; } else { if (trace_config.addr & TRAXADDR_TWSAT) { - LOG_INFO("Real trace is many times longer than that (overflow)"); + command_print(CMD, "Real trace is many times longer than that (overflow)"); } else { uint32_t trc_sz = (trace_config.addr >> TRAXADDR_TWRAP_SHIFT) & TRAXADDR_TWRAP_MASK; trc_sz = (trc_sz * memsz) + (trace_config.addr & TRAXADDR_TADDR_MASK); - LOG_INFO("Real trace is %d words, but the start has been truncated.", trc_sz); + command_print(CMD, "Real trace is %d words, but the start has been truncated.", trc_sz); } } diff --git a/src/target/xtensa/xtensa.h b/src/target/xtensa/xtensa.h index f799208..a220021 100644 --- a/src/target/xtensa/xtensa.h +++ b/src/target/xtensa/xtensa.h @@ -422,7 +422,7 @@ int xtensa_run_algorithm(struct target *target, target_addr_t entry_point, target_addr_t exit_point, unsigned int timeout_ms, void *arch_info); void xtensa_set_permissive_mode(struct target *target, bool state); -const char *xtensa_get_gdb_arch(struct target *target); +const char *xtensa_get_gdb_arch(const struct target *target); int xtensa_gdb_query_custom(struct target *target, const char *packet, char **response_p); COMMAND_HELPER(xtensa_cmd_xtdef_do, struct xtensa *xtensa); |