aboutsummaryrefslogtreecommitdiff
path: root/src/target
AgeCommit message (Expand)AuthorFilesLines
2017-02-10aarch64: correct breakpoint register offsetMatthias Welwarsky1-7/+4
2017-02-10aarch64: fix cache identificationMatthias Welwarsky2-28/+18
2017-02-10aarch64: fix reading of translation table registersMatthias Welwarsky2-11/+100
2017-02-10aarch64: fix entry into debug stateMatthias Welwarsky2-20/+16
2017-02-10aarch64: use symbolic opcodes instead of hex valuesMatthias Welwarsky1-7/+6
2017-02-10aarch64: fix accesses to SCTLR_ELn registerMatthias Welwarsky1-27/+142
2017-02-10aarch64: fix error recovery in aarch64_dpm_prepareMatthias Welwarsky1-4/+8
2017-02-10aarch64: formalize use of CTI in halt and resumeMatthias Welwarsky2-57/+68
2017-02-10aarch64: fix context and hybrid hardware breakpointsMatthias Welwarsky1-10/+17
2017-02-10aarch64: deconflict debug register namesMatthias Welwarsky2-127/+131
2017-02-10aarch64: Implement MA mode for bulk memory reads and writesMatthias Welwarsky1-84/+165
2017-02-10aarch64: make DCC read/write functions operate on struct armv8_commonMatthias Welwarsky1-30/+31
2017-02-10aarch64: introduce dpm extension for ARMv8Matthias Welwarsky9-260/+1400
2017-02-10target: add -ctibase config option in addition to -dbgbaseMatthias Welwarsky2-1/+21
2017-02-10aarch64: fix reading of MPIDRMatthias Welwarsky1-1/+2
2017-02-10aarch64: add symbolic definitions for armv8 opcodesMatthias Welwarsky2-0/+127
2017-02-10aarch64: Correct target state for hardware stepDavid Ung2-2/+12
2017-02-10aarch64: Enable resuming with addressDavid Ung1-9/+5
2017-02-10aarch64: Add instruction stepping support using hardware steppierre Kuo2-36/+14
2017-02-10aarch64: Enable halting debug mode on breakpoint setDavid Ung1-0/+12
2017-02-10aarch64: Add hardware breakpoint supportpierre Kuo1-20/+19
2017-02-10aarch64: Add ARMv8 AARCH64 support filesDavid Ung9-9/+3701
2017-02-10arm_dpm: Add 64bit register handling.David Ung2-86/+257
2017-02-10arm_dpm: Add new state ARM_STATE_AARCH64David Ung3-0/+8
2017-02-10target: Add 64-bit target address supportDongxue Zhang54-527/+663
2017-01-20arm_dpm: avoid duplicating the register cacheMatthias Welwarsky1-4/+7
2017-01-15adi_v5_jtag: make sure SSTICKYERR is cleared after a PORMatthias Welwarsky1-6/+1
2016-12-25target: armv7a: remove unused level_num field from armv7a_cachesizePaul Fertser1-1/+0
2016-12-25target: cortex_a: fix segfault when SPSR is not properly handledPaul Fertser1-9/+11
2016-12-08Convert to non-recursive makeAndreas Fritiofson3-177/+167
2016-12-08target: LS1_SAP: fix "declaration of 'read' shadows a global" warningPaul Fertser1-4/+4
2016-12-08target: Replace malloc+manual zeroing with callocAndreas Fritiofson1-8/+1
2016-12-08xscale: Move debug handler to contrib/loadersAndreas Fritiofson7-854/+1
2016-12-08cortex_a: fix reset for SWD transportMatthias Welwarsky1-3/+10
2016-12-08cortex_m: allow setting debug ap during createMatthias Welwarsky5-5/+62
2016-12-08helper: Code cleanup for hexify()Marc Schink1-1/+2
2016-12-08semihosting: support fileio operationSteven Stallion11-158/+437
2016-12-08Cortex-R: Force usage of physical memory read/write since there is no MMUEvan Hunter1-2/+2
2016-12-08target: Add verify_image_checksum commandMatthias Welwarsky1-5/+27
2016-12-08dap_dp_init: remove loopJiri Kastner1-44/+42
2016-12-08cortex_a: remove partnum magic from arp_examine and dbginitMatthias Welwarsky3-121/+68
2016-12-08Add -defer-examine option to target create commandMatthias Welwarsky3-8/+93
2016-11-05Replace "daemon" with "server" in user-visible stringsPaul Fertser1-2/+2
2016-11-04cortex_a/r/m: fix handling of un-examined coresMatthias Welwarsky2-10/+31
2016-11-04semihosting armv7a: Add support for ARMv7-AAndrey Smirnov4-4/+89
2016-11-04Tcl commands: Fix improper return status in flash commands and load_image.HarishKumar1-1/+2
2016-11-04Make OpenOCD build using -Og.Tim Newsome1-1/+1
2016-10-30flash/nor: Add erased_value to drivers and pass it to targetsAndreas Färber9-18/+47
2016-10-17target: Clean up format stringsAndreas Färber1-23/+23
2016-10-17target: Add missing spaces in error messagesAndreas Färber1-6/+6