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riscv-openocd.git
FE_402_fix
__archive__
add_macos_build
autoconf
bscan_optimization
bscan_tunnel
buf_sget
build32
busy
compliance_dev
debug-log-reg-failure
deinit
dmi_read
dmstatus_version
dsp5680_build
eclipse_memory_read
eclipse_multicore_fix
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examine_unavailable_harts
examine_unavailable_harts_backup
examine_unavailable_harts_rebase
examine_unavailable_harts_squash
fence_i_fix_for_release
fix-halt-reason-after-singlestep
fix_macbuild
gd32vf103
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gitignore-build
global
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old_triggers
print_port
race
rbb_cleanup
regcache
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release
remove-slot_t-from-riscv-013
reset_test
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riscv
riscv-batch-cleanup
riscv-compliance
riscv-compliance-dev
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hla_target.c
Age
Commit message (
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Author
Files
Lines
2013-06-05
update files to correct FSF address
Spencer Oliver
1
-1
/
+1
2013-05-29
cortex_m, hla_target: do not try asserting SRST if it's not present
Paul Fertser
1
-1
/
+2
2013-03-15
target: Add default implementation of bulk_write_memory
Andreas Fritiofson
1
-8
/
+0
2013-02-25
target: hla correctly use target events
Spencer Oliver
1
-5
/
+16
2013-02-02
armv7m: use generic arm read/write_core_reg
Spencer Oliver
1
-2
/
+4
2013-02-02
armv7m: use generic register core_cache
Spencer Oliver
1
-7
/
+7
2013-02-02
armv7m: remove unused armv7m_regtype
Spencer Oliver
1
-2
/
+0
2013-02-02
armv7m: use generic arm::core_mode
Spencer Oliver
1
-5
/
+3
2013-01-27
hla: enable DWT component and fix watchpoints
Spencer Oliver
1
-4
/
+4
2013-01-02
hla: support setting DCB_DEMCR on resume
Spencer Oliver
1
-0
/
+5
2012-12-23
hla: add ability to configure read/write buffer size
Spencer Oliver
1
-6
/
+6
2012-12-23
hla: fix watchpoints not being set
Spencer Oliver
1
-0
/
+6
2012-12-23
stlink: rename stlink cmd names
Spencer Oliver
1
-2
/
+3
2012-12-23
target: add deprecated target name support
Spencer Oliver
1
-0
/
+809