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2015-03-09target/cortex_a: remove dead assignmentPaul Fertser1-1/+0
Found by clang static checker. Change-Id: I77b0dc18188328fdb28d07b9e5c52e06182d9e2b Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2561 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-22Cortex A: fix extra memory read and non-word sizesChristopher Head1-238/+658
Without this patch, to perform a memory read, OpenOCD first issues an LDC instruction into DBGITR in Stall mode (thus executing the instruction), then switches to Fast mode and reads from DBGDTRTX once for each word to transfer. At the very end of the transfer, the final Fast mode read of DBGDTRTX has, as always, the side effect of re-issuing the LDC instruction. This causes two problems: (1) If the word immediately beyond the end of the requested region is inaccessible, this spurious LDC will cause a fault. On a fast CPU, the LDC will finish executing by the time the poll of DSCR takes place, failing the entire memory read. On a slow CPU, the LDC might finish executing later, leaving an unexpected and confusing sticky fault lying around for the next operation to see. (2) If the LDC succeeds, it will leave the loaded word in DBGDTRTX, thus setting DBGDSCR.TXFULL=1. The cortex_a_read_apb_ab_memory routine completes without consuming that last word, thus confusing the next routine that tries to use DBGDTRTX (this may not have any visible effect on some implementations, because writing to DBGDTRTXint when TXFULL=1 is defined as Unpredictable, but I believe it caused a visible problem for me). With this patch, the bulk mem_ap_sel_read_buf_noincr is modified to omit the last word of the block. The second-to-last read of DBGDTRTX by that function will cause the issue of the LDC for the last word. After switching back to Normal mode and waiting for that instruction to finish, do a final read of DBGDTRTX to extract the last word into the buffer, leaving TXFULL=0. Without this patch, memory accesses are always expanded such that they are aligned to the access size. With this patch, accesses are issued exactly as ordered by the caller. The caller is expected to handle fragments at the beginning and end of the transfer if the address is unaligned and an unaligned access is not desired. Without this patch, the DFAR and DFSR registers, which report the location and status of data faults, are ignored while performing memory accesses, which could cause problems debugging an OS page fault handler. With this patch, DFAR and DFSR are preserved across memory accesses, and DFSR is decoded in the event of a synchronous fault to provide the caller with more information about the reason for failure. Thanks to Boris Brezillon for the original patch whose ideas led to the non-word access mechanism implemented here and to various code reviewers for their comments. Change-Id: I11ae7104fbe69a522efadefc705c9a217a7eef41 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/2381 Tested-by: jenkins Reviewed-by: Olivier Schonken <olivier.schonken@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11cortex_a: Add Cortex-A5 identificationOlivier Schonken1-0/+1
Add Cortex-A5 identification to ROM-table display, and also to cortex_a_init_debug_access. This change is mostly cosmetic. Change-Id: I7b1dd8755d70d45eb5f315aa1918d44a813b3cdf Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com> Reviewed-on: http://openocd.zylin.com/2483 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-01-10cortex_a: Add support for A7 MPCoreAlexander Stein1-0/+13
A7 MPCore needs unlocking the debug registers same as with A15 MPCore. Found out by hacking on the code. Change-Id: I613cb4fb35007b85b4a9a401577b47768bc1a08b Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Reviewed-on: http://openocd.zylin.com/2344 Tested-by: jenkins Reviewed-by: Kamal Dasu <kamal.dasu@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-01-10cortex_a: Add support for A15 MPCoreKamal Dasu1-6/+79
Added Cortex-A15 support for DAP AHB-AP init code as per ADI V5 spec. Also added changes to make the APB MEM-AP to work with A15. Made the the cortex_a target code generic to work with A8, A9 and A15 single core or multicore implementation. Added armv7a code for os_border calculation to work for known A8, A9 and A15 platforms based on the ARM DDI 0344H, ARM DDI 0407F, ARM DDI 0406C ARMV7A architecture docs. Change-Id: Ib2803ab62588bf40f1ae4b9192b619af31525a1a Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-on: http://openocd.zylin.com/1601 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-10-06arm_adi_v5: make dap_lookup_cs_component() traverse subtables and handle ↵Paul Fertser1-1/+6
multicore When looking for a debug base address of a core, one should search through all the ROM tables, not just the top-level one. This code also assumes that the first found entry (in a depth-first search) will correspond to core 0, the second to core 1 etc. The patch is supposed to be an alternative implementation of http://openocd.zylin.com/#/c/1313/. Change-Id: Ifc88971a02fe3d9c00d9bf72a822ade5804d4e09 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1920 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-07-03cortex_a: target implementation renames cortex_a8 to cortex_aKamal Dasu1-385/+386
A previous commit changes the target name used by tcl scripts. commit d9ba56c295f057e716519a798bf9cdb4898c24f4 target: rename cortex_a8 to cortex_a The current change renames target functions and definitions in the implementation from cortex_a8 to cortex_a. This prepares the implementation to support Cortex-A8, A9, A15-MPCore in one place. Change-Id: I73b5a38a92c12ba5bd3b806fbbb664817575a6d7 Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-on: http://openocd.zylin.com/1599 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-06-22cortex_a: fix lockup when writing to high addressSeth LaForge1-6/+6
On a processor with caches, when you write data to memory OpenOCD invalidates the cache lines affected. If you write to an address within 64 bytes of UINT32_MAX, then the for loop control variable wrapped around resulting in an infinite loop. Change control variable to be an offset from the address involved. We should never be asked to write 2^32 bytes, so wraparound should not be a problem. Change-Id: Ibfe654113eff71684862ff651e7a1cd05ccc6760 Signed-off-by: Seth LaForge <sethml@google.com> Reviewed-on: http://openocd.zylin.com/2126 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-04-14target/cortex_a: check gdb_service before dereferencing in update_halt_gdbPaul Fertser1-1/+1
If gdb was disconnected by the moment the target entered halted state, update_halt_gdb would segfault. Change-Id: I67477e9199c1df097be83a49e38602f975c083f5 Reported-by: Younes REGAIEG <younes.regaieg@imag.fr> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2098 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-07cortex_a: Fix endianess issues in cortex_a8_*_apb_ab_memoryKamal Dasu1-41/+43
Make the APB-AB memory read routines handle endianess order when running on big endian host. cortex_a8_read_apb_ab_memory is also called by cortex_a8_write_apb_ab_memory and was breaking both APB-AB read and write functions. Also fixed bug in write function in calculating the offset of end of buffer data. The change aslo fixes the read issues with all combinations of aligned unaligned memory access found by 'test_mem_access' cmd. Tested with target "test_mem_access 4000", also size 1-9, 'mdb/h/w' 'mwb/h/w' cmds and equivalent gdb 'x' 'set' cmds. Change-Id: Ia927c60c4837617f5342a9beb6fdab1f061855fe Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-on: http://openocd.zylin.com/1781 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2014-02-06cortex_a: do not try to use MMU for translation if it wasn't enabled on ↵Paul Fertser1-33/+36
target stop On a target where AHB AP memory access is unavailable, care should be taken to avoid treating addresses as virtual if the MMU was disabled at the time the target was stopped. Without this it's impossible to peek memory with Gdb when debugging e.g. a bootloader because cortex_a8_read_memory() unconditionally tried (and failed because of a sanity check in cortex_a8_mmu_modify) to enable MMU. Change-Id: Id7c63f4912920fb71a6104226ec6428d18c96a56 Reported-by: mbm@openwrt.org Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1787 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-11adi_v5: Remove unnecessary MEM-AP access functionsAndreas Fritiofson1-37/+8
It's far nicer to pass a size parameter than to split the calls to separate wrappers which are combined to a single function anyway. Change-Id: I716741ebf916f6f8e9358a31c8f4fe761107c82f Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1847 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31Clean up many C99 integer types format specifiersPaul Fertser1-12/+12
This eliminates most of the warnings reported when building for arm-none-eabi (newlib). Hsiangkai, there're many similar warnings left in your nds32 files, I didn't have the nerve to clean them all, probably you could pick it up. Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1674 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-08target: remove unimplemented target_request_data implementationsSpencer Oliver1-4/+0
Change-Id: Ia9afa83752d17f0f56bdf3bd81f5c69d108aa5e9 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1537 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-09-08target: remove unimplemented soft_reset_halt implementationsSpencer Oliver1-2/+0
Let the default handler issue an unsupported warning rather than using empty handler routines that may/may not issue a unsupported warning. Change-Id: Iafe3e45146981a4cfae39771c3ab7370ac86da48 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1535 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
2013-06-12cortex_a: remove memory leak on failureSpencer Oliver1-1/+1
If mem_ap_sel_write_atomic_u32 fails then tmp_buff may not be released. Detected by clang. Change-Id: I3d5416bd47d0eea61f61ec02ac5e43c82f114108 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1433 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-06-05update files to correct FSF addressSpencer Oliver1-1/+1
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-03cortex_a: fix FTBS on ARM due to alignment issuesAndreas Fritiofson1-10/+12
Native compilation on RaspberryPi with gcc (Debian 4.6.3-1) 4.6.3 Target: arm-linux-gnueabi ends with error: cortex_a.c: In function 'cortex_a8_read_apb_ab_memory': cortex_a.c:2063:40: error: cast increases required alignment of target type [-Werror=cast-align] cc1: all warnings being treated as errors Also check for malloc failure. This patch is compile-tested only. Change-Id: I580c505424d03ac3a565de54182db22277c52ac1 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1369 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-28targets: fix target_type name for Cortex-A targetsPaul Fertser1-1/+2
Commit d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of renaming of cortex_a8 to cortex_a, including the names in config files. However that introduced a regression as the name in target_type struct remained unchanged. This adds the last missing bit: actual renaming of the target name as understood by OpenOCD. Also change the (hopefully) last instance of using it in the supplied config files, namely from imx6.cfg. Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1420 Tested-by: jenkins Reviewed-by: Chris Johns <chrisj@rtems.org> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-28target: rename cortex_a8 to cortex_aSpencer Oliver1-2/+2
Rename cortex_a8 target to use a more correct cortex_a name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1130 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-15target: fix broken Cortex-R4 supportSpencer Oliver1-1/+0
This regression was caused due to the recent addition of R4 support and the removal of the bulk_write_memory handler. Change-Id: Ide692737f235c0e9906becb6f3502ba52c5907aa Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1246 Tested-by: jenkins
2013-03-15target: Add default implementation of bulk_write_memoryAndreas Fritiofson1-7/+0
Remove dummy implementations from all targets except arm7_9 and mips, which are the only ones with real implementations. Replace with a single default implementation simply calling target_write_memory(). Change-Id: I9228104240bc0b50661be20bc7909713ccda2164 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1213 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15arch: Added ARMv7R and Cortex-R4 supportEvan Hunter1-47/+153
Rewrite to merge Cortex-A and Cortex-R code Change-Id: I4541557980d43d1bba6e8d1bfeb04f536ed25a00 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/358 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15adi_v5: search for Debug and Memory AP supportEvan Hunter1-56/+65
Adds dap_find_ap() function. Change-Id: I6643025624009b12d4936de67a605da52c07be49 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/909 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15cortex_a : optimize apb read/write access.Evan Hunter1-64/+241
Rewrite: Adheres more closely to 'fast read/write' examples in TRM. up to 50x faster Change-Id: Ieb4da57d8367628f3e7306827a5b1f0ab550e641 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/903 Tested-by: jenkins Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13target: Remove read_memory_impAndreas Fritiofson1-1/+1
Change-Id: Idc6ef3b075ccbb5945df8fea746011cb17175d8f Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1219 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13target: Remove write_memory_impAndreas Fritiofson1-3/+3
Change-Id: I5d933bc19443bba8a0193c90471fdd0614324a92 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1218 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-09cortex_a: Fix target entry state route.Evan Hunter1-0/+1
If target is disabled at init, then is examined using 'arp_examine', it can get to cortex_a8_poll with the target state being unknown. Change-Id: Ifffb345bf971d275d2eb1912648b29f0a75f6ccc Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/954 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-28build: remove src file execute permissionSpencer Oliver1-0/+0
Change-Id: I42a250cdfcd03424a63cd1a255f9cf4a3c6e3ccd Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/671 Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-02-06build: cleanup src/target directorySpencer Oliver1-592/+449
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-01-23cleanup: rename armv4_5 to arm for readabilitySpencer Oliver1-69/+69
Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18cmd: add missing usage varsSpencer Oliver1-0/+6
we should have caught them all - hopefully. Change-Id: I35435317fccaf5ad0216244d69f76db6857bb582 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/381 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04retire ERROR_INVALID_ARGUMENTS and replace with ERROR_COMMAND_SYNTAX_ERRORØyvind Harboe1-4/+4
Change-Id: I6dee51e1fab1944085391f274a343cdb9014c7a4 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/300 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-02cortex_a: add missing error propagationØyvind Harboe1-1/+5
found by clang. Change-Id: I50eac219d7540fd48d3285f3f213cb659492d0c0 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/153 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-19Unused variablesFreddie Chopin1-1/+1
Fix a few errors with set and unused variables detected by GCC 4.7.0 Change-Id: I59b748e18e514ee9f0cde7883b4ed5116198bd4a Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/36 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-09-30armv7a ,cortex a : add L1, L2 cache support, va to pa supportMichel Jaouen1-220/+151
2011-08-30cortex_a hybrid & context breakpointsHeythem Bouhaja1-18/+248
2011-04-28cortex_a : smp supportMichel Jaouen1-15/+230
Conflicts: src/target/cortex_a.c
2011-04-13Replace byte-access to memory with faster word-accessLuca Ellero1-21/+69
Freescale iMX53 doesn't seem to like unaligned accesses to his memory mapped registers. Anyway this patch makes dump_image/load_image 4X faster for every access through APB. Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13cortex_a :apb mem read/write working with mmu_onMichel JAOUEN1-159/+171
Conflicts: src/target/cortex_a.c
2011-04-13cortex_a : multiple target on the same dapMichel JAOUEN1-0/+10
2011-04-13cortex_a : use dap ref from armv4_5commonMichel JAOUEN1-18/+18
2011-04-06cortex_a : implement jtag console for cortex_aMichel JAOUEN1-46/+13
2011-04-01cortex_a: delete dbgbase hack vestigesØyvind Harboe1-15/+0
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01cortex_a: fix gaffe in first implementation of -dbgbaseMichel JAOUEN1-9/+9
2011-04-01types: write memory now uses constØyvind Harboe1-3/+3
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31cortex-a: use -dbgbase optionØyvind Harboe1-5/+12
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22cortex_a: rename cortex_a8.c/h to cortex_a.c/hØyvind Harboe1-0/+2319
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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