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2024-06-23target: aarch64: access reg ELR_EL3 only in EL3Antonio Borneo1-0/+12
The register ELR_EL3 is accessible and it's content is relevant only when the target is in EL3. Without this patch, an error: Error: Opcode 0xd53e4020, DSCR.ERR=1, DSCR.EL=1 is triggered by GDB register window or through GDB command x/p $ELR_EL3 or through OpenOCD command reg ELR_EL3 Detect the EL and return error if the register cannot be accessed. Change-Id: I545abb196e5c34e462c7e5d5d3ec952e588642da Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8268 Tested-by: jenkins
2024-06-23target: armv8_dpm: silence error on register R/WAntonio Borneo1-2/+2
The command 'gdb_report_register_access_error' is used to silence errors while reading registers and not reporting them to GDB. Nevertheless, the error is printed by a LOG_ERROR() in armv8_dpm. Change the message to LOG_DEBUG(). It will still cause the error to be propagated and eventually printed by the caller (e.g. by the command 'reg'). Change-Id: Ic0db74fa28235d686ddd21a5960c52ae003e0931 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8267 Tested-by: jenkins
2024-06-23target: aarch64: align armv8_read_reg() and armv8_read_reg32()Antonio Borneo1-4/+8
These functions are today always called with non-NULL parameter regval, so the actual check is not needed. Anyway, for any future code change, check the parameter at the entry of the functions and return error if it is not valid. Simplify the check to assign the result value and align the code of the two functions. Change-Id: Ie4d98063006d70d9e2bcfc00bc930133caf33515 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8266 Tested-by: jenkins
2024-06-17Merge pull request #1089 from en-sc/en-sc/batch-select-dmiAnatoly Parshintsev1-0/+2
target/riscv: select DMI IR on batch access
2024-06-17target: Do not use LOG_USER() for error messagesMarc Schink1-4/+3
Use LOG_TARGET_ERROR() to print the error messages and additionally add a reference to the related target. Change-Id: I06722f3911ef4034fdd05dc9b0e2571b01b657a4 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8314 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2024-06-17target/cortex_m: allow poll quickly get out of TARGET_RESET stateTomas Vanek1-1/+5
cortex_m_poll_one() detects reset testing S_RESET_ST sticky bit. If the signal comes unexpectedly, poll must return TARGET_RESET state. On the contrary in case of polling inside of an OpenOCD reset command, TARGET_RESET has been has already been set and we need to get out of it as quickly as possible. The original code needs 2 polls: the first clears S_RESET_ST and keeps TARGET_RESET state, the current TARGET_RUNNING or TARGET_HALTED is reflected as late as the second poll is done. Change the logic to keep in TARGET_RESET only when necessary. See also [1] Link: [1] 8284: tcl/target: ti_cc3220sf: Use halt for CC3320SF targets | https://review.openocd.org/c/openocd/+/8284 Fixes: https://sourceforge.net/p/openocd/tickets/360/ Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I759461e5f89ca48a6e16e4b4101570260421dba1 Reviewed-on: https://review.openocd.org/c/openocd/+/8285 Tested-by: jenkins Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-06-15pld: small documentation fixes.Daniel Anselmi1-3/+3
Change-Id: I969f51c38fc0c34c6bdba98b0e618d7f28ea4052 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/8084 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-15pld/intel: remove idcodes from intel.cDaniel Anselmi9-265/+153
Remove list of id codes for all families. Maintain a list with id, bscan-length and check position in the tcl config files for each family. The Intel FPGA Driver option 'family' is not otional anymore. Change-Id: I9a40a041069e84f6b4728f2cd715756a36759c89 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/8083 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-15pld/intel: remove duplicated codeDaniel Anselmi1-3/+0
Change-Id: I043d16c77ce97d3e888774747ed6bfc4c7e63c04 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/8082 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15tcl/board: Support for Digilent Nexys 2 boardGeorge Voicu1-0/+30
Support Digilent Nexys 2 board JTAG chain Signed-off-by: George Voicu <razvanvg@hotmail.com> Change-Id: I350f80b49303c4b0402d93ebc120a591ef727551 Reviewed-on: https://review.openocd.org/c/openocd/+/7336 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15tcl/fpga: Support for Xilinx Spartan3 series devicesGeorge Voicu1-0/+43
Tap definition for Xilinx Spartan 3/3E/3A/3AN/3A-DSP devices. Signed-off-by: George Voicu <razvanvg@hotmail.com> Change-Id: Ieda2b61fc270840f9192976697fcac259c45e3b8 Reviewed-on: https://review.openocd.org/c/openocd/+/7335 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-15tcl/fpga/xilinx-dna: Support for reading Spartan3 DNA codeGeorge Voicu1-0/+6
Add Xilinx Spartan3 ISC_DNA instruction Signed-off-by: George Voicu <razvanvg@hotmail.com> Change-Id: Iaddb079c9fdd1b91c65def36878fe81783098696 Reviewed-on: https://review.openocd.org/c/openocd/+/7331 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15target/arm_tpiu_swo: Fix memory leak on errorAntonio Borneo1-4/+2
In case of fail to allocate 'obj->name', the memory allocated for 'obj->out_filename' is not freed, thus leaking. Since 'obj' is allocated with calloc(), thus zeroed, switch to use the common error exit path for both allocations of 'obj->name' and 'obj->out_filename'. Fixes: 2506ccb50915 ("target/arm_tpiu_swo: Fix division by zero") Change-Id: I412f66ddd7bf7d260cee495324058482b26ff0c5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8300 Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
2024-06-15fix GCC's `-Wcalloc-transposed-args` warningEvgeniy Naydanov10-13/+13
GCC 14.1.0 warns about calls to `calloc()` with element size as the first argument. Link: https://gcc.gnu.org/onlinedocs/gcc-14.1.0/gcc/Warning-Options.html#index-Wcalloc-transposed-args Change-Id: I7d44a74a003ee6ec49d165f91727972478214587 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8301 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-06-14target/riscv: select DMI IR on batch access.Evgeniy Naydanov1-0/+2
Without the selection the TAP can be left in bypass. Change-Id: I79c6bf74802dc9c9475947d1787a3d0b797f3952 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-06-10Merge pull request #1073 from en-sc/en-sc/abs-reg-batchEvgeniy Naydanov3-100/+308
target/riscv: write registers using batch
2024-06-08flash/nor/nrf5: handle ERROR_WAIT during nRF91 flash eraseTomas Vanek1-0/+22
Erase is initiated by write to a flash address. Due to the silicon errata of nRF91 the write stalls the bus until the page erase is finished (takes up to 87ms). If the adapter does not handle SWD WAIT properly, the following read in nrf5_wait_for_nvmc() returns ERROR_WAIT. Wait for fixed time before accessing AP. Not nice, but the only working solution until all adapters handle SWD WAIT. If the fixed wait does not suffice, continue the wait loop after a delay. It makes some unnecessary noise however erase works. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I63faf38dad79440a0117ed79930442bd2843c6db Reviewed-on: https://review.openocd.org/c/openocd/+/8115 Reviewed-by: Tomáš Beneš <tomas@dronetag.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08flash/nor/nrf5: show proper SoC type on newer nRF91 devicesTomas Vanek1-4/+38
Since nRF9160 Product Specification v2.1 the new UICR SIPINFO fields should be preferred over UICR INFO. Tested on nRF9161. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: Ib8005b3b6292aa20fa83c1dcebd2de27df58b661 Reviewed-on: https://review.openocd.org/c/openocd/+/8114 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08tcl/target: add nRF53 and nRF91 config filesTomas Vanek3-0/+295
Both devices can be configured with or without SWD multidrop. nRF53 network core is examined on demand to avoid problems when the core is forced off. Change-Id: I08f88ff48ff7ac592e9214b89ca8e5e9428573a5 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8113 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08flash/nor/nrf5: add basic nRF53 and nRF91 supportTomas Vanek2-39/+181
Probes all flash and UICR areas. Flash erase and write tested. On nRF53 mass erase works on the application core flash bank only. The Tcl script nrf53_recover can serve as the workaround on the network core. TODO: mass erase of the nRF53 network core flash. Some ideas taken from [1] and [2]. Change-Id: I8e27a780f4d82bcabf029f79b87ac46cf6a531c7 Link: [1] 7404: flash: nor: add support for Nordic nRF9160 | https://review.openocd.org/c/openocd/+/7404 Link: [2] 8062: flash: nor: add support for Nordic nRF9160 | https://review.openocd.org/c/openocd/+/8062 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8112 Reviewed-by: Tomáš Beneš <tomas@dronetag.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08flash/nor/nrf5: make flash erase little fasterTomas Vanek1-50/+35
Enable and disable erase mode only once instead of toggling it for each sector. Refactor to decrease the number of call levels. Change-Id: Ie546a4fc24da0eea2753a2bebaa63d941ef7aa1d Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8111 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08flash/nor/nrf5: introduce address mapsTomas Vanek1-85/+152
Preparatory change before extending support to nRF53 and 91. While on it, rename nRF51 and 52 specific routines and constants. Change-Id: I46bc496cef5cbde46d6755a4b908c875351f6612 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8110 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08gdb_server: do not start multiple instances on "pipe"Paul Fertser1-1/+3
For configurations which include multiple targets and the "pipe" mode is requested only the first gdb_server instance should be enabled, otherwise GDB gets confusing replies, goes out of sync and the session fails in weird ways. Compile-tested only. Signed-off-by: Paul Fertser <fercerpav@gmail.com> Change-Id: If8f13aa7b58e9b0dc6d5ae88cf75538b34cc1218 Reviewed-on: https://review.openocd.org/c/openocd/+/8222 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08flash/nor/tcl: Fix memory leak of flash bank nameMarc Schink1-0/+1
Change-Id: I54cd1ee479a0570ae849a71be47c82eebd1ae454 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8303 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08tcl/board: Add config for NXP FRDM-KV31FMarc Schink1-0/+21
Change-Id: I4d7cd1bcadd8159e4830107c2788708aef02add0 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8299 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08tcl/board: Add config for NXP FRDM-KV11ZMarc Schink1-0/+21
Change-Id: I9cd497a085f8f9c7854ae3b96e60a73b3b050d0e Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8298 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08target/riscv: support for smp group manipulationParshintsev Anatoly2-0/+15
this functionality allows to query if a target belongs to some smp group and to dynamically turn on/off smp-specific behavior Change-Id: I67bafb1817c621a38ae4a2f55e12e4143e992c4e Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8296 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08doc: Minimally describe the BSCAN tunnel interface.Tim Newsome1-2/+16
Add minimal documentation for the BSCAN tunnel interface. This is based on Tim Newsome <tim@sifive.com>'s work on the RISC-V fork. Change-Id: I5e0cd6972cb90649670249765e9bb30c2847eea6 Signed-off-by: Tim Newsome <tim@sifive.com> Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8297 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08jtag/drivers/ftdi: Use command_print instead of LOG_USER for get_signalMark Featherston1-2/+2
LOG_USER only outputs to user interfaces, but leaves no way to get the FTDI inputs over the RPC interface. Switch to command_print so this string goes to both logs and the RPC interface. Change-Id: I99024194b6687b88d354ef278aa25f372c862c22 Signed-off-by: Mark Featherston <mark@embeddedts.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8294 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
2024-06-08target: reset examine after assert_resetAntonio Borneo1-5/+7
For some target, the API assert_reset() checks if the target has been examined, with target_was_examined(), to perform conditional operations like: - assert adapter's srst; - write some register to catch the reset vector; - invalidate the register cache. Targets created with -defer-examine gets the examine flag reset right before entering in their assert_reset(), disrupting the actions above. For targets created with -defer-examine, move the reset examine after the assert_reset(). Change-Id: If96e7876dcace8905165115292deb93a3e45cb36 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8293 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-06-08src/helper/startup: fix syntax errorsNoah Moroze1-2/+2
The missing closing brackets were caught by tclint v0.2.5 (https://github.com/nmoroze/tclint): ``` tclint src/helper/startup.tcl | grep "syntax error" ``` The improperly escaped backslash was caught by manual inspection during code review. Change-Id: I8cd44e58040d4627f6b2fc8b88ca8a930cda0ba6 Signed-off-by: Noah Moroze <noahmoroze@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8282 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08tcl/chip/st/spear: fix syntax errorsNoah Moroze1-2/+2
While the current jimtcl does not consider this an error, the Tcl dodekalogue states that strings terminate at the second double quote character (see https://www.tcl.tk/man/tcl/TclCmd/Tcl.htm#M8). These syntax errors were caught by tclint v0.2.5 (https://github.com/nmoroze/tclint): ``` tclint tcl/chip/st/spear/spear3xx_ddr.tcl | grep "syntax error" ``` Change-Id: I2763d93095e3db7590644652f16b7b24939d6cae Signed-off-by: Noah Moroze <noahmoroze@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8281 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08tcl/target/c100helper: fix syntax errorsNoah Moroze1-2/+2
Fixes: 64d89d5ee1a5 ("tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change") These syntax errors were caught by tclint v0.2.5 (https://github.com/nmoroze/tclint): ``` tclint tcl/target/c100helper.tcl | grep "syntax error" ``` Change-Id: I511c54353c4853560adca6b4852d48df2aade283 Signed-off-by: Noah Moroze <noahmoroze@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8280 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08tcl/memory: fix syntax errorsNoah Moroze1-2/+2
Using a command in an expression requires a bracketed command substitution. These syntax errors were caught by tclint v0.2.5 (https://github.com/nmoroze/tclint): ``` tclint tcl/memory.tcl | grep "syntax error" ``` Change-Id: I510d46222f4fb02d6ef73121b231d5b2df77e5c0 Signed-off-by: Noah Moroze <noahmoroze@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8279 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08contrib: Drop 'coresight-trace.txt'Marc Schink1-68/+0
This document is outdated and has broken text formatting. It also provides no useful information to users nor developers, at worst it causes confusion. For that reason, drop this file. Change-Id: Id5ee1f6e74d1a641c60d897f114bb97f5fd48e5b Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8292 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08server: gdb: respect command gdb_report_register_access_errorAntonio Borneo1-2/+8
Commit 236c54c94a53 ("server/gdb_server.c: support unavailable registers") correctly returns a string of 'x' when the register is not available in the current target. While implementing this, it incorrectly drops the pre-existing feature of optionally ignoring errors while reading a register. This feature has a real use case documented in the OpenOCD manual in chapter 'Using GDB as a non-intrusive memory inspector', where GDB attaches to a target without halting it. For targets that need to be halted to read its registers, we need to hack the values of the registers returned to GDB; either returning 'xxxx' or an error causes GDB to drop the connection. Re-add the check on 'gdb_report_register_access_error' to keep the pre-existing behavior when a register error has to be ignored: - return a string of '0'; - drop a debug message. Change-Id: Ie65c92f259f92502e688914f334655b635874179 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 236c54c94a53 ("server/gdb_server.c: support unavailable registers") Reviewed-on: https://review.openocd.org/c/openocd/+/8228 Tested-by: jenkins
2024-06-07Merge pull request #1044 from en-sc/en-sc/riscv-011-sep-reg-accEvgeniy Naydanov2-18/+102
target/riscv: stop using register_get/set for 0.11 targets
2024-06-06target/riscv: write registers using batchEvgeniy Naydanov3-100/+308
This allows to eliminate up to two DMI NOPs. Change-Id: I09a18bd896fce2392d1b65d4efb38b53e334a358 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-06-05.github/workflows: check git revisions instead of a diffEvgeniy Naydanov1-7/+1
When running on diff, Checkpatch ignores `Checkpatch-ignore` directives in the commit message. Change-Id: Ib296d5e972408973fb381fafc51f59569a01d1f0 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-06-05Merge pull request #1075 from en-sc/en-sc/from_upstreamEvgeniy Naydanov38-244/+470
Merge up to 437dde701c13e707e5fd912ef6403e09052e4d9b from upstream
2024-06-04target/riscv: stop using register_get/set for 0.11 targetsEvgeniy Naydanov2-16/+102
Caching is somewhat handled in `riscv-011.c`. Handling it additionaly in `riscv.c` may cause problems. Sice there is no simulator that supports RISC-V Debug Specification v0.11, so it is not feaseable to automate testing. This commit separates 0.11 register accesses and unlocks further development in this area. Change-Id: I73ff17ef85106c4ababa38319f446f6c384a1750 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-06-04Revert "Initialize all registers in examine"Evgeniy Naydanov1-2/+0
This reverts commit 9d4df3420c51e75bcc1d6162fc9cc680d6fd2481. I believe the reasoning behind this workaround is no longer valid. Change-Id: Ie8705f75eb8ad7b72fc8ffcf39125be764cb43be
2024-06-04Merge pull request #1056 from aap-sc/aap-sc/no_hit_bit_statusAnatoly Parshintsev2-15/+90
target/riscv: fix halt reason for targets that do not support hit bit on triggers
2024-06-04Merge pull request #1077 from riscv-collab/remove-slot_t-from-riscv-013Evgeniy Naydanov1-6/+0
riscv-013: Remove unused typedef slot_t
2024-05-31riscv-013: Remove unused typedef slot_tJan Matyas1-6/+0
Code cleanup: "slot_t" is unused in riscv013 - remove it. Change-Id: I9d5a0cf8446a180b1d13a9ce2c86d904b946cf28 Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2024-05-30Merge up to 437dde701c13e707e5fd912ef6403e09052e4d9b from upstreamEvgeniy Naydanov38-244/+470
Conflict in src/rtos/FreeRTOS.c due to fbea7d5d38d0dcbdd71cb574da9bd12c78b568cf -- resolved by replacing `target->type->name` with a call to `target_type_name()`. Change-Id: I56702c6133894458903de7a4d764903004aa8b86
2024-05-30Merge pull request #1072 from aap-sc/aap-sc/fix_warnings_on_hide_csrsEvgeniy Naydanov1-1/+1
target/riscv: do not emit warnings when a non-existent CSR is hidden
2024-05-28target/riscv: do not emit warnings when a non-existent CSR is hiddenParshintsev Anatoly1-1/+1
hide_csrs should not emit warnings on an attempt to hide non-exitents CSR. hide_csrs funcitonality is intended to be used for scenarios when we don`t want certain groups of registers to be available in GDB. Typically this is needed to simplify integration with various IDE. In such scenarious it may be impractical/unfeseable to figure out which register is present on a target. So reporting a situation when a user wants to hide a non-existent register creates way too much noise. This commit reduces severity of relevant debug message to LOG_TARGET_DEBUG
2024-05-28target/riscv: fix halt reason for targets that do not support hit bit on ↵Parshintsev Anatoly2-15/+90
triggers Before this patch the following behavior is observed on targets that do not support hit bit: ``` bp 0x80000004 4 hw resume 0x80000000 riscv.cpu halted due to watchpoint ``` This happens because the current implementation relies on the presence of hit bit way too much. While working on this patch few defects in hit bit-based trigger detection were discovered, added appropriate TODOs.
2024-05-28Merge pull request #1033 from en-sc/en-sc/err-read-abs-argEvgeniy Naydanov3-80/+218
target/riscv: read abstract args using batch
generated by cgit v1.1 at 2025-09-20 19:16:32 +0000