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-rw-r--r--tcl/board/nds32_xc5.cfg7
-rw-r--r--tcl/cpld/xilinx-xcu.cfg2
-rw-r--r--tcl/interface/nds32-aice.cfg17
-rw-r--r--tcl/interface/raspberrypi2-native.cfg4
-rw-r--r--tcl/target/atmega32u4.cfg30
-rw-r--r--tcl/target/max32620.cfg4
-rw-r--r--tcl/target/max32625.cfg4
-rw-r--r--tcl/target/max3263x.cfg4
-rw-r--r--tcl/target/nds32v2.cfg12
-rw-r--r--tcl/target/nds32v3.cfg12
-rw-r--r--tcl/target/nds32v3m.cfg12
-rw-r--r--tcl/target/rp2040-core0.cfg37
-rw-r--r--tcl/target/rp2040.cfg80
-rw-r--r--tcl/target/stm32x5x_common.cfg24
-rw-r--r--tcl/target/ti_k3.cfg5
-rw-r--r--tcl/target/xtensa-core-esp32.cfg42
-rw-r--r--tcl/target/xtensa-core-esp32s2.cfg74
-rw-r--r--tcl/target/xtensa-core-esp32s3.cfg147
18 files changed, 245 insertions, 272 deletions
diff --git a/tcl/board/nds32_xc5.cfg b/tcl/board/nds32_xc5.cfg
deleted file mode 100644
index 82a117e..0000000
--- a/tcl/board/nds32_xc5.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-set _CPUTAPID 0x1000063d
-set _CHIPNAME nds32
-source [find target/nds32v3.cfg]
-
-jtag init
diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg
index 57a59f5..9df696d 100644
--- a/tcl/cpld/xilinx-xcu.cfg
+++ b/tcl/cpld/xilinx-xcu.cfg
@@ -9,7 +9,7 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME xcu
}
-# The cvarious chips in the Ultrascale family have different IR length.
+# The various chips in the Ultrascale family have different IR length.
# Set $CHIP before including this file to determine the device.
array set _XCU_DATA {
XCKU025 {0x03824093 6}
diff --git a/tcl/interface/nds32-aice.cfg b/tcl/interface/nds32-aice.cfg
deleted file mode 100644
index 1d9717c..0000000
--- a/tcl/interface/nds32-aice.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-#
-# Andes AICE
-#
-# http://www.andestech.com
-#
-
-adapter driver aice
-aice desc "Andes AICE adapter"
-# adapter serial "C001-42163"
-aice vid_pid 0x1CFC 0x0000
-aice port aice_usb
-reset_config trst_and_srst
-adapter speed 24000
-aice retry_times 50
-aice count_to_check_dbger 30
diff --git a/tcl/interface/raspberrypi2-native.cfg b/tcl/interface/raspberrypi2-native.cfg
index 5faabed..d5edded 100644
--- a/tcl/interface/raspberrypi2-native.cfg
+++ b/tcl/interface/raspberrypi2-native.cfg
@@ -15,9 +15,9 @@ adapter driver bcm2835gpio
bcm2835gpio peripheral_base 0x3F000000
# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
-# These depend on system clock, calibrated for stock 700MHz
+# These depend on system clock, calibrated for scaling_max_freq 900MHz
# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio speed_coeffs 146203 36
+bcm2835gpio speed_coeffs 225000 36
# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
# Header pin numbers: 23 22 19 21
diff --git a/tcl/target/atmega32u4.cfg b/tcl/target/atmega32u4.cfg
new file mode 100644
index 0000000..9199c74
--- /dev/null
+++ b/tcl/target/atmega32u4.cfg
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# ATmega32U4
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME avr
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x4958703f
+}
+
+adapter speed 4500
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME avr 0 0 0 0 $_TARGETNAME
diff --git a/tcl/target/max32620.cfg b/tcl/target/max32620.cfg
index 9f0f492..f3a9f84 100644
--- a/tcl/target/max32620.cfg
+++ b/tcl/target/max32620.cfg
@@ -16,8 +16,10 @@ if {[using_jtag]} {
swd newdap max32620 cpu -irlen 4 -irmask 0xf -expected-id 0x2ba01477 -ignore-version
}
+dap create max32620.dap -chain-position max32620.cpu
+
# target configuration
-target create max32620.cpu cortex_m -chain-position max32620.cpu
+target create max32620.cpu cortex_m -dap max32620.dap
max32620.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000
# Config Command: flash bank name driver base size chip_width bus_width target [driver_options]
diff --git a/tcl/target/max32625.cfg b/tcl/target/max32625.cfg
index 35e1c3b..90eb392 100644
--- a/tcl/target/max32625.cfg
+++ b/tcl/target/max32625.cfg
@@ -16,8 +16,10 @@ if {[using_jtag]} {
swd newdap max32625 cpu -irlen 4 -irmask 0xf -expected-id 0x2ba01477 -ignore-version
}
+dap create max32625.dap -chain-position max32625.cpu
+
# target configuration
-target create max32625.cpu cortex_m -chain-position max32625.cpu
+target create max32625.cpu cortex_m -dap max32625.dap
max32625.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000
# Config Command: flash bank name driver base size chip_width bus_width target [driver_options]
diff --git a/tcl/target/max3263x.cfg b/tcl/target/max3263x.cfg
index 52a5a77..852e04a 100644
--- a/tcl/target/max3263x.cfg
+++ b/tcl/target/max3263x.cfg
@@ -16,8 +16,10 @@ if {[using_jtag]} {
swd newdap max3263x cpu -irlen 4 -irmask 0xf -expected-id 0x2ba01477 -ignore-version
}
+dap create max3263x.dap -chain-position max3263x.cpu
+
# target configuration
-target create max3263x.cpu cortex_m -chain-position max3263x.cpu
+target create max3263x.cpu cortex_m -dap max3263x.dap
max3263x.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000
# Config Command: flash bank name driver base size chip_width bus_width target [driver_options]
diff --git a/tcl/target/nds32v2.cfg b/tcl/target/nds32v2.cfg
deleted file mode 100644
index 07814b7..0000000
--- a/tcl/target/nds32v2.cfg
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-#
-# Andes Core
-#
-# http://www.andestech.com
-#
-
-jtag newtap $_CHIPNAME cpu -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME nds32_v2 -endian little -chain-position $_TARGETNAME
diff --git a/tcl/target/nds32v3.cfg b/tcl/target/nds32v3.cfg
deleted file mode 100644
index 0fd1369..0000000
--- a/tcl/target/nds32v3.cfg
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-#
-# Andes Core
-#
-# http://www.andestech.com
-#
-
-jtag newtap $_CHIPNAME cpu -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME nds32_v3 -endian little -chain-position $_TARGETNAME
diff --git a/tcl/target/nds32v3m.cfg b/tcl/target/nds32v3m.cfg
deleted file mode 100644
index 29a2478..0000000
--- a/tcl/target/nds32v3m.cfg
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-#
-# Andes Core
-#
-# http://www.andestech.com
-#
-
-jtag newtap $_CHIPNAME cpu -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME nds32_v3m -endian little -chain-position $_TARGETNAME
diff --git a/tcl/target/rp2040-core0.cfg b/tcl/target/rp2040-core0.cfg
deleted file mode 100644
index 8c3533b..0000000
--- a/tcl/target/rp2040-core0.cfg
+++ /dev/null
@@ -1,37 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-transport select swd
-
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME rp2040
-}
-
-if { [info exists WORKAREASIZE] } {
- set _WORKAREASIZE $WORKAREASIZE
-} else {
- set _WORKAREASIZE 0x10000
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x01002927
-}
-
-swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
-dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
-$_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE
-
-set _FLASHNAME $_CHIPNAME.flash
-set _FLASHSIZE 0x200000
-set _FLASHBASE 0x10000000
-flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME
-
-# srst does not exist; use SYSRESETREQ to perform a soft reset
-cortex_m reset_config sysresetreq
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
new file mode 100644
index 0000000..0593e03
--- /dev/null
+++ b/tcl/target/rp2040.cfg
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# RP2040 is a microcontroller with dual Cortex-M0+ core.
+# https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html
+
+# The device requires multidrop SWD for debug.
+transport select swd
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME rp2040
+}
+
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x10000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x01002927
+}
+
+# Set to '0' or '1' for single core configuration, 'SMP' for -rtos hwthread
+# handling of both cores, anything else for isolated debugging of both cores
+if { [info exists USE_CORE] } {
+ set _USE_CORE $USE_CORE
+} else {
+ set _USE_CORE SMP
+}
+set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }]
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+
+# core 0
+if { $_USE_CORE != 1 } {
+ dap create $_CHIPNAME.dap0 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0
+ set _TARGETNAME_0 $_CHIPNAME.core0
+ target create $_TARGETNAME_0 cortex_m -dap $_CHIPNAME.dap0 -coreid 0
+ # srst does not exist; use SYSRESETREQ to perform a soft reset
+ $_TARGETNAME_0 cortex_m reset_config sysresetreq
+}
+
+# core 1
+if { $_USE_CORE != 0 } {
+ dap create $_CHIPNAME.dap1 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 1
+ set _TARGETNAME_1 $_CHIPNAME.core1
+ target create $_TARGETNAME_1 cortex_m -dap $_CHIPNAME.dap1 -coreid 1
+ $_TARGETNAME_1 cortex_m reset_config sysresetreq
+}
+
+if {[string compare $_USE_CORE SMP] == 0} {
+ $_TARGETNAME_0 configure -rtos hwthread
+ $_TARGETNAME_1 configure -rtos hwthread
+ target smp $_TARGETNAME_0 $_TARGETNAME_1
+}
+
+if { $_USE_CORE == 1 } {
+ set _FLASH_TARGET $_TARGETNAME_1
+} else {
+ set _FLASH_TARGET $_TARGETNAME_0
+}
+# Backup the work area. The flash probe runs an algorithm on the target CPU.
+# The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
+$_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME rp2040_flash 0x10000000 0 0 0 $_FLASH_TARGET
+
+if { $_BOTH_CORES } {
+ # Alias to ensure gdb connecting to core 1 gets the correct memory map
+ flash bank $_CHIPNAME.alias virtual 0x10000000 0 0 0 $_TARGETNAME_1 $_FLASHNAME
+
+ # Select core 0
+ targets $_TARGETNAME_0
+}
diff --git a/tcl/target/stm32x5x_common.cfg b/tcl/target/stm32x5x_common.cfg
index c506e22..fb3aeb1 100644
--- a/tcl/target/stm32x5x_common.cfg
+++ b/tcl/target/stm32x5x_common.cfg
@@ -58,7 +58,9 @@ if {[using_jtag]} {
reset_config srst_nogate
-if {![using_hla]} {
+if {[using_hla]} {
+ echo "Warn : The selected adapter does not support debugging this device in secure mode"
+} else {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
@@ -71,13 +73,18 @@ proc stm32x5x_is_secure {} {
}
proc stm32x5x_ahb_ap_non_secure_access {} {
- # SPROT=1=Non Secure access, Priv=1
- [[target current] cget -dap] apcsw 0x4B000000 0x4F000000
+ # in HLA mode, non-secure debugging is possible without changing the AP CSW
+ if {![using_hla]} {
+ # SPROT=1=Non Secure access, Priv=1
+ [[target current] cget -dap] apcsw 0x4B000000 0x4F000000
+ }
}
proc stm32x5x_ahb_ap_secure_access {} {
- # SPROT=0=Secure access, Priv=1
- [[target current] cget -dap] apcsw 0x0B000000 0x4F000000
+ if {![using_hla]} {
+ # SPROT=0=Secure access, Priv=1
+ [[target current] cget -dap] apcsw 0x0B000000 0x4F000000
+ }
}
$_TARGETNAME configure -event reset-start {
@@ -152,10 +159,11 @@ lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
targets $_targetname
- # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
- # change this value accordingly to configure trace pins
+ # Set TRACE_EN and TRACE_IOEN in DBGMCU_CR
+ # Leave TRACE_MODE untouched (defaults to async).
+ # When using sync change this value accordingly to configure trace pins
# assignment
- mmw 0xE0044004 0x00000020 0
+ mmw 0xE0044004 0x00000030 0
}
$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 254bb69..2454357 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -12,6 +12,8 @@
# Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
#
+source [find target/swj-dp.tcl]
+
if { [info exists SOC] } {
set _soc $SOC
} else {
@@ -164,7 +166,8 @@ switch $_soc {
}
}
-jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_K3_DAP_TAPID -ignore-version
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_K3_DAP_TAPID -ignore-version
+
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
diff --git a/tcl/target/xtensa-core-esp32.cfg b/tcl/target/xtensa-core-esp32.cfg
index e7b5a20..9a70072 100644
--- a/tcl/target/xtensa-core-esp32.cfg
+++ b/tcl/target/xtensa-core-esp32.cfg
@@ -22,6 +22,7 @@ xtensa xtmem irom 0x40000000 0x64F00
xtensa xtmem iram 0x40070000 0x30000
xtensa xtmem iram 0x400C0000 0x2000
xtensa xtmem drom 0x3F400000 0x800000
+xtensa xtmem drom 0x3FF90000 0x10000
xtensa xtmem dram 0x3FFAE000 0x52000
xtensa xtmem dram 0x3FF80000 0x2000
xtensa xtmem dram 0x3F800000 0x400000
@@ -35,7 +36,7 @@ xtensa xtmem dram 0x60000000 0x20000000
xtensa xtopt debuglevel 6
xtensa xtopt ibreaknum 2
xtensa xtopt dbreaknum 2
-xtensa xtopt tracemem 8192
+xtensa xtopt tracemem 0x4000
xtensa xtopt tracememrev 1
xtensa xtopt perfcount 2
@@ -46,7 +47,7 @@ xtensa xtopt perfcount 2
# in "Read General Registers" (g-packet) requests.
# NOTE: For contiguous format, registers listed in GDB order.
# xtregs: Total number of Xtensa registers in the system
-xtensa xtregs 205
+xtensa xtregs 173
xtensa xtregfmt contiguous 105
xtensa xtreg pc 0x0020
xtensa xtreg ar0 0x0100
@@ -123,8 +124,6 @@ xtensa xtreg configid0 0x02b0
xtensa xtreg configid1 0x02d0
xtensa xtreg ps 0x02e6
xtensa xtreg threadptr 0x03e7
-
-# added by hand for esp32
xtensa xtreg br 0x0204
xtensa xtreg scompare1 0x020c
xtensa xtreg acclo 0x0210
@@ -155,13 +154,10 @@ xtensa xtreg f14 0x003e
xtensa xtreg f15 0x003f
xtensa xtreg fcr 0x03e8
xtensa xtreg fsr 0x03e9
-
xtensa xtreg mmid 0x0259
xtensa xtreg ibreakenable 0x0260
-
xtensa xtreg memctl 0x0261
xtensa xtreg atomctl 0x0263
-
xtensa xtreg ddr 0x0268
xtensa xtreg ibreaka0 0x0280
xtensa xtreg ibreaka1 0x0281
@@ -226,35 +222,3 @@ xtensa xtreg a12 0x000c
xtensa xtreg a13 0x000d
xtensa xtreg a14 0x000e
xtensa xtreg a15 0x000f
-xtensa xtreg pwrctl 0x2028
-xtensa xtreg pwrstat 0x2029
-xtensa xtreg eristat 0x202a
-xtensa xtreg cs_itctrl 0x202b
-xtensa xtreg cs_claimset 0x202c
-xtensa xtreg cs_claimclr 0x202d
-xtensa xtreg cs_lockaccess 0x202e
-xtensa xtreg cs_lockstatus 0x202f
-xtensa xtreg cs_authstatus 0x2030
-xtensa xtreg fault_info 0x203f
-xtensa xtreg trax_id 0x2040
-xtensa xtreg trax_control 0x2041
-xtensa xtreg trax_status 0x2042
-xtensa xtreg trax_data 0x2043
-xtensa xtreg trax_address 0x2044
-xtensa xtreg trax_pctrigger 0x2045
-xtensa xtreg trax_pcmatch 0x2046
-xtensa xtreg trax_delay 0x2047
-xtensa xtreg trax_memstart 0x2048
-xtensa xtreg trax_memend 0x2049
-xtensa xtreg pmg 0x2057
-xtensa xtreg pmpc 0x2058
-xtensa xtreg pm0 0x2059
-xtensa xtreg pm1 0x205a
-xtensa xtreg pmctrl0 0x2061
-xtensa xtreg pmctrl1 0x2062
-xtensa xtreg pmstat0 0x2069
-xtensa xtreg pmstat1 0x206a
-xtensa xtreg ocdid 0x2071
-xtensa xtreg ocd_dcrclr 0x2072
-xtensa xtreg ocd_dcrset 0x2073
-xtensa xtreg ocd_dsr 0x2074
diff --git a/tcl/target/xtensa-core-esp32s2.cfg b/tcl/target/xtensa-core-esp32s2.cfg
index e590e51..b38cb1d 100644
--- a/tcl/target/xtensa-core-esp32s2.cfg
+++ b/tcl/target/xtensa-core-esp32s2.cfg
@@ -23,6 +23,7 @@ xtensa xtmem iram 0x40020000 0x50000
xtensa xtmem iram 0x40070000 0x2000
xtensa xtmem drom 0x3F000000 0x400000
xtensa xtmem drom 0x3F4D3FFC 0xAAC004
+xtensa xtmem drom 0x3FFA0000 0x10000
xtensa xtmem dram 0x3FFB0000 0x50000
xtensa xtmem dram 0x3FF9E000 0x2000
xtensa xtmem dram 0x50000000 0x2000
@@ -36,8 +37,8 @@ xtensa xtmem dram 0x60000000 0x20000000
xtensa xtopt debuglevel 6
xtensa xtopt ibreaknum 2
xtensa xtopt dbreaknum 2
-xtensa xtopt tracemem 8192
-xtensa xtopt tracememrev 1
+xtensa xtopt tracemem 0x4000
+xtensa xtopt tracememrev 0
xtensa xtopt perfcount 2
# Core Registers
@@ -48,7 +49,7 @@ xtensa xtopt perfcount 2
# NOTE: For contiguous format, registers listed in GDB order.
# xtregs: Total number of Xtensa registers in the system
xtensa xtregs 171
-xtensa xtregfmt contiguous 72
+xtensa xtregfmt contiguous 73
xtensa xtreg pc 0x0020
xtensa xtreg ar0 0x0100
xtensa xtreg ar1 0x0101
@@ -121,8 +122,7 @@ xtensa xtreg configid0 0x02b0
xtensa xtreg configid1 0x02d0
xtensa xtreg ps 0x02e6
xtensa xtreg threadptr 0x03e7
-# gpio_out should be 0x0300? Hits an exception on wrover
-xtensa xtreg gpio_out 0x0268
+xtensa xtreg gpio_out 0x0300
xtensa xtreg mmid 0x0259
xtensa xtreg ibreakenable 0x0260
xtensa xtreg ddr 0x0268
@@ -173,6 +173,38 @@ xtensa xtreg misc0 0x02f4
xtensa xtreg misc1 0x02f5
xtensa xtreg misc2 0x02f6
xtensa xtreg misc3 0x02f7
+xtensa xtreg pwrctl 0x2014
+xtensa xtreg pwrstat 0x2015
+xtensa xtreg eristat 0x2016
+xtensa xtreg cs_itctrl 0x2017
+xtensa xtreg cs_claimset 0x2018
+xtensa xtreg cs_claimclr 0x2019
+xtensa xtreg cs_lockaccess 0x201a
+xtensa xtreg cs_lockstatus 0x201b
+xtensa xtreg cs_authstatus 0x201c
+xtensa xtreg fault_info 0x202b
+xtensa xtreg trax_id 0x202c
+xtensa xtreg trax_control 0x202d
+xtensa xtreg trax_status 0x202e
+xtensa xtreg trax_data 0x202f
+xtensa xtreg trax_address 0x2030
+xtensa xtreg trax_pctrigger 0x2031
+xtensa xtreg trax_pcmatch 0x2032
+xtensa xtreg trax_delay 0x2033
+xtensa xtreg trax_memstart 0x2034
+xtensa xtreg trax_memend 0x2035
+xtensa xtreg pmg 0x2043
+xtensa xtreg pmpc 0x2044
+xtensa xtreg pm0 0x2045
+xtensa xtreg pm1 0x2046
+xtensa xtreg pmctrl0 0x2047
+xtensa xtreg pmctrl1 0x2048
+xtensa xtreg pmstat0 0x2049
+xtensa xtreg pmstat1 0x204a
+xtensa xtreg ocdid 0x204b
+xtensa xtreg ocd_dcrclr 0x204c
+xtensa xtreg ocd_dcrset 0x204d
+xtensa xtreg ocd_dsr 0x204e
xtensa xtreg a0 0x0000
xtensa xtreg a1 0x0001
xtensa xtreg a2 0x0002
@@ -189,35 +221,3 @@ xtensa xtreg a12 0x000c
xtensa xtreg a13 0x000d
xtensa xtreg a14 0x000e
xtensa xtreg a15 0x000f
-xtensa xtreg pwrctl 0x2028
-xtensa xtreg pwrstat 0x2029
-xtensa xtreg eristat 0x202a
-xtensa xtreg cs_itctrl 0x202b
-xtensa xtreg cs_claimset 0x202c
-xtensa xtreg cs_claimclr 0x202d
-xtensa xtreg cs_lockaccess 0x202e
-xtensa xtreg cs_lockstatus 0x202f
-xtensa xtreg cs_authstatus 0x2030
-xtensa xtreg fault_info 0x203f
-xtensa xtreg trax_id 0x2040
-xtensa xtreg trax_control 0x2041
-xtensa xtreg trax_status 0x2042
-xtensa xtreg trax_data 0x2043
-xtensa xtreg trax_address 0x2044
-xtensa xtreg trax_pctrigger 0x2045
-xtensa xtreg trax_pcmatch 0x2046
-xtensa xtreg trax_delay 0x2047
-xtensa xtreg trax_memstart 0x2048
-xtensa xtreg trax_memend 0x2049
-xtensa xtreg pmg 0x2057
-xtensa xtreg pmpc 0x2058
-xtensa xtreg pm0 0x2059
-xtensa xtreg pm1 0x205a
-xtensa xtreg pmctrl0 0x2061
-xtensa xtreg pmctrl1 0x2062
-xtensa xtreg pmstat0 0x2069
-xtensa xtreg pmstat1 0x206a
-xtensa xtreg ocdid 0x2071
-xtensa xtreg ocd_dcrclr 0x2072
-xtensa xtreg ocd_dcrset 0x2073
-xtensa xtreg ocd_dsr 0x2074
diff --git a/tcl/target/xtensa-core-esp32s3.cfg b/tcl/target/xtensa-core-esp32s3.cfg
index f5c1cb3..b3f20e3 100644
--- a/tcl/target/xtensa-core-esp32s3.cfg
+++ b/tcl/target/xtensa-core-esp32s3.cfg
@@ -20,6 +20,7 @@ xtensa xtmem irom 0x40000000 0x60000
xtensa xtmem iram 0x40370000 0x70000
xtensa xtmem iram 0x600FE000 0x2000
xtensa xtmem drom 0x3C000000 0x1000000
+xtensa xtmem drom 0x3FF00000 0x20000
xtensa xtmem dram 0x3FC88000 0x78000
xtensa xtmem dram 0x600FE000 0x2000
xtensa xtmem dram 0x50000000 0x2000
@@ -31,8 +32,8 @@ xtensa xtmem dram 0x60000000 0x10000000
xtensa xtopt debuglevel 6
xtensa xtopt ibreaknum 2
xtensa xtopt dbreaknum 2
-xtensa xtopt tracemem 16384
-xtensa xtopt tracememrev 1
+xtensa xtopt tracemem 0x4000
+xtensa xtopt tracememrev 0
xtensa xtopt perfcount 2
@@ -43,7 +44,7 @@ xtensa xtopt perfcount 2
# in "Read General Registers" (g-packet) requests.
# NOTE: For contiguous format, registers listed in GDB order.
# xtregs: Total number of Xtensa registers in the system
-xtensa xtregs 244
+xtensa xtregs 228
xtensa xtregfmt contiguous 128
xtensa xtreg pc 0x0020
xtensa xtreg ar0 0x0100
@@ -128,10 +129,7 @@ xtensa xtreg m0 0x0220
xtensa xtreg m1 0x0221
xtensa xtreg m2 0x0222
xtensa xtreg m3 0x0223
-
-# TODO: update gpioout address while testing on S3 HW
-xtensa xtreg gpioout 0x02f4
-
+xtensa xtreg gpio_out 0x030c
xtensa xtreg f0 0x0030
xtensa xtreg f1 0x0031
xtensa xtreg f2 0x0032
@@ -150,35 +148,32 @@ xtensa xtreg f14 0x003e
xtensa xtreg f15 0x003f
xtensa xtreg fcr 0x03e8
xtensa xtreg fsr 0x03e9
-
-# TODO: update TIE state
-xtensa xtreg accx_0 0x02f4
-xtensa xtreg accx_1 0x02f4
-xtensa xtreg qacc_h_0 0x02f4
-xtensa xtreg qacc_h_1 0x02f4
-xtensa xtreg qacc_h_2 0x02f4
-xtensa xtreg qacc_h_3 0x02f4
-xtensa xtreg qacc_h_4 0x02f4
-xtensa xtreg qacc_l_0 0x02f4
-xtensa xtreg qacc_l_1 0x02f4
-xtensa xtreg qacc_l_2 0x02f4
-xtensa xtreg qacc_l_3 0x02f4
-xtensa xtreg qacc_l_4 0x02f4
-xtensa xtreg sar_byte 0x02f4
-xtensa xtreg fft_bit_width 0x02f4
-xtensa xtreg ua_state_0 0x02f4
-xtensa xtreg ua_state_1 0x02f4
-xtensa xtreg ua_state_2 0x02f4
-xtensa xtreg ua_state_3 0x02f4
-xtensa xtreg q0 0x02f4
-xtensa xtreg q1 0x02f4
-xtensa xtreg q2 0x02f4
-xtensa xtreg q3 0x02f4
-xtensa xtreg q4 0x02f4
-xtensa xtreg q5 0x02f4
-xtensa xtreg q6 0x02f4
-xtensa xtreg q7 0x02f4
-
+xtensa xtreg accx_0 0x0300
+xtensa xtreg accx_1 0x0301
+xtensa xtreg qacc_h_0 0x0302
+xtensa xtreg qacc_h_1 0x0303
+xtensa xtreg qacc_h_2 0x0304
+xtensa xtreg qacc_h_3 0x0305
+xtensa xtreg qacc_h_4 0x0306
+xtensa xtreg qacc_l_0 0x0307
+xtensa xtreg qacc_l_1 0x0308
+xtensa xtreg qacc_l_2 0x0309
+xtensa xtreg qacc_l_3 0x030a
+xtensa xtreg qacc_l_4 0x030b
+xtensa xtreg sar_byte 0x030d
+xtensa xtreg fft_bit_width 0x030e
+xtensa xtreg ua_state_0 0x030f
+xtensa xtreg ua_state_1 0x0310
+xtensa xtreg ua_state_2 0x0311
+xtensa xtreg ua_state_3 0x0312
+xtensa xtreg q0 0x1008
+xtensa xtreg q1 0x1009
+xtensa xtreg q2 0x100a
+xtensa xtreg q3 0x100b
+xtensa xtreg q4 0x100c
+xtensa xtreg q5 0x100d
+xtensa xtreg q6 0x100e
+xtensa xtreg q7 0x100f
xtensa xtreg mmid 0x0259
xtensa xtreg ibreakenable 0x0260
xtensa xtreg memctl 0x0261
@@ -231,38 +226,38 @@ xtensa xtreg misc0 0x02f4
xtensa xtreg misc1 0x02f5
xtensa xtreg misc2 0x02f6
xtensa xtreg misc3 0x02f7
-xtensa xtreg pwrctl 0x2025
-xtensa xtreg pwrstat 0x2026
-xtensa xtreg eristat 0x2027
-xtensa xtreg cs_itctrl 0x2028
-xtensa xtreg cs_claimset 0x2029
-xtensa xtreg cs_claimclr 0x202a
-xtensa xtreg cs_lockaccess 0x202b
-xtensa xtreg cs_lockstatus 0x202c
-xtensa xtreg cs_authstatus 0x202d
-xtensa xtreg fault_info 0x203c
-xtensa xtreg trax_id 0x203d
-xtensa xtreg trax_control 0x203e
-xtensa xtreg trax_status 0x203f
-xtensa xtreg trax_data 0x2040
-xtensa xtreg trax_address 0x2041
-xtensa xtreg trax_pctrigger 0x2042
-xtensa xtreg trax_pcmatch 0x2043
-xtensa xtreg trax_delay 0x2044
-xtensa xtreg trax_memstart 0x2045
-xtensa xtreg trax_memend 0x2046
-xtensa xtreg pmg 0x2054
-xtensa xtreg pmpc 0x2055
-xtensa xtreg pm0 0x2056
-xtensa xtreg pm1 0x2057
-xtensa xtreg pmctrl0 0x2058
-xtensa xtreg pmctrl1 0x2059
-xtensa xtreg pmstat0 0x205a
-xtensa xtreg pmstat1 0x205b
-xtensa xtreg ocdid 0x205c
-xtensa xtreg ocd_dcrclr 0x205d
-xtensa xtreg ocd_dcrset 0x205e
-xtensa xtreg ocd_dsr 0x205f
+xtensa xtreg pwrctl 0x2028
+xtensa xtreg pwrstat 0x2029
+xtensa xtreg eristat 0x202a
+xtensa xtreg cs_itctrl 0x202b
+xtensa xtreg cs_claimset 0x202c
+xtensa xtreg cs_claimclr 0x202d
+xtensa xtreg cs_lockaccess 0x202e
+xtensa xtreg cs_lockstatus 0x202f
+xtensa xtreg cs_authstatus 0x2030
+xtensa xtreg fault_info 0x203f
+xtensa xtreg trax_id 0x2040
+xtensa xtreg trax_control 0x2041
+xtensa xtreg trax_status 0x2042
+xtensa xtreg trax_data 0x2043
+xtensa xtreg trax_address 0x2044
+xtensa xtreg trax_pctrigger 0x2045
+xtensa xtreg trax_pcmatch 0x2046
+xtensa xtreg trax_delay 0x2047
+xtensa xtreg trax_memstart 0x2048
+xtensa xtreg trax_memend 0x2049
+xtensa xtreg pmg 0x2057
+xtensa xtreg pmpc 0x2058
+xtensa xtreg pm0 0x2059
+xtensa xtreg pm1 0x205a
+xtensa xtreg pmctrl0 0x205b
+xtensa xtreg pmctrl1 0x205c
+xtensa xtreg pmstat0 0x205d
+xtensa xtreg pmstat1 0x205e
+xtensa xtreg ocdid 0x205f
+xtensa xtreg ocd_dcrclr 0x2060
+xtensa xtreg ocd_dcrset 0x2061
+xtensa xtreg ocd_dsr 0x2062
xtensa xtreg a0 0x0000
xtensa xtreg a1 0x0001
xtensa xtreg a2 0x0002
@@ -279,19 +274,3 @@ xtensa xtreg a12 0x000c
xtensa xtreg a13 0x000d
xtensa xtreg a14 0x000e
xtensa xtreg a15 0x000f
-xtensa xtreg b0 0x0010
-xtensa xtreg b1 0x0011
-xtensa xtreg b2 0x0012
-xtensa xtreg b3 0x0013
-xtensa xtreg b4 0x0014
-xtensa xtreg b5 0x0015
-xtensa xtreg b6 0x0016
-xtensa xtreg b7 0x0017
-xtensa xtreg b8 0x0018
-xtensa xtreg b9 0x0019
-xtensa xtreg b10 0x001a
-xtensa xtreg b11 0x001b
-xtensa xtreg b12 0x001c
-xtensa xtreg b13 0x001d
-xtensa xtreg b14 0x001e
-xtensa xtreg b15 0x001f
generated by cgit v1.1 at 2024-11-16 13:12:08 +0000