1 files changed, 47 insertions, 0 deletions
diff --git a/tcl/target/bl702l.cfg b/tcl/target/bl702l.cfg
new file mode 100644
index 0000000..467dd8c
--- /dev/null
+++ b/tcl/target/bl702l.cfg
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Bouffalo Labs BL702L and BL704L target
+#
+# https://en.bouffalolab.com/product/?type=detail&id=26
+#
+# Default JTAG pins: (if not changed by eFuse configuration)
+# TMS - GPIO0
+# TDI - GPIO1
+# TCK - GPIO2
+# TDO - GPIO7
+#
+
+if { [info exists CHIPNAME] } {
+	set BL602_CHIPNAME $CHIPNAME
+} else {
+	set BL602_CHIPNAME bl702l
+}
+
+set CPUTAPID 0x20000e05
+
+# For work-area we use beginning of OCRAM, since BL702L have only ITCM, which can be taken
+# by L1 cache and XIP during runtime.
+set WORKAREAADDR 0x42020000
+set WORKAREASIZE 0x10000
+
+source [find target/bl602_common.cfg]
+
+# JTAG reset is broken. Read comment of bl602_sw_reset function for more information
+# On BL702L, we are forcing boot into ISP mode, so chip stays in BootROM until JTAG re-attach
+$_TARGETNAME configure -event reset-assert {
+	halt
+
+	# Restore clocks to defaults
+	bl602_restore_clock_defaults
+
+	# In HBN_RSV2, set HBN_RELEASE_CORE to HBN_RELEASE_CORE_FLAG (4)
+	# and HBN_USER_BOOT_SEL to 1 (ISP)
+	mww 0x4000f108 0x44000000
+
+	# Perform software reset
+	bl602_sw_reset
+
+	# Reset HBN_RSV2 so BootROM will not force ISP mode again
+	mww 0x4000f108 0x00000000
+}