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-rw-r--r--tcl/target/atsamv.cfg15
1 files changed, 8 insertions, 7 deletions
diff --git a/tcl/target/atsamv.cfg b/tcl/target/atsamv.cfg
index 1d026aa..43962de 100644
--- a/tcl/target/atsamv.cfg
+++ b/tcl/target/atsamv.cfg
@@ -45,15 +45,16 @@ if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
+
+ # Set CSW[27], which according to ARM ADI v5 appendix E1.4 maps to AHB signal
+ # HPROT[3], which according to AMBA AHB/ASB/APB specification chapter 3.7.3
+ # makes the data access cacheable. This allows reading and writing data in the
+ # CPU cache from the debugger, which is far more useful than going straight to
+ # RAM when operating on typical variables, and is generally no worse when
+ # operating on special memory locations.
+ $_CHIPNAME.dap apcsw 0x08000000 0x08000000
}
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME atsamv 0x00400000 0 0 0 $_TARGETNAME
-# Set CSW[27], which according to ARM ADI v5 appendix E1.4 maps to AHB signal
-# HPROT[3], which according to AMBA AHB/ASB/APB specification chapter 3.7.3
-# makes the data access cacheable. This allows reading and writing data in the
-# CPU cache from the debugger, which is far more useful than going straight to
-# RAM when operating on typical variables, and is generally no worse when
-# operating on special memory locations.
-$_CHIPNAME.dap apcsw 0x08000000 0x08000000